board/qemu_x86: don't enable u-boot

it's a bit buggy when building. disable for now.

will re-visit later.

Signed-off-by: Leah Rowe <leah@libreboot.org>

.gitcheck

@@ -1,38 +1,82 @@
-#!/usr/bin/env bash
+#!/usr/bin/env sh
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
 # SPDX-License-Identifier: GPL-3.0-only
 
-Set_placeholder(){
-	# Check if username and or email is set.
-	if ! git config user.name || git config user.email ; then
-		git config user.name || git config user.name 'lbmkplaceholder'
-		git config user.email || git config user.email 'placeholder@lbmkplaceholder.com'
+git_name="lbmkplaceholder"
+git_email="placeholder@lbmkplaceholder.com"
+
+main()
+{
+	if [ $# -gt 0 ]; then
+		if [ "${1}" = "clean" ]; then
+			clean > /dev/null 2> /dev/null
+		else
+			printf "%s: Unsupported argument\n" $0
+			exit 1
+		fi
+	else
+		set_placeholders > /dev/null 2> /dev/null
 	fi
 }
 
-Clean(){
-	if [ "$(git config user.name)" = "lbmkplaceholder" ]; then
+set_placeholders()
+{
+	set_git_credentials
+
+	# Check coreboot as well to prevent errors during building
+	if [ ! -d coreboot ]; then
+		return
+	fi
+	for x in coreboot/*; do
+		if [ ! -d "${x}" ]; then
+			continue
+		fi
+		(
+		cd "${x}"
+		set_git_credentials
+		)
+	done
+}
+
+set_git_credentials()
+{
+	# Check if username and or email is set.
+	if ! git config user.name || git config user.email ; then
+		git config user.name \
+				|| git config user.name "${git_name}"
+		git config user.email \
+				|| git config user.email "${git_email}"
+	fi
+}
+
+clean()
+{
+	unset_placeholders
+
+	if [ ! -d coreboot ]; then
+		return
+	fi
+	for x in coreboot/*; do
+		if [ ! -d "${x}" ]; then
+			continue
+		fi
+		(
+		cd "${x}"
+		unset_placeholders
+		)
+	done
+}
+
+unset_placeholders()
+{
+	if [ "$(git config user.name)" = "${git_name}" ]; then
 		git config --unset user.name
 	fi
 
-	if [ "$(git config user.email)" = "placeholder@lbmkplaceholder.com" ]; then
+	if [ "$(git config user.email)" = "${git_email}" ]; then
 		git config --unset user.email
 	fi
 }
 
-Run(){
-if [ "${1}" = "clean" ]; then
-	Clean
-else
-	Set_placeholder
-
-	# Check coreboot as well to prevent errors during building
-	if [ -d coreboot ]; then
-		cd coreboot
-		Set_placeholder
-		cd -
-	fi
-fi
-}
-
-Run >/dev/null
+main $@

.gitignore

@@ -1,6 +1,16 @@
 *~
+*.o
+/lbmk.err.log
+/cbutils/
+/pciroms/
+/util/e6400-flash-unlock/e6400_flash_unlock
+/util/ich9utils/*.bin
+/util/ich9utils/demefactory
+/util/ich9utils/ich9deblob
+/util/ich9utils/ich9show
+/util/ich9utils/ich9gen
 /TODO
-/ich9utils/
+/bios_extract/
 /tmp/
 /payload/
 /me_cleaner/
@@ -29,10 +39,4 @@
 /push
 /version
 /versiondate
-/blobs/app/
-/blobs/me.exe
-/blobs/t440p/me.bin
-/blobs/xx20/me.bin
-/blobs/xx30/me.bin
-/mrc/
 /util/nvmutil/nvm

Makefile

@@ -1,10 +1,13 @@
 # 
-# Makefile for compatibility purposes
-# You can use this, but it's recommended to run build system commands directly
+# Makefile for meme purposes
+# You can use this, but it just runs lbmk commands.
 #
-# See docs/maintain/ and docs/git/ for information about the build system
+# See docs/maintain/ and docs/git/ for information about the build system:
+# https://libreboot.org/docs/maintain/
+# https://libreboot.org/docs/build/
 #
-# Copyright (C) 2020, 2021 Leah Rowe <info@minifree.org>
+# Copyright (C) 2020, 2021, 2023 Leah Rowe <info@minifree.org>
+# Copyright (C) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 #
 # This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -20,10 +23,13 @@
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 #
 
-.PHONY: all check download modules ich9m-descriptors payloads roms release \
-	clean crossgcc-clean install-dependencies-ubuntu \
-	install-dependencies-debian install-dependencies-arch \
-	install-dependencies-void
+.POSIX:
+
+#.PHONY: all check download modules ich9m-descriptors payloads roms release \
+#	clean crossgcc-clean install-dependencies-ubuntu \
+#	install-dependencies-debian install-dependencies-arch \
+#	install-dependencies-void install-dependencies-fedora38 \
+#	install-dependencies-parabola
 
 all: roms
 
@@ -55,6 +61,8 @@ clean:
 	./build clean grub
 	./build clean memtest86plus
 	./build clean rom_images
+	./build clean u-boot
+	./build clean bios_extract
 
 crossgcc-clean:
 	./build clean crossgcc
@@ -70,3 +78,9 @@ install-dependencies-arch:
 
 install-dependencies-void:
 	./build dependencies void
+
+install-dependencies-fedora38:
+	./build dependencies fedora38
+
+install-dependencies-parabola:
+	./build dependencies parabola

README.md

@@ -4,7 +4,7 @@ Libreboot
 Find libreboot documentation at <https://libreboot.org/>
 
 The `libreboot` project provides
-[libre](https://en.wikipedia.org/wiki/Open_source) *boot
+[libre](https://libreboot.org/freedom-status.html) *boot
 firmware* that initializes the hardware (e.g. memory controller, CPU,
 peripherals) on specific Intel/AMD x86 and ARM targets, which
 then starts a bootloader for your operating system. Linux/BSD are
@@ -103,12 +103,12 @@ How to help
 ===========
 
 You can check bugs listed on
-the [bug tracker](https://notabug.org/libreboot/lbmk/issues).
+the [bug tracker](https://codeberg.org/libreboot/lbmk/issues).
 
 If you spot a bug and have a fix, the website has instructions for how to send
 patches, and you can also report it. Also, this entire website is
 written in Markdown and hosted in a [separate
-repository](https://notabug.org/libreboot/lbwww) where you can send patches.
+repository](https://codeberg.org/libreboot/lbwww) where you can send patches.
 
 Any and all development discussion and user support are all done on the IRC
 channel. More information is on the contact page of libreboot.org.

blobutil

@@ -1,44 +0,0 @@
-#!/usr/bin/env bash
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-License-Identifier: GPL-3.0-only
-
-./.gitcheck
-
-script_dir="resources/scripts/blobs"
-modes=$(ls -1 ${script_dir})
-
-Print_help(){
-	cat <<- EOF
-	Usage: ./blobutil [mode] <options>
-	Example: ./blobutil download x230_12mb
-
-	Possible options for mode are
-	${modes}
-
-	Mode descriptions:
-	download: Try to automatically generate blobs for specified board
-	inject: Inject blobs for specified board into specified rom
-	extract: Extract blobs from specified rom for specified board
-	EOF
-}
-
-
-if [ $# -gt 0 ]; then
-        mode="${1}"
-        shift
-	args="$@"
-
-	if [ ! -f "${script_dir}/${mode}" ]; then
-		printf "Error: No mode ${mode}\n"
-		Print_help
-		exit 1
-	else
-		./${script_dir}/${mode} ${args}
-	fi
-
-else
-	printf 'Error: You must specify a mode\n'
-        Print_help
-fi
-
-./.gitcheck clean

build

@@ -1,111 +0,0 @@
-#!/usr/bin/env bash
-
-#  generic build script, for building components (all of them)
-#
-#	Copyright (C) 2014, 2015, 2020, 2021 Leah Rowe <info@minifree.org>
-#	Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
-#	Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
-#	Copyright (C) 2022, Caleb La Grange <thonkpeasant@protonmail.com>
-#
-#	This program is free software: you can redistribute it and/or modify
-#	it under the terms of the GNU General Public License as published by
-#	the Free Software Foundation, either version 3 of the License, or
-#	(at your option) any later version.
-#
-#	This program is distributed in the hope that it will be useful,
-#	but WITHOUT ANY WARRANTY; without even the implied warranty of
-#	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-#	GNU General Public License for more details.
-#
-#	You should have received a copy of the GNU General Public License
-#	along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-./.gitcheck
-
-[ "x${DEBUG+set}" = 'xset' ] && set -v
-set -u -e
-
-projectname="$(cat projectname)"
-
-build=./resources/scripts/build
-
-listmodes() {
-	for mode in "${build}"/*; do
-		printf '%s\n' "${mode##*/}"
-	done
-}
-
-# Takes exactly one mode as parameter
-listoptions() {
-	for option in "${build}"/"${1}"/*; do
-		printf '%s\n' "${option##*/}"
-	done
-}
-
-help() {
-	cat <<- EOF
-	USAGE:	./build <MODE> <OPTION>
-
-	possible values for 'mode':
-	$(listmodes)
-
-	Example:	./build module all
-	Example:	./build module flashrom [static]
-	Example:	./build roms withgrub
-	Example:	./build clean all
-
-	Refer to the ${projectname} documentation for more information.
-	EOF
-}
-
-die() {
-	printf 'Error: %s\n' "${@}" 1>&2
-	exit 1
-}
-
-if [ $# -lt 1 ]; then
-	die "Wrong number of arguments specified. See './build help'."
-fi
-
-mode="${1}"
-
-if [ "${mode}" != "dependencies" ]; then
-	./resources/scripts/misc/versioncheck
-fi
-
-[ "${mode}" = help ] && help && exit 0
-
-if [ $# -gt 1 ]; then
-
-	option="${2}"
-	shift 2
-
-	case "${option}" in
-		list)
-			printf "Available options for mode '%s':\n\n" "${mode}"
-			listoptions "${mode}"
-			;;  
-		all)
-			for option in $(listoptions "${mode}"); do
-				"${build}"/"${mode}"/"${option}" $@
-			done
-			;;
-		*)
-			if [ -d "${build}"/"${mode}"/ ]; then
-				if [ -f "${build}"/"${mode}"/"${option}" ]; then
-					"${build}"/"${mode}"/"${option}" $@
-				else
-					help
-					die "Invalid option for '${mode}'. See './build ${mode} list'."
-				fi
-			else
-				help
-				die "Invalid mode '${mode}'. See './build help'."
-			fi
-	esac
-else
-	help
-	exit 0
-fi
-
-./.gitcheck clean

build

@@ -0,0 +1 @@
+lbmk

download

@@ -1,100 +0,0 @@
-#!/usr/bin/env bash
-
-# Generic script for downloading programs used by the build system
-#
-#	Copyright (C) 2014, 2015, 2020, 2021 Leah Rowe <info@minifree.org>
-#	Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
-#	Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
-#	Copyright (C) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-#	Copyright (C) 2022 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-#
-#	This program is free software: you can redistribute it and/or modify
-#	it under the terms of the GNU General Public License as published by
-#	the Free Software Foundation, either version 3 of the License, or
-#	(at your option) any later version.
-#
-#	This program is distributed in the hope that it will be useful,
-#	but WITHOUT ANY WARRANTY; without even the implied warranty of
-#	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-#	GNU General Public License for more details.
-#
-#	You should have received a copy of the GNU General Public License
-#	along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-./.gitcheck
-
-[ "x${DEBUG+set}" = 'xset' ] && set -v
-set -u -e
-
-./resources/scripts/misc/versioncheck
-
-rm -f "build_error"
-
-download=resources/scripts/download
-
-listprograms() {
-	for program in "${download}"/*; do
-		printf '%s\n' "${program##*/}"
-	done
-}
-
-help() {
-	cat <<- EOF
-	USAGE:	./download <PROGRAM> <OPTIONS>
-
-	possible values for 'program':
-	$(listprograms)
-
-	Example:	./download flashrom
-	Example:	./download coreboot
-
-	Some program options allow for additional parameters:
-	Example:	./download coreboot default
-	Example:	./download coreboot x60
-
-	Each program download script should work without extra paramaters, but
-	they can use them. For instance, './download coreboot' will download all
-	coreboot trees by default, but './download coreboot x60' will only download
-	the coreboot tree required for the target: x60
-
-	Each program download script should also accept the --help parameter to
-	display the usage of the script.
-	
-	Refer to the documentation for more information.
-	EOF
-}
-
-die() {
-	printf 'Error: %s\n' "${@}" 1>&2
-	exit 1
-}
-
-if [ $# -lt 1 ]; then
-	help
-	die "Please specify arguments."
-fi
-
-program="${1}"
-shift 1
-[ "${program}" = help ] && help && exit 0
-
-if [ "${program}" = "all" ]; then
-	for downloadProgram in ${download}/*; do
-		"${downloadProgram}"
-	done
-	exit 0
-elif [ ! -f "${download}/${program}" ]; then
-	help
-	die "Invalid argument '${program}'. See: './download help'."
-fi
-
-if [ $# -lt 1 ]; then	
-	"${download}/${program}"
-else	
-	"${download}/${program}" $@
-fi
-
-exit 0
-
-./.gitcheck clean

download

@@ -0,0 +1 @@
+lbmk

gitclone

@@ -0,0 +1,122 @@
+#!/usr/bin/env sh
+
+# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
+# SPDX-License-Identifier: GPL-3.0-only
+
+name=""
+revision=""
+location=""
+url=""
+bkup_url=""
+tmp_dir=""
+
+main()
+{
+	if [ -z "${1+x}" ]; then
+		err 'Error: name not set'
+	fi
+
+	name=${1}
+
+	read_config
+	verify_config
+
+	clone_project
+
+	# clean in case of failure
+	rm -rf ${tmp_dir} >/dev/null 2>&1 || exit 1
+}
+
+read_config()
+{
+	awkstr=" /\{.*${name}.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
+	while read -r line ; do
+		set ${line} >/dev/null 2>&1
+		case ${line} in
+			rev:*)
+			revision=${2}
+			;;
+			loc:*)
+			location=${2}
+			;;
+			url:*)
+			url=${2}
+			;;
+			bkup_url:*)
+			bkup_url=${2}
+			;;
+		esac
+	done << EOF
+	$(eval "awk '${awkstr}' resources/git/revisions")
+EOF
+}
+
+verify_config()
+{
+	if [ -z "${revision+x}" ]; then
+		err 'Error: revision not set'
+	elif [ -z "${location+x}" ]; then
+		err 'Error: location not set'
+	elif [ -z "${url+x}" ]; then
+		err 'Error: url not set'
+	fi
+}
+
+clone_project()
+{
+	tmp_dir=$(mktemp -dt "${name}_XXXXX")
+
+	git clone ${url} ${tmp_dir} || git clone ${bkup_url} ${tmp_dir} \
+			|| err "ERROR: could not download ${name}"
+
+	(
+	cd ${tmp_dir} || exit 1
+	git reset --hard ${revision} || err "Cannot reset revision"
+	)
+
+	patch_project
+
+	if [ -d "${location}" ]; then
+		rm -Rf ${location} || exit 1
+	fi
+	mv ${tmp_dir} ${location} && return 0
+
+	printf "ERROR: Could not copy temp file to destination.\n"
+	err " ${tmp_dir} > ${location} check permissions"
+}
+
+patch_project()
+{
+	patchdir="resources/${name}/patches"
+
+	for patchfile in ${PWD}/${patchdir}/*.patch ; do
+		if [ ! -f "${patchfile}" ]; then
+			continue
+		fi
+		(
+		cd ${tmp_dir} || exit 1
+		git am ${patchfile} || err "Cannot patch project: $name"
+		)
+	done
+}
+
+usage()
+{
+	cat <<- EOF
+	Usage: ./gitclone [name]
+
+	Options:
+	name: Module name as specified in resources/git/revisions
+	EOF
+}
+
+err()
+{
+	printf "${@}\n"
+	usage
+	exit 1
+}
+
+main $@

lbmk

@@ -0,0 +1,126 @@
+#!/usr/bin/env sh
+
+#  generic script for calling other scripts in lbmk
+#
+#	Copyright (C) 2014,2015,2020,2021,2023 Leah Rowe <info@minifree.org>
+#	Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
+#	Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
+#	Copyright (C) 2022, Caleb La Grange <thonkpeasant@protonmail.com>
+#
+#	This program is free software: you can redistribute it and/or modify
+#	it under the terms of the GNU General Public License as published by
+#	the Free Software Foundation, either version 3 of the License, or
+#	(at your option) any later version.
+#
+#	This program is distributed in the hope that it will be useful,
+#	but WITHOUT ANY WARRANTY; without even the implied warranty of
+#	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#	GNU General Public License for more details.
+#
+#	You should have received a copy of the GNU General Public License
+#	along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+
+[ "x${DEBUG+set}" = 'xset' ] && set -v
+set -u -e
+
+projectname="$(cat projectname)"
+buildpath=""
+mode=""
+option=""
+
+main()
+{
+	if [ "${0##*/}" = "lbmk" ]; then
+		die "Do not run the lbmk script directly!"
+	elif [ "${0##*/}" = "download" ]; then
+		./update module $@ || exit 1
+		exit 0
+	elif [ $# -lt 1 ]; then
+		die "Too few arguments. Try: ${0} help"
+	fi
+
+	buildpath="./resources/scripts/${0##*/}"
+
+	mode="${1}"
+	./.gitcheck
+	if [ "${mode}" != "dependencies" ]; then
+		./resources/scripts/misc/versioncheck
+	fi
+	if [ "${mode}" = help ]; then
+		usage $0
+		exit 0
+	elif [ $# -lt 2 ]; then
+		usage $0
+		exit 0
+	fi
+
+	option="${2}"
+	shift 2
+
+	case "${option}" in
+	list)
+		printf "Options for mode '%s':\n\n" ${mode}
+		listoptions "${mode}"
+		;;
+	all)
+		for option in $(listoptions "${mode}"); do
+			"${buildpath}/${mode}/${option}" $@
+		done
+		;;
+	*)
+		if [ ! -d "${buildpath}/${mode}" ]; then
+			usage $0
+			die "Invalid mode '${mode}'. Run: ${0} help"
+		elif [ ! -f "${buildpath}/${mode}/${option}" ]; then
+			usage $0
+			printf "Invalid option for '%s'." ${mode}
+			die "Run: ${0} ${mode} list'."
+		fi
+		"${buildpath}/${mode}/${option}" $@ || die "lbmk error"
+	esac
+
+	./.gitcheck clean
+}
+
+# Takes exactly one mode as parameter
+listoptions()
+{
+	for option in "${buildpath}/${1}/"*; do
+		printf '%s\n' ${option##*/}
+	done
+}
+
+usage()
+{
+	progname=${0}
+	cat <<- EOF
+	USAGE:	${progname} <MODE> <OPTION>
+
+	possible values for 'mode':
+	$(listmodes)
+
+	Example:	${progname} module all
+	Example:	${progname} module flashrom [static]
+	Example:	${progname} roms withgrub
+	Example:	${progname} clean all
+
+	Refer to ${projectname} documentation for more info.
+	EOF
+}
+
+listmodes()
+{
+	for mode in "${buildpath}"/*; do
+		printf '%s\n' ${mode##*/}
+	done
+}
+
+die()
+{
+	./.gitcheck clean
+	printf "Error: %s\n" "${@}" 1>&2
+	exit 1
+}
+
+main $@

modify

@@ -1,102 +0,0 @@
-#!/usr/bin/env bash
-
-#  generic scripts for modifying configs and such
-#
-#	Copyright (C) 2014, 2015, 2020, 2021 Leah Rowe <info@minifree.org>
-#	Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
-#	Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
-#
-#    This program is free software: you can redistribute it and/or modify
-#    it under the terms of the GNU General Public License as published by
-#    the Free Software Foundation, either version 3 of the License, or
-#    (at your option) any later version.
-#
-#    This program is distributed in the hope that it will be useful,
-#    but WITHOUT ANY WARRANTY; without even the implied warranty of
-#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-#    GNU General Public License for more details.
-#
-#    You should have received a copy of the GNU General Public License
-#    along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-[ "x${DEBUG+set}" = 'xset' ] && set -v
-set -u -e
-
-projectname="$(cat projectname)"
-./resources/scripts/misc/versioncheck
-
-modify=./resources/scripts/modify
-
-listmodes() {
-	for mode in "${modify}"/*; do
-		printf '%s\n' "${mode##*/}"
-	done
-}
-
-# Takes exactly one mode as parameter
-listoptions() {
-	for option in "${modify}"/"${1}"/*; do
-		printf '%s\n' "${option##*/}"
-	done
-}
-
-help() {
-	cat <<- EOF
-	USAGE:	./modify <MODE> <OPTION>
-
-	possible values for 'mode':
-	$(listmodes)
-
-	Example:	./modify coreboot configs
-	Example:	./modify coreboot configs x60
-
-	Refer to the ${projectname} documentation for more information.
-	EOF
-}
-
-die() {
-	printf 'Error: %s\n' "${@}" 1>&2
-	exit 1
-}
-
-if [ $# -lt 1 ]; then
-	die "Wrong number of arguments specified. See './modify help'."
-fi
-
-mode="${1}"
-
-[ "${mode}" = help ] && help && exit 0
-
-if [ $# -gt 1 ]; then
-
-    option="${2}"
-    shift 2
-
-    case "${option}" in
-    	list)
-    		printf "Available options for mode '%s':\n\n" "${mode}"
-    		listoptions "${mode}"
-    		;;  
-    	all)
-    		for option in $(listoptions "${mode}"); do
-    			"${modify}"/"${mode}"/"${option}" $@
-    		done
-    		;;
-    	*)
-    		if [ -d "${modify}"/"${mode}"/ ]; then
-    			if [ -f "${modify}"/"${mode}"/"${option}" ]; then
-    				"${modify}"/"${mode}"/"${option}" $@
-    			else
-                    help
-    				die "Invalid option for '${mode}'. See './modify ${mode} list'."
-    			fi
-    		else
-                help
-    			die "Invalid mode '${mode}'. See './modify help'."
-    		fi
-    esac
-else
-    help
-    exit 0
-fi

modify

@@ -0,0 +1 @@
+lbmk

projectname

@@ -1 +1 @@
-libreboot
+censored-libreboot

resources/blobs/me7_update_parser.py

@@ -1,616 +0,0 @@
-#!/usr/bin/env python3
-
-"""ME7 Update binary parser."""
-
-# Copyright (C) 2020 Tom Hiller <thrilleratplay@gmail.com>
-# Copyright (C) 2016-2018 Nicola Corna <nicola@corna.info>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-# Based on the amazing me_cleaner, https://github.com/corna/me_cleaner, parses
-# the required signed partition from an ME update file to generate a valid
-# flashable ME binary.
-#
-#  This was written for Heads ROM, https://github.com/osresearch/heads
-#  to allow continuous integration reproducible builds for Lenovo xx20 models
-#  (X220, T420, T520, etc).
-#
-#  A full model list can be found:
-#   https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.txt
-
-
-from struct import pack, unpack
-from typing import List
-import argparse
-import sys
-import hashlib
-import binascii
-import os.path
-
-#############################################################################
-
-FTPR_END = 0x76000
-MINIFIED_FTPR_OFFSET = 0x400  # offset start of Factory Partition (FTPR)
-ORIG_FTPR_OFFSET = 0xCC000
-PARTITION_HEADER_OFFSET = 0x30  # size of partition header
-
-DEFAULT_OUTPUT_FILE_NAME = "flashregion_2_intel_me.bin"
-
-#############################################################################
-
-
-class EntryFlags:
-    """EntryFlag bitmap values."""
-
-    ExclBlockUse = 8192
-    WOPDisable = 4096
-    Logical = 2048
-    Execute = 1024
-    Write = 512
-    Read = 256
-    DirectAccess = 128
-    Type = 64
-
-
-def generateHeader() -> bytes:
-    """Generate Header."""
-    ROM_BYPASS_INSTR_0 = binascii.unhexlify("2020800F")
-    ROM_BYPASS_INSTR_1 = binascii.unhexlify("40000010")
-    ROM_BYPASS_INSTR_2 = pack("<I", 0)
-    ROM_BYPASS_INSTR_3 = pack("<I", 0)
-
-    # $FPT Partition table header
-    HEADER_TAG = "$FPT".encode()
-    HEADER_NUM_PARTITIONS = pack("<I", 1)
-    HEADER_VERSION = b"\x20"  # version 2.0
-    HEADER_ENTRY_TYPE = b"\x10"
-    HEADER_LENGTH = b"\x30"
-    HEADER_CHECKSUM = pack("<B", 0)
-    HEADER_FLASH_CYCLE_LIFE = pack("<H", 7)
-    HEADER_FLASH_CYCLE_LIMIT = pack("<H", 100)
-    HEADER_UMA_SIZE = pack("<H", 32)
-    HEADER_FLAGS = binascii.unhexlify("000000FCFFFF")
-    HEADER_FITMAJOR = pack("<H", 0)
-    HEADER_FITMINOR = pack("<H", 0)
-    HEADER_FITHOTFIX = pack("<H", 0)
-    HEADER_FITBUILD = pack("<H", 0)
-
-    FTPR_header_layout = bytearray(
-        ROM_BYPASS_INSTR_0
-        + ROM_BYPASS_INSTR_1
-        + ROM_BYPASS_INSTR_2
-        + ROM_BYPASS_INSTR_3
-        + HEADER_TAG
-        + HEADER_NUM_PARTITIONS
-        + HEADER_VERSION
-        + HEADER_ENTRY_TYPE
-        + HEADER_LENGTH
-        + HEADER_CHECKSUM
-        + HEADER_FLASH_CYCLE_LIFE
-        + HEADER_FLASH_CYCLE_LIMIT
-        + HEADER_UMA_SIZE
-        + HEADER_FLAGS
-        + HEADER_FITMAJOR
-        + HEADER_FITMINOR
-        + HEADER_FITHOTFIX
-        + HEADER_FITBUILD
-    )
-
-    # Update checksum
-    FTPR_header_layout[27] = (0x100 - sum(FTPR_header_layout) & 0xFF) & 0xFF
-
-    return FTPR_header_layout
-
-
-def generateFtpPartition() -> bytes:
-    """Partition table entry."""
-    ENTRY_NAME = binascii.unhexlify("46545052")
-    ENTRY_OWNER = binascii.unhexlify("FFFFFFFF")  # "None"
-    ENTRY_OFFSET = binascii.unhexlify("00040000")
-    ENTRY_LENGTH = binascii.unhexlify("00600700")
-    ENTRY_START_TOKENS = pack("<I", 1)
-    ENTRY_MAX_TOKENS = pack("<I", 1)
-    ENTRY_SCRATCH_SECTORS = pack("<I", 0)
-    ENTRY_FLAGS = pack(
-        "<I",
-        (
-            EntryFlags.ExclBlockUse
-            + EntryFlags.Execute
-            + EntryFlags.Write
-            + EntryFlags.Read
-            + EntryFlags.DirectAccess
-        ),
-    )
-
-    partition = (
-        ENTRY_NAME
-        + ENTRY_OWNER
-        + ENTRY_OFFSET
-        + ENTRY_LENGTH
-        + ENTRY_START_TOKENS
-        + ENTRY_MAX_TOKENS
-        + ENTRY_SCRATCH_SECTORS
-        + ENTRY_FLAGS
-    )
-
-    # offset of the partition - length of partition entry -length of header
-    pad_len = MINIFIED_FTPR_OFFSET - (len(partition) + PARTITION_HEADER_OFFSET)
-    padding = b""
-
-    for i in range(0, pad_len):
-        padding += b"\xFF"
-
-    return partition + padding
-
-
-############################################################################
-
-
-class OutOfRegionException(Exception):
-    """Out of Region Exception."""
-
-    pass
-
-
-class clean_ftpr:
-    """Clean Factory Parition (FTPR)."""
-
-    UNREMOVABLE_MODULES = ("ROMP", "BUP")
-    COMPRESSION_TYPE_NAME = ("uncomp.", "Huffman", "LZMA")
-
-    def __init__(self, ftpr: bytes):
-        """Init."""
-        self.orig_ftpr = ftpr
-        self.ftpr = ftpr
-        self.mod_headers: List[bytes] = []
-        self.check_and_clean_ftpr()
-
-    #####################################################################
-    # tilities
-    #####################################################################
-    def slice(self, offset: int, size: int) -> bytes:
-        """Copy data of a given size from FTPR starting from offset."""
-        offset_end = offset + size
-        return self.ftpr[offset:offset_end]
-
-    def unpack_next_int(self, offset: int) -> int:
-        """Sugar syntax for unpacking a little-endian UINT at offset."""
-        return self.unpack_val(self.slice(offset, 4))
-
-    def unpack_val(self, data: bytes) -> int:
-        """Sugar syntax for unpacking a little-endian unsigned integer."""
-        return unpack("<I", data)[0]
-
-    def bytes_to_ascii(self, data: bytes) -> str:
-        """Decode bytes into ASCII."""
-        return data.rstrip(b"\x00").decode("ascii")
-
-    def clear_ftpr_data(self, start: int, end: int) -> None:
-        """Replace values in range with 0xFF."""
-        empty_data = bytes()
-
-        for i in range(0, end - start):
-            empty_data += b"\xff"
-        self.write_ftpr_data(start, empty_data)
-
-    def write_ftpr_data(self, start: int, data: bytes) -> None:
-        """Replace data in FTPR starting at a given offset."""
-        end = len(data) + start
-
-        new_partition = self.ftpr[:start]
-        new_partition += data
-
-        if end != FTPR_END:
-            new_partition += self.ftpr[end:]
-
-        self.ftpr = new_partition
-
-    ######################################################################
-    # FTPR cleanig/checking functions
-    ######################################################################
-    def get_chunks_offsets(self, llut: bytes):
-        """Calculate Chunk offsets from LLUT."""
-        chunk_count = self.unpack_val(llut[0x04:0x08])
-        huffman_stream_end = sum(unpack("<II", llut[0x10:0x18]))
-        nonzero_offsets = [huffman_stream_end]
-        offsets = []
-
-        for i in range(0, chunk_count):
-            llut_start = 0x40 + (i * 4)
-            llut_end = 0x44 + (i * 4)
-
-            chunk = llut[llut_start:llut_end]
-            offset = 0
-
-            if chunk[3] != 0x80:
-                offset = self.unpack_val(chunk[0:3] + b"\x00")
-
-            offsets.append([offset, 0])
-
-            if offset != 0:
-                nonzero_offsets.append(offset)
-
-        nonzero_offsets.sort()
-
-        for i in offsets:
-            if i[0] != 0:
-                i[1] = nonzero_offsets[nonzero_offsets.index(i[0]) + 1]
-
-        return offsets
-
-    def relocate_partition(self) -> int:
-        """Relocate partition."""
-        new_offset = MINIFIED_FTPR_OFFSET
-        name = self.bytes_to_ascii(self.slice(PARTITION_HEADER_OFFSET, 4))
-
-        old_offset, partition_size = unpack(
-            "<II", self.slice(PARTITION_HEADER_OFFSET + 0x8, 0x8)
-        )
-
-        llut_start = 0
-        for mod_header in self.mod_headers:
-            if (self.unpack_val(mod_header[0x50:0x54]) >> 4) & 7 == 0x01:
-                llut_start = self.unpack_val(mod_header[0x38:0x3C])
-                llut_start += old_offset
-                break
-
-        if self.mod_headers and llut_start != 0:
-            # Bytes 0x9:0xb of the LLUT (bytes 0x1:0x3 of the AddrBase) are
-            # added to the SpiBase (bytes 0xc:0x10 of the LLUT) to compute the
-            # final start of the LLUT. Since AddrBase is not modifiable, we can
-            # act only on SpiBase and here we compute the minimum allowed
-            # new_offset.
-            llut_start_corr = unpack("<H", self.slice(llut_start + 0x9, 2))[0]
-            new_offset = max(
-                new_offset, llut_start_corr - llut_start - 0x40 + old_offset
-            )
-            new_offset = ((new_offset + 0x1F) // 0x20) * 0x20
-        offset_diff = new_offset - old_offset
-
-        print(
-            "Relocating {} from {:#x} - {:#x} to {:#x} - {:#x}...".format(
-                name,
-                old_offset,
-                old_offset + partition_size,
-                new_offset,
-                new_offset + partition_size,
-            )
-        )
-
-        print(" Adjusting FPT entry...")
-        self.write_ftpr_data(
-            PARTITION_HEADER_OFFSET + 0x08,
-            pack("<I", new_offset),
-        )
-
-        if self.mod_headers:
-            if llut_start != 0:
-                if self.slice(llut_start, 4) == b"LLUT":
-                    print(" Adjusting LUT start offset...")
-                    llut_offset = pack(
-                        "<I", llut_start + offset_diff + 0x40 - llut_start_corr
-                    )
-                    self.write_ftpr_data(llut_start + 0x0C, llut_offset)
-
-                    print(" Adjusting Huffman start offset...")
-                    old_huff_offset = self.unpack_next_int(llut_start + 0x14)
-                    ftpr_offset_diff = MINIFIED_FTPR_OFFSET - ORIG_FTPR_OFFSET
-                    self.write_ftpr_data(
-                        llut_start + 0x14,
-                        pack("<I", old_huff_offset + ftpr_offset_diff),
-                    )
-
-                    print(" Adjusting chunks offsets...")
-                    chunk_count = self.unpack_next_int(llut_start + 0x4)
-                    offset = llut_start + 0x40
-                    offset_end = chunk_count * 4
-                    chunks = bytearray(self.slice(offset, offset_end))
-
-                    for i in range(0, offset_end, 4):
-                        i_plus_3 = i + 3
-
-                        if chunks[i_plus_3] != 0x80:
-                            chunks[i:i_plus_3] = pack(
-                                "<I",
-                                self.unpack_val(chunks[i:i_plus_3] + b"\x00")
-                                + (MINIFIED_FTPR_OFFSET - ORIG_FTPR_OFFSET),
-                            )[0:3]
-                    self.write_ftpr_data(offset, bytes(chunks))
-                else:
-                    sys.exit("Huffman modules present but no LLUT found!")
-            else:
-                print(" No Huffman modules found")
-
-        print(" Moving data...")
-        partition_size = min(partition_size, FTPR_END - old_offset)
-
-        if (
-            old_offset + partition_size <= FTPR_END
-            and new_offset + partition_size <= FTPR_END
-        ):
-            for i in range(0, partition_size, 4096):
-                block_length = min(partition_size - i, 4096)
-                block = self.slice(old_offset + i, block_length)
-                self.clear_ftpr_data(old_offset + i, len(block))
-
-                self.write_ftpr_data(new_offset + i, block)
-        else:
-            raise OutOfRegionException()
-
-        return new_offset
-
-    def remove_modules(self) -> int:
-        """Remove modules."""
-        unremovable_huff_chunks = []
-        chunks_offsets = []
-        base = 0
-        chunk_size = 0
-        end_addr = 0
-
-        for mod_header in self.mod_headers:
-            name = self.bytes_to_ascii(mod_header[0x04:0x14])
-            offset = self.unpack_val(mod_header[0x38:0x3C])
-            size = self.unpack_val(mod_header[0x40:0x44])
-            flags = self.unpack_val(mod_header[0x50:0x54])
-            comp_type = (flags >> 4) & 7
-            comp_type_name = self.COMPRESSION_TYPE_NAME[comp_type]
-
-            print(" {:<16} ({:<7}, ".format(name, comp_type_name), end="")
-
-            # If compresion type uncompressed or LZMA
-            if comp_type == 0x00 or comp_type == 0x02:
-                offset_end = offset + size
-                range_msg = "0x{:06x} - 0x{:06x}       ): "
-                print(range_msg.format(offset, offset_end), end="")
-
-                if name in self.UNREMOVABLE_MODULES:
-                    end_addr = max(end_addr, offset + size)
-                    print("NOT removed, essential")
-                else:
-                    offset_end = min(offset + size, FTPR_END)
-                    self.clear_ftpr_data(offset, offset_end)
-                    print("removed")
-
-            # Else if compression type huffman
-            elif comp_type == 0x01:
-                if not chunks_offsets:
-                    # Check if Local Look Up Table (LLUT) is present
-                    if self.slice(offset, 4) == b"LLUT":
-                        llut = self.slice(offset, 0x40)
-
-                        chunk_count = self.unpack_val(llut[0x4:0x8])
-                        base = self.unpack_val(llut[0x8:0xC]) + 0x10000000
-                        chunk_size = self.unpack_val(llut[0x30:0x34])
-
-                        llut = self.slice(offset, (chunk_count * 4) + 0x40)
-
-                        # calculate offsets of chunks from LLUT
-                        chunks_offsets = self.get_chunks_offsets(llut)
-                    else:
-                        no_llut_msg = "Huffman modules found,"
-                        no_llut_msg += "but LLUT is not present."
-                        sys.exit(no_llut_msg)
-
-                module_base = self.unpack_val(mod_header[0x34:0x38])
-                module_size = self.unpack_val(mod_header[0x3C:0x40])
-                first_chunk_num = (module_base - base) // chunk_size
-                last_chunk_num = first_chunk_num + module_size // chunk_size
-                huff_size = 0
-
-                chunk_length = last_chunk_num + 1
-                for chunk in chunks_offsets[first_chunk_num:chunk_length]:
-                    huff_size += chunk[1] - chunk[0]
-
-                size_in_kiB = "~" + str(int(round(huff_size / 1024))) + " KiB"
-                print(
-                    "fragmented data, {:<9}): ".format(size_in_kiB),
-                    end="",
-                )
-
-                # Check if module is in the unremovable list
-                if name in self.UNREMOVABLE_MODULES:
-                    print("NOT removed, essential")
-
-                    # add to list of unremovable chunks
-                    for x in chunks_offsets[first_chunk_num:chunk_length]:
-                        if x[0] != 0:
-                            unremovable_huff_chunks.append(x)
-                else:
-                    print("removed")
-
-            # Else unknown compression type
-            else:
-                unkwn_comp_msg = " 0x{:06x} - 0x{:06x}): "
-                unkwn_comp_msg += "unknown compression, skipping"
-                print(unkwn_comp_msg.format(offset, offset + size), end="")
-
-        if chunks_offsets:
-            removable_huff_chunks = []
-
-            for chunk in chunks_offsets:
-                # if chunk is not in a unremovable chunk, it must be removable
-                if all(
-                    not (
-                        unremovable_chk[0] <= chunk[0] < unremovable_chk[1]
-                        or unremovable_chk[0] < chunk[1] <= unremovable_chk[1]
-                    )
-                    for unremovable_chk in unremovable_huff_chunks
-                ):
-                    removable_huff_chunks.append(chunk)
-
-            for removable_chunk in removable_huff_chunks:
-                if removable_chunk[1] > removable_chunk[0]:
-                    chunk_start = removable_chunk[0] - ORIG_FTPR_OFFSET
-                    chunk_end = removable_chunk[1] - ORIG_FTPR_OFFSET
-                    self.clear_ftpr_data(chunk_start, chunk_end)
-
-            end_addr = max(
-                end_addr, max(unremovable_huff_chunks, key=lambda x: x[1])[1]
-            )
-            end_addr -= ORIG_FTPR_OFFSET
-
-        return end_addr
-
-    def find_mod_header_size(self) -> None:
-        """Find module header size."""
-        self.mod_header_size = 0
-        data = self.slice(0x290, 0x84)
-
-        # check header size
-        if data[0x0:0x4] == b"$MME":
-            if data[0x60:0x64] == b"$MME" or self.num_modules == 1:
-                self.mod_header_size = 0x60
-            elif data[0x80:0x84] == b"$MME":
-                self.mod_header_size = 0x80
-
-    def find_mod_headers(self) -> None:
-        """Find module headers."""
-        data = self.slice(0x290, self.mod_header_size * self.num_modules)
-
-        for i in range(0, self.num_modules):
-            header_start = i * self.mod_header_size
-            header_end = (i + 1) * self.mod_header_size
-            self.mod_headers.append(data[header_start:header_end])
-
-    def resize_partition(self, end_addr: int) -> None:
-        """Resize partition."""
-        spared_blocks = 4
-        if end_addr > 0:
-            end_addr = (end_addr // 0x1000 + 1) * 0x1000
-            end_addr += spared_blocks * 0x1000
-
-            # partition header not added yet
-            # remove  trailing data the same size as the header.
-            end_addr -= MINIFIED_FTPR_OFFSET
-
-            me_size_msg = "The ME minimum size should be {0} "
-            me_size_msg += "bytes ({0:#x} bytes)"
-            print(me_size_msg.format(end_addr))
-            print("Truncating file at {:#x}...".format(end_addr))
-            self.ftpr = self.ftpr[:end_addr]
-
-    def check_and_clean_ftpr(self) -> None:
-        """Check and clean FTPR (factory partition)."""
-        self.num_modules = self.unpack_next_int(0x20)
-        self.find_mod_header_size()
-
-        if self.mod_header_size != 0:
-            self.find_mod_headers()
-
-            # ensure all of the headers begin with b'$MME'
-            if all(hdr.startswith(b"$MME") for hdr in self.mod_headers):
-                end_addr = self.remove_modules()
-                new_offset = self.relocate_partition()
-                end_addr += new_offset
-
-                self.resize_partition(end_addr)
-
-                # flip bit
-                # XXX: I have no idea why this works and passes RSA signiture
-                self.write_ftpr_data(0x39, b"\x00")
-            else:
-                sys.exit(
-                    "Found less modules than expected in the FTPR "
-                    "partition; skipping modules removal and exiting."
-                )
-        else:
-            sys.exit(
-                "Can't find the module header size; skipping modules"
-                "removal and exiting."
-            )
-
-
-##########################################################################
-
-
-def check_partition_signature(f, offset) -> bool:
-    """check_partition_signature copied/shamelessly stolen from me_cleaner."""
-    f.seek(offset)
-    header = f.read(0x80)
-    modulus = int(binascii.hexlify(f.read(0x100)[::-1]), 16)
-    public_exponent = unpack("<I", f.read(4))[0]
-    signature = int(binascii.hexlify(f.read(0x100)[::-1]), 16)
-
-    header_len = unpack("<I", header[0x4:0x8])[0] * 4
-    manifest_len = unpack("<I", header[0x18:0x1C])[0] * 4
-    f.seek(offset + header_len)
-
-    sha256 = hashlib.sha256()
-    sha256.update(header)
-    tmp = f.read(manifest_len - header_len)
-    sha256.update(tmp)
-
-    decrypted_sig = pow(signature, public_exponent, modulus)
-    return "{:#x}".format(decrypted_sig).endswith(sha256.hexdigest())  # FIXME
-
-
-##########################################################################
-
-
-def generate_me_blob(input_file: str, output_file: str) -> None:
-    """Generate ME blob."""
-    print("Starting ME 7.x Update parser.")
-
-    orig_f = open(input_file, "rb")
-    cleaned_ftpr = clean_ftpr(orig_f.read(FTPR_END))
-    orig_f.close()
-
-    fo = open(output_file, "wb")
-    fo.write(generateHeader())
-    fo.write(generateFtpPartition())
-    fo.write(cleaned_ftpr.ftpr)
-    fo.close()
-
-
-def verify_output(output_file: str) -> None:
-    """Verify Generated ME file."""
-    file_verifiy = open(output_file, "rb")
-
-    if check_partition_signature(file_verifiy, MINIFIED_FTPR_OFFSET):
-        print(output_file + " is VALID")
-        file_verifiy.close()
-    else:
-        print(output_file + " is INVALID!!")
-        file_verifiy.close()
-        sys.exit("The FTPR partition signature is not valid.")
-
-
-if __name__ == "__main__":
-    parser = argparse.ArgumentParser(
-        description="Tool to remove as much code "
-        "as possible from Intel ME/TXE 7.x firmware "
-        "update and create paratition for a flashable ME parition."
-    )
-
-
-parser.add_argument("file", help="ME/TXE image or full dump")
-parser.add_argument(
-    "-O",
-    "--output",
-    metavar="output_file",
-    help="save "
-    "save file name other than the default '" + DEFAULT_OUTPUT_FILE_NAME + "'",
-)
-
-args = parser.parse_args()
-
-output_file_name = DEFAULT_OUTPUT_FILE_NAME if not args.output else args.output
-
-# Check if output file exists, ask to overwrite or exit
-if os.path.isfile(output_file_name):
-    input_msg = output_file_name
-    input_msg += " exists.  Do you want to overwrite? [y/N]: "
-    if not str(input(input_msg)).lower().startswith("y"):
-        sys.exit("Not overwriting file.  Exiting.")
-
-generate_me_blob(args.file, output_file_name)
-verify_output(output_file_name)

resources/blobs/sources

@@ -1,24 +0,0 @@
-# This file holds the download sources for various intel blobs
-# board shortnames are listed and enclosed by '{}' followed by an opening
-# and closing '{}' for all blobs available for the board.
-# The board shortname must be the name of the board minus the trailing rom size.
-# If you want to make additions, try to add a backup url for download links and 
-# list hashes as sha1 sums.
-
-{x230 x230t x230i x230edp t430}{
-	ME_hash 039c89c6d44ae11ae2510cbd5fed756e97ed9a31
-	ME_dl https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	ME_bkup_dl https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-}
-
-{x220 x220t t420 t520 t420s}{
-	ME_hash fa0f96c8f36646492fb8c57ad3296bf5f647d9c5
-	ME_dl https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-	ME_bkup_dl https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-}
-
-{t440p w541}{
-	ME_hash b2f2a1baa1f0c8139e46b0d3e206386ff197bed5
-	ME_dl https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-	ME_bkup_dl https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-}

resources/coreboot/cros/blobs.list

@@ -0,0 +1,42 @@
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+3rdparty/chromeec/test/legacy_nvmem_dump.h
+3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+3rdparty/chromeec/third_party/bmi260/accelgyro_bmi260_config_tbin.h
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h

resources/coreboot/cros/patches/0002-Remove-warning-for-coreboot-images-built-without-a-p.patch

@@ -0,0 +1,38 @@
+From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 12 May 2023 19:55:15 -0600
+Subject: [PATCH] Remove warning for coreboot images built without a payload
+
+I added this in upstream to prevent people from accidentally flashing
+roms without a payload resulting in a no boot situation, but in
+libreboot lbmk handles the payload and thus this warning always comes
+up. This has caused confusion and concern so just patch it out.
+---
+ payloads/Makefile.inc | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
+index e735443a76..4f1692a873 100644
+--- a/payloads/Makefile.inc
++++ b/payloads/Makefile.inc
+@@ -49,16 +49,5 @@ distclean-payloads:
+ print-repo-info-payloads:
+ 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
+ 
+-ifeq ($(CONFIG_PAYLOAD_NONE),y)
+-files_added:: warn_no_payload
+-endif
+-
+-warn_no_payload:
+-	printf "\n\t** WARNING **\n"
+-	printf "coreboot has been built without a payload. Writing\n"
+-	printf "a coreboot image without a payload to your board's\n"
+-	printf "flash chip will result in a non-booting system. You\n"
+-	printf "can use cbfstool to add a payload to the image.\n\n"
+-
+ .PHONY: force-payload coreinfo nvramcui
+-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
++.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
+-- 
+2.40.1
+

resources/coreboot/cros/patches/0003-HACK-Disable-coreboot-related-BL31-features.patch

@@ -0,0 +1,28 @@
+From 9f52555eac217623ad2edc72492f9ded6a5b538d Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Thu, 22 Jun 2023 16:44:27 +0300
+Subject: [PATCH] HACK: Disable coreboot related BL31 features
+
+I don't know why, but removing this BL31 make argument lets gru-kevin
+power off properly when shut down from Linux. Needs investigation.
+---
+ src/arch/arm64/Makefile.inc | 3 ---
+ 1 file changed, 3 deletions(-)
+
+diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
+index 6b49743633c3..e1982d92cc5c 100644
+--- a/src/arch/arm64/Makefile.inc
++++ b/src/arch/arm64/Makefile.inc
+@@ -158,9 +158,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
+ # Always enable crash reporting, even on a release build
+ BL31_MAKEARGS += CRASH_REPORTING=1
+ 
+-# Enable coreboot-specific features like CBMEM console support
+-BL31_MAKEARGS += COREBOOT=1
+-
+ # Avoid build/release|build/debug distinction by overriding BUILD_PLAT directly
+ BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
+ 
+-- 
+2.40.1
+

resources/coreboot/cros/patches/0004-crossgcc-cros-also-fix-acpica-downloads-here.patch

@@ -0,0 +1,31 @@
+From a7fb02b80bc4ddae00ce7578054eb35d5c06b57b Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 16 Jul 2023 02:25:23 +0100
+Subject: [PATCH 1/1] crossgcc/cros: also fix acpica downloads here
+
+my last revision said in libreboot/gnuboot it was
+only broken in fam15h boards, but the fix is needed
+here too. i've already put the correct tarball on
+libreboot rsync, for this purpose
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index b25b260807..327297cea3 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -52,7 +52,7 @@ MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
+ MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
+ GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
+ BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
+-IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
++IASL_ARCHIVE="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
+ # CLANG toolchain archive locations
+ LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
+ CLANG_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/clang-${CLANG_VERSION}.src.tar.xz"
+-- 
+2.40.1
+

resources/coreboot/d510mo/board.cfg

@@ -4,3 +4,5 @@ arch="x86_64"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
+microcode_required="n"
+blobs_required="n"

resources/coreboot/d510mo/config/libgfxinit_txtmode

@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
 # CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 CONFIG_VENDOR_INTEL=y
-# CONFIG_VENDOR_JETWAY is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
@@ -107,24 +111,24 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Intel"
 CONFIG_CBFS_SIZE=0x00100000
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_MAX_CPUS=4
-# CONFIG_VBOOT is not set
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_POST_IO=y
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_POST_DEVICE=y
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
-CONFIG_DCACHE_RAM_SIZE=0x4000
+CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
@@ -139,6 +143,9 @@ CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
 # CONFIG_BOARD_INTEL_ADLRVP_M is not set
 # CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
@@ -162,8 +169,6 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_GALILEO is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
 # CONFIG_BOARD_INTEL_KBLRVP3 is not set
@@ -173,6 +178,8 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_KUNIMITSU is not set
 # CONFIG_BOARD_INTEL_LEAFHILL is not set
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -185,10 +192,12 @@ CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,29 +229,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_RAMBASE=0xe00000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x1000
+CONFIG_STACK_SIZE=0x2000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_AZALIA_MAX_CODECS=3
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_UART_PCI_ADDR=0x0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -251,9 +260,8 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 # CPU
 #
 CONFIG_CPU_INTEL_MODEL_106CX=y
-CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
 CONFIG_SOCKET_SPECIFIC_OPTIONS=y
-CONFIG_SSE2=y
+CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
 CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -266,19 +274,19 @@ CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
 # CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-CONFIG_SERIALIZED_SMM_INITIALIZATION=y
-CONFIG_CPU_INFO_V2=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
 CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -289,13 +297,11 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 #
 # Northbridge
 #
-CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
 CONFIG_NORTHBRIDGE_INTEL_PINEVIEW=y
 
 #
 # Southbridge
 #
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -314,10 +320,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
 CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
 
 #
 # Super I/O
@@ -337,17 +343,16 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
-CONFIG_RAMTOP=0x1000000
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_HPET_ADDRESS=0xfed00000
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # end of Chipset
 
 #
@@ -358,6 +363,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
 CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
@@ -375,16 +381,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
 # end of Devices
 
 #
@@ -411,12 +427,17 @@ CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_OPREGION_2_0=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -428,6 +449,12 @@ CONFIG_VGA=y
 # Security
 #
 
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
 #
 # Verified Boot (vboot)
 #
@@ -472,6 +499,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -482,6 +510,8 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
@@ -508,28 +538,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -554,15 +562,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
 # end of Debugging
 
-CONFIG_NO_CBFS_MCACHE=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

resources/coreboot/d510mo_16mb/board.cfg

@@ -5,3 +5,5 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
+microcode_required="n"
+blobs_required="n"

resources/coreboot/d510mo_16mb/config/libgfxinit_txtmode

@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
 # CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 CONFIG_VENDOR_INTEL=y
-# CONFIG_VENDOR_JETWAY is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
@@ -107,24 +111,24 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Intel"
 CONFIG_CBFS_SIZE=0x01000000
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_MAX_CPUS=4
-# CONFIG_VBOOT is not set
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_POST_IO=y
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_POST_DEVICE=y
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
-CONFIG_DCACHE_RAM_SIZE=0x4000
+CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
@@ -139,6 +143,9 @@ CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
 # CONFIG_BOARD_INTEL_ADLRVP_M is not set
 # CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
@@ -162,8 +169,6 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_GALILEO is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
 # CONFIG_BOARD_INTEL_KBLRVP3 is not set
@@ -173,6 +178,8 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_KUNIMITSU is not set
 # CONFIG_BOARD_INTEL_LEAFHILL is not set
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -185,10 +192,12 @@ CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,29 +229,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_RAMBASE=0xe00000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x1000
+CONFIG_STACK_SIZE=0x2000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_AZALIA_MAX_CODECS=3
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_UART_PCI_ADDR=0x0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -251,9 +260,8 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 # CPU
 #
 CONFIG_CPU_INTEL_MODEL_106CX=y
-CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
 CONFIG_SOCKET_SPECIFIC_OPTIONS=y
-CONFIG_SSE2=y
+CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
 CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -266,19 +274,19 @@ CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
 # CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-CONFIG_SERIALIZED_SMM_INITIALIZATION=y
-CONFIG_CPU_INFO_V2=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
 CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -289,13 +297,11 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 #
 # Northbridge
 #
-CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
 CONFIG_NORTHBRIDGE_INTEL_PINEVIEW=y
 
 #
 # Southbridge
 #
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -314,10 +320,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
 CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
 
 #
 # Super I/O
@@ -337,17 +343,16 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
-CONFIG_RAMTOP=0x1000000
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_HPET_ADDRESS=0xfed00000
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # end of Chipset
 
 #
@@ -358,6 +363,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
 CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
@@ -375,16 +381,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
 # end of Devices
 
 #
@@ -411,12 +427,17 @@ CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_OPREGION_2_0=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -428,6 +449,12 @@ CONFIG_VGA=y
 # Security
 #
 
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
 #
 # Verified Boot (vboot)
 #
@@ -472,6 +499,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -482,6 +510,8 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
@@ -508,28 +538,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -554,15 +562,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
 # end of Debugging
 
-CONFIG_NO_CBFS_MCACHE=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

resources/coreboot/d945gclf_16mb/board.cfg

@@ -1,7 +0,0 @@
-cbtree="default"
-romtype="normal"
-arch="x86_32"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"

resources/coreboot/daisy_snow/board.cfg

@@ -1,4 +0,0 @@
-cbtree="cros"
-romtype="normal"
-arch="ARMv7"
-payload_uboot="y"

resources/coreboot/daisy_snow/config/libgfxinit_corebootfb

@@ -1,849 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_COMPRESS_PRERAM_STAGES=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-# CONFIG_COLLECT_TIMESTAMPS is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_CBMEM_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-CONFIG_VENDOR_GOOGLE=y
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="Daisy"
-CONFIG_MAINBOARD_DIR="google/daisy"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Google"
-CONFIG_CBFS_SIZE=0x00400000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=2
-CONFIG_POST_DEVICE=y
-CONFIG_UART_FOR_CONSOLE=3
-# CONFIG_VBOOT is not set
-# CONFIG_CHROMEOS is not set
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_DRAM_SIZE_MB=2048
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/soc/samsung/exynos5250/memlayout.ld"
-
-#
-# Asurada
-#
-# CONFIG_BOARD_GOOGLE_ASURADA is not set
-# CONFIG_BOARD_GOOGLE_HAYATO is not set
-# CONFIG_BOARD_GOOGLE_SPHERION is not set
-
-#
-# Auron
-#
-# CONFIG_BOARD_GOOGLE_AURON_PAINE is not set
-# CONFIG_BOARD_GOOGLE_AURON_YUNA is not set
-# CONFIG_BOARD_GOOGLE_BUDDY is not set
-# CONFIG_BOARD_GOOGLE_GANDOF is not set
-# CONFIG_BOARD_GOOGLE_LULU is not set
-# CONFIG_BOARD_GOOGLE_SAMUS is not set
-
-#
-# Beltino
-#
-# CONFIG_BOARD_GOOGLE_MCCLOUD is not set
-# CONFIG_BOARD_GOOGLE_MONROE is not set
-# CONFIG_BOARD_GOOGLE_PANTHER is not set
-# CONFIG_BOARD_GOOGLE_TRICKY is not set
-# CONFIG_BOARD_GOOGLE_ZAKO is not set
-
-#
-# Brya
-#
-# CONFIG_BOARD_GOOGLE_AGAH is not set
-# CONFIG_BOARD_GOOGLE_ANAHERA is not set
-# CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
-# CONFIG_BOARD_GOOGLE_BRASK is not set
-# CONFIG_BOARD_GOOGLE_BRYA0 is not set
-# CONFIG_BOARD_GOOGLE_BRYA4ES is not set
-# CONFIG_BOARD_GOOGLE_FELWINTER is not set
-# CONFIG_BOARD_GOOGLE_GIMBLE is not set
-# CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
-# CONFIG_BOARD_GOOGLE_KANO is not set
-# CONFIG_BOARD_GOOGLE_NIVVIKS is not set
-# CONFIG_BOARD_GOOGLE_NEREID is not set
-# CONFIG_BOARD_GOOGLE_PRIMUS is not set
-# CONFIG_BOARD_GOOGLE_PRIMUS4ES is not set
-# CONFIG_BOARD_GOOGLE_REDRIX is not set
-# CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
-# CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
-# CONFIG_BOARD_GOOGLE_TAEKO is not set
-# CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
-# CONFIG_BOARD_GOOGLE_TANIKS is not set
-# CONFIG_BOARD_GOOGLE_VELL is not set
-# CONFIG_BOARD_GOOGLE_VOLMAR is not set
-# CONFIG_BOARD_GOOGLE_BANSHEE is not set
-# CONFIG_BOARD_GOOGLE_CROTA is not set
-# CONFIG_BOARD_GOOGLE_MOLI is not set
-# CONFIG_BOARD_GOOGLE_KINOX is not set
-# CONFIG_BOARD_GOOGLE_CRAASK is not set
-# CONFIG_BOARD_GOOGLE_OSIRIS is not set
-# CONFIG_BOARD_GOOGLE_MITHRAX is not set
-# CONFIG_BOARD_GOOGLE_KULDAX is not set
-
-#
-# Butterfly
-#
-# CONFIG_BOARD_GOOGLE_BUTTERFLY is not set
-
-#
-# Cherry
-#
-# CONFIG_BOARD_GOOGLE_CHERRY is not set
-# CONFIG_BOARD_GOOGLE_DOJO is not set
-# CONFIG_BOARD_GOOGLE_TOMATO is not set
-
-#
-# Kingler
-#
-# CONFIG_BOARD_GOOGLE_KINGLER is not set
-# CONFIG_BOARD_GOOGLE_STEELIX is not set
-
-#
-# Krabby
-#
-# CONFIG_BOARD_GOOGLE_KRABBY is not set
-
-#
-# Cyan
-#
-# CONFIG_BOARD_GOOGLE_BANON is not set
-# CONFIG_BOARD_GOOGLE_CELES is not set
-# CONFIG_BOARD_GOOGLE_CYAN is not set
-# CONFIG_BOARD_GOOGLE_EDGAR is not set
-# CONFIG_BOARD_GOOGLE_KEFKA is not set
-# CONFIG_BOARD_GOOGLE_REKS is not set
-# CONFIG_BOARD_GOOGLE_RELM is not set
-# CONFIG_BOARD_GOOGLE_SETZER is not set
-# CONFIG_BOARD_GOOGLE_TERRA is not set
-# CONFIG_BOARD_GOOGLE_ULTIMA is not set
-# CONFIG_BOARD_GOOGLE_WIZPIG is not set
-
-#
-# Daisy
-#
-CONFIG_BOARD_GOOGLE_DAISY=y
-
-#
-# Dedede
-#
-# CONFIG_BOARD_GOOGLE_BOTEN is not set
-# CONFIG_BOARD_GOOGLE_DEDEDE is not set
-# CONFIG_BOARD_GOOGLE_DRAWCIA is not set
-# CONFIG_BOARD_GOOGLE_HABOKI is not set
-# CONFIG_BOARD_GOOGLE_MADOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
-# CONFIG_BOARD_GOOGLE_LALALA is not set
-# CONFIG_BOARD_GOOGLE_MAGOLOR is not set
-# CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
-# CONFIG_BOARD_GOOGLE_LANTIS is not set
-# CONFIG_BOARD_GOOGLE_GALTIC is not set
-# CONFIG_BOARD_GOOGLE_SASUKE is not set
-# CONFIG_BOARD_GOOGLE_STORO is not set
-# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
-# CONFIG_BOARD_GOOGLE_KRACKO is not set
-# CONFIG_BOARD_GOOGLE_BLIPPER is not set
-# CONFIG_BOARD_GOOGLE_CRET is not set
-# CONFIG_BOARD_GOOGLE_PIRIKA is not set
-# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
-# CONFIG_BOARD_GOOGLE_BUGZZY is not set
-# CONFIG_BOARD_GOOGLE_CORORI is not set
-# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
-# CONFIG_BOARD_GOOGLE_GOOEY is not set
-# CONFIG_BOARD_GOOGLE_BEADRIX is not set
-
-#
-# Drallion
-#
-# CONFIG_BOARD_GOOGLE_DRALLION is not set
-
-#
-# Eve
-#
-# CONFIG_BOARD_GOOGLE_EVE is not set
-
-#
-# Fizz
-#
-# CONFIG_BOARD_GOOGLE_FIZZ is not set
-# CONFIG_BOARD_GOOGLE_KARMA is not set
-# CONFIG_BOARD_GOOGLE_ENDEAVOUR is not set
-
-#
-# Foster
-#
-# CONFIG_BOARD_GOOGLE_FOSTER is not set
-
-#
-# Gale
-#
-# CONFIG_BOARD_GOOGLE_GALE is not set
-
-#
-# Glados
-#
-# CONFIG_BOARD_GOOGLE_ASUKA is not set
-# CONFIG_BOARD_GOOGLE_CAROLINE is not set
-# CONFIG_BOARD_GOOGLE_CAVE is not set
-# CONFIG_BOARD_GOOGLE_CHELL is not set
-# CONFIG_BOARD_GOOGLE_GLADOS is not set
-# CONFIG_BOARD_GOOGLE_LARS is not set
-# CONFIG_BOARD_GOOGLE_SENTRY is not set
-
-#
-# Gru
-#
-# CONFIG_BOARD_GOOGLE_KEVIN is not set
-# CONFIG_BOARD_GOOGLE_GRU is not set
-# CONFIG_BOARD_GOOGLE_BOB is not set
-# CONFIG_BOARD_GOOGLE_SCARLET is not set
-# CONFIG_BOARD_GOOGLE_NEFARIO is not set
-# CONFIG_BOARD_GOOGLE_RAINIER is not set
-
-#
-# Guybrush
-#
-# CONFIG_BOARD_GOOGLE_GUYBRUSH is not set
-# CONFIG_BOARD_GOOGLE_NIPPERKIN is not set
-# CONFIG_BOARD_GOOGLE_DEWATT is not set
-
-#
-# Hatch
-#
-# CONFIG_BOARD_GOOGLE_AKEMI is not set
-# CONFIG_BOARD_GOOGLE_AMBASSADOR is not set
-# CONFIG_BOARD_GOOGLE_DOOLY is not set
-# CONFIG_BOARD_GOOGLE_DRATINI is not set
-# CONFIG_BOARD_GOOGLE_DUFFY_LEGACY is not set
-# CONFIG_BOARD_GOOGLE_DUFFY is not set
-# CONFIG_BOARD_GOOGLE_FAFFY is not set
-# CONFIG_BOARD_GOOGLE_GENESIS is not set
-# CONFIG_BOARD_GOOGLE_HATCH is not set
-# CONFIG_BOARD_GOOGLE_HELIOS is not set
-# CONFIG_BOARD_GOOGLE_HELIOS_DISKSWAP is not set
-# CONFIG_BOARD_GOOGLE_JINLON is not set
-# CONFIG_BOARD_GOOGLE_KAISA_LEGACY is not set
-# CONFIG_BOARD_GOOGLE_KAISA is not set
-# CONFIG_BOARD_GOOGLE_KINDRED is not set
-# CONFIG_BOARD_GOOGLE_KOHAKU is not set
-# CONFIG_BOARD_GOOGLE_MOONBUGGY is not set
-# CONFIG_BOARD_GOOGLE_MUSHU is not set
-# CONFIG_BOARD_GOOGLE_NIGHTFURY is not set
-# CONFIG_BOARD_GOOGLE_NOIBAT is not set
-# CONFIG_BOARD_GOOGLE_PALKIA is not set
-# CONFIG_BOARD_GOOGLE_PUFF is not set
-# CONFIG_BOARD_GOOGLE_SCOUT is not set
-# CONFIG_BOARD_GOOGLE_WYVERN is not set
-
-#
-# Herobrine
-#
-
-#
-# (Herobrine requires 'Allow QC blobs repository')
-#
-
-#
-# Jecht
-#
-# CONFIG_BOARD_GOOGLE_GUADO is not set
-# CONFIG_BOARD_GOOGLE_JECHT is not set
-# CONFIG_BOARD_GOOGLE_RIKKU is not set
-# CONFIG_BOARD_GOOGLE_TIDUS is not set
-
-#
-# Kahlee
-#
-# CONFIG_BOARD_GOOGLE_ALEENA is not set
-# CONFIG_BOARD_GOOGLE_CAREENA is not set
-# CONFIG_BOARD_GOOGLE_GRUNT is not set
-# CONFIG_BOARD_GOOGLE_LIARA is not set
-# CONFIG_BOARD_GOOGLE_NUWANI is not set
-# CONFIG_BOARD_GOOGLE_TREEYA is not set
-
-#
-# Kukui
-#
-# CONFIG_BOARD_GOOGLE_KUKUI is not set
-# CONFIG_BOARD_GOOGLE_KRANE is not set
-# CONFIG_BOARD_GOOGLE_KODAMA is not set
-# CONFIG_BOARD_GOOGLE_KAKADU is not set
-# CONFIG_BOARD_GOOGLE_FLAPJACK is not set
-# CONFIG_BOARD_GOOGLE_KATSU is not set
-
-#
-# Jacuzzi
-#
-# CONFIG_BOARD_GOOGLE_JACUZZI is not set
-# CONFIG_BOARD_GOOGLE_JUNIPER is not set
-# CONFIG_BOARD_GOOGLE_KAPPA is not set
-# CONFIG_BOARD_GOOGLE_DAMU is not set
-# CONFIG_BOARD_GOOGLE_CERISE is not set
-# CONFIG_BOARD_GOOGLE_STERN is not set
-# CONFIG_BOARD_GOOGLE_WILLOW is not set
-# CONFIG_BOARD_GOOGLE_ESCHE is not set
-# CONFIG_BOARD_GOOGLE_BURNET is not set
-# CONFIG_BOARD_GOOGLE_FENNEL is not set
-# CONFIG_BOARD_GOOGLE_COZMO is not set
-# CONFIG_BOARD_GOOGLE_MAKOMO is not set
-# CONFIG_BOARD_GOOGLE_MUNNA is not set
-# CONFIG_BOARD_GOOGLE_PICO is not set
-
-#
-# Link
-#
-# CONFIG_BOARD_GOOGLE_LINK is not set
-
-#
-# Mistral
-#
-# CONFIG_BOARD_GOOGLE_MISTRAL is not set
-
-#
-# Nyan
-#
-# CONFIG_BOARD_GOOGLE_NYAN is not set
-
-#
-# Nyan Big
-#
-# CONFIG_BOARD_GOOGLE_NYAN_BIG is not set
-
-#
-# Nyan Blaze
-#
-# CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set
-
-#
-# Oak
-#
-# CONFIG_BOARD_GOOGLE_OAK is not set
-# CONFIG_BOARD_GOOGLE_ELM is not set
-# CONFIG_BOARD_GOOGLE_HANA is not set
-
-#
-# Octopus
-#
-# CONFIG_BOARD_GOOGLE_AMPTON is not set
-# CONFIG_BOARD_GOOGLE_BLOOG is not set
-# CONFIG_BOARD_GOOGLE_BOBBA is not set
-# CONFIG_BOARD_GOOGLE_CASTA is not set
-# CONFIG_BOARD_GOOGLE_DOOD is not set
-# CONFIG_BOARD_GOOGLE_FLEEX is not set
-# CONFIG_BOARD_GOOGLE_FOOB is not set
-# CONFIG_BOARD_GOOGLE_GARG is not set
-# CONFIG_BOARD_GOOGLE_LICK is not set
-# CONFIG_BOARD_GOOGLE_MEEP is not set
-# CONFIG_BOARD_GOOGLE_OCTOPUS is not set
-# CONFIG_BOARD_GOOGLE_PHASER is not set
-# CONFIG_BOARD_GOOGLE_YORP is not set
-
-#
-# Parrot
-#
-# CONFIG_BOARD_GOOGLE_PARROT is not set
-
-#
-# Peach Pit
-#
-# CONFIG_BOARD_GOOGLE_PEACH_PIT is not set
-
-#
-# Poppy
-#
-# CONFIG_BOARD_GOOGLE_ATLAS is not set
-# CONFIG_BOARD_GOOGLE_POPPY is not set
-# CONFIG_BOARD_GOOGLE_NAMI is not set
-# CONFIG_BOARD_GOOGLE_NAUTILUS is not set
-# CONFIG_BOARD_GOOGLE_NOCTURNE is not set
-# CONFIG_BOARD_GOOGLE_RAMMUS is not set
-# CONFIG_BOARD_GOOGLE_SORAKA is not set
-
-#
-# Rambi
-#
-# CONFIG_BOARD_GOOGLE_BANJO is not set
-# CONFIG_BOARD_GOOGLE_CANDY is not set
-# CONFIG_BOARD_GOOGLE_CLAPPER is not set
-# CONFIG_BOARD_GOOGLE_ENGUARDE is not set
-# CONFIG_BOARD_GOOGLE_GLIMMER is not set
-# CONFIG_BOARD_GOOGLE_GNAWTY is not set
-# CONFIG_BOARD_GOOGLE_HELI is not set
-# CONFIG_BOARD_GOOGLE_KIP is not set
-# CONFIG_BOARD_GOOGLE_NINJA is not set
-# CONFIG_BOARD_GOOGLE_ORCO is not set
-# CONFIG_BOARD_GOOGLE_QUAWKS is not set
-# CONFIG_BOARD_GOOGLE_SQUAWKS is not set
-# CONFIG_BOARD_GOOGLE_RAMBI is not set
-# CONFIG_BOARD_GOOGLE_SUMO is not set
-# CONFIG_BOARD_GOOGLE_SWANKY is not set
-# CONFIG_BOARD_GOOGLE_WINKY is not set
-
-#
-# Reef
-#
-# CONFIG_BOARD_GOOGLE_REEF is not set
-# CONFIG_BOARD_GOOGLE_PYRO is not set
-# CONFIG_BOARD_GOOGLE_SAND is not set
-# CONFIG_BOARD_GOOGLE_SNAPPY is not set
-# CONFIG_BOARD_GOOGLE_CORAL is not set
-
-#
-# Sarien
-#
-# CONFIG_BOARD_GOOGLE_ARCADA is not set
-# CONFIG_BOARD_GOOGLE_SARIEN is not set
-
-#
-# Skyrim
-#
-# CONFIG_BOARD_GOOGLE_SKYRIM is not set
-
-#
-# Slippy
-#
-# CONFIG_BOARD_GOOGLE_FALCO is not set
-# CONFIG_BOARD_GOOGLE_LEON is not set
-# CONFIG_BOARD_GOOGLE_PEPPY is not set
-# CONFIG_BOARD_GOOGLE_WOLF is not set
-
-#
-# Smaug
-#
-# CONFIG_BOARD_GOOGLE_SMAUG is not set
-
-#
-# Storm
-#
-# CONFIG_BOARD_GOOGLE_STORM is not set
-
-#
-# Stout
-#
-# CONFIG_BOARD_GOOGLE_STOUT is not set
-
-#
-# Trogdor
-#
-
-#
-# (Trogdor requires 'Allow QC blobs repository')
-#
-
-#
-# Veyron
-#
-# CONFIG_BOARD_GOOGLE_VEYRON_JAQ is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_JERRY is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_MIGHTY is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_MINNIE is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY is not set
-
-#
-# Veyron Mickey
-#
-# CONFIG_BOARD_GOOGLE_VEYRON_MICKEY is not set
-
-#
-# Veyron Rialto
-#
-# CONFIG_BOARD_GOOGLE_VEYRON_RIALTO is not set
-
-#
-# Volteer
-#
-# CONFIG_BOARD_GOOGLE_DELBIN is not set
-# CONFIG_BOARD_GOOGLE_ELDRID is not set
-# CONFIG_BOARD_GOOGLE_HALVOR is not set
-# CONFIG_BOARD_GOOGLE_LINDAR is not set
-# CONFIG_BOARD_GOOGLE_MALEFOR is not set
-# CONFIG_BOARD_GOOGLE_TERRADOR is not set
-# CONFIG_BOARD_GOOGLE_TODOR is not set
-# CONFIG_BOARD_GOOGLE_TRONDO is not set
-# CONFIG_BOARD_GOOGLE_VOLTEER is not set
-# CONFIG_BOARD_GOOGLE_VOLTEER2 is not set
-# CONFIG_BOARD_GOOGLE_VOLTEER2_TI50 is not set
-# CONFIG_BOARD_GOOGLE_VOXEL is not set
-# CONFIG_BOARD_GOOGLE_ELEMI is not set
-# CONFIG_BOARD_GOOGLE_VOEMA is not set
-# CONFIG_BOARD_GOOGLE_DROBIT is not set
-# CONFIG_BOARD_GOOGLE_COPANO is not set
-# CONFIG_BOARD_GOOGLE_COLLIS is not set
-# CONFIG_BOARD_GOOGLE_VOLET is not set
-# CONFIG_BOARD_GOOGLE_CHRONICLER is not set
-
-#
-# Zork
-#
-# CONFIG_BOARD_GOOGLE_DALBOZ is not set
-# CONFIG_BOARD_GOOGLE_VILBOZ is not set
-# CONFIG_BOARD_GOOGLE_EZKINIL is not set
-# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
-# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
-# CONFIG_BOARD_GOOGLE_BERKNIP is not set
-# CONFIG_BOARD_GOOGLE_WOOMAX is not set
-# CONFIG_BOARD_GOOGLE_DIRINBOZ is not set
-# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
-# CONFIG_BOARD_GOOGLE_GUMBOZ is not set
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_DRIVER_TPM_I2C_BUS=0x9
-CONFIG_DRIVER_TPM_I2C_ADDR=0x2
-CONFIG_EC_GOOGLE_CHROMEEC_I2C_BUS=0x4
-CONFIG_PMIC_BUS=0
-CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_HEAP_SIZE=0x4000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_BOARD_ROMSIZE_KB_4096=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_4096=y
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=4096
-CONFIG_ROM_SIZE=0x00400000
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x0
-CONFIG_VBT_DATA_SIZE_KB=8
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_TTYS0_BASE=0x2e8
-CONFIG_UART_PCI_ADDR=0x0
-CONFIG_GENERIC_UDELAY=y
-CONFIG_CPU_SAMSUNG_EXYNOS5250=y
-
-#
-# CPU
-#
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_SUPPORTS_DPTF_TEVT=y
-CONFIG_EC_GOOGLE_CHROMEEC=y
-CONFIG_EC_GOOGLE_CHROMEEC_I2C=y
-CONFIG_EC_GOOGLE_CHROMEEC_I2C_CHIP=0x1e
-# CONFIG_EC_GOOGLE_CHROMEEC_RTC is not set
-CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
-CONFIG_MAINBOARD_HAS_CHROMEOS=y
-
-#
-# ChromeOS
-#
-# end of ChromeOS
-
-CONFIG_ARCH_ARM=y
-CONFIG_ARCH_BOOTBLOCK_ARM=y
-CONFIG_ARCH_VERSTAGE_ARM=y
-CONFIG_ARCH_ROMSTAGE_ARM=y
-CONFIG_ARCH_RAMSTAGE_ARM=y
-CONFIG_ARCH_BOOTBLOCK_ARMV7=y
-CONFIG_ARCH_VERSTAGE_ARMV7=y
-CONFIG_ARCH_ROMSTAGE_ARMV7=y
-CONFIG_ARCH_RAMSTAGE_ARMV7=y
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-
-#
-# Display
-#
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATOR_V4=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-CONFIG_TPM_INIT_RAMSTAGE=y
-CONFIG_DRIVERS_UART=y
-CONFIG_HAVE_UART_SPECIAL=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_I2C_TPM=y
-CONFIG_DRIVER_TIS_DEFAULT=y
-# CONFIG_DRIVER_I2C_TPM_ACPI is not set
-# CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES is not set
-CONFIG_INTEL_GMA_OPREGION_2_0=y
-CONFIG_DRIVER_MAXIM_MAX77686=y
-CONFIG_DRIVER_TI_TPS65090=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_MEASURED_BOOT is not set
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-# end of Memory initialization
-
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-
-#
-# device-specific UART
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_POST_DEVICE_NONE=y
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_MONOTONIC_TIMER=y
-
-#
-# System tables
-#
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_FIT is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUX is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PAYLOAD_FIT_SUPPORT is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# end of Debugging
-
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_NO_XIP_EARLY_STAGES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y

resources/coreboot/daisy_spring/board.cfg

@@ -1,4 +0,0 @@
-cbtree="cros"
-romtype="normal"
-arch="ARMv7"
-payload_uboot="y"

resources/coreboot/daisy_spring/config/libgfxinit_corebootfb

@@ -1,849 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_COMPRESS_PRERAM_STAGES=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-# CONFIG_COLLECT_TIMESTAMPS is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_CBMEM_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-CONFIG_VENDOR_GOOGLE=y
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="Daisy"
-CONFIG_MAINBOARD_DIR="google/daisy"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Google"
-CONFIG_CBFS_SIZE=0x00400000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=2
-CONFIG_POST_DEVICE=y
-CONFIG_UART_FOR_CONSOLE=3
-# CONFIG_VBOOT is not set
-# CONFIG_CHROMEOS is not set
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_DRAM_SIZE_MB=2048
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/soc/samsung/exynos5250/memlayout.ld"
-
-#
-# Asurada
-#
-# CONFIG_BOARD_GOOGLE_ASURADA is not set
-# CONFIG_BOARD_GOOGLE_HAYATO is not set
-# CONFIG_BOARD_GOOGLE_SPHERION is not set
-
-#
-# Auron
-#
-# CONFIG_BOARD_GOOGLE_AURON_PAINE is not set
-# CONFIG_BOARD_GOOGLE_AURON_YUNA is not set
-# CONFIG_BOARD_GOOGLE_BUDDY is not set
-# CONFIG_BOARD_GOOGLE_GANDOF is not set
-# CONFIG_BOARD_GOOGLE_LULU is not set
-# CONFIG_BOARD_GOOGLE_SAMUS is not set
-
-#
-# Beltino
-#
-# CONFIG_BOARD_GOOGLE_MCCLOUD is not set
-# CONFIG_BOARD_GOOGLE_MONROE is not set
-# CONFIG_BOARD_GOOGLE_PANTHER is not set
-# CONFIG_BOARD_GOOGLE_TRICKY is not set
-# CONFIG_BOARD_GOOGLE_ZAKO is not set
-
-#
-# Brya
-#
-# CONFIG_BOARD_GOOGLE_AGAH is not set
-# CONFIG_BOARD_GOOGLE_ANAHERA is not set
-# CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
-# CONFIG_BOARD_GOOGLE_BRASK is not set
-# CONFIG_BOARD_GOOGLE_BRYA0 is not set
-# CONFIG_BOARD_GOOGLE_BRYA4ES is not set
-# CONFIG_BOARD_GOOGLE_FELWINTER is not set
-# CONFIG_BOARD_GOOGLE_GIMBLE is not set
-# CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
-# CONFIG_BOARD_GOOGLE_KANO is not set
-# CONFIG_BOARD_GOOGLE_NIVVIKS is not set
-# CONFIG_BOARD_GOOGLE_NEREID is not set
-# CONFIG_BOARD_GOOGLE_PRIMUS is not set
-# CONFIG_BOARD_GOOGLE_PRIMUS4ES is not set
-# CONFIG_BOARD_GOOGLE_REDRIX is not set
-# CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
-# CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
-# CONFIG_BOARD_GOOGLE_TAEKO is not set
-# CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
-# CONFIG_BOARD_GOOGLE_TANIKS is not set
-# CONFIG_BOARD_GOOGLE_VELL is not set
-# CONFIG_BOARD_GOOGLE_VOLMAR is not set
-# CONFIG_BOARD_GOOGLE_BANSHEE is not set
-# CONFIG_BOARD_GOOGLE_CROTA is not set
-# CONFIG_BOARD_GOOGLE_MOLI is not set
-# CONFIG_BOARD_GOOGLE_KINOX is not set
-# CONFIG_BOARD_GOOGLE_CRAASK is not set
-# CONFIG_BOARD_GOOGLE_OSIRIS is not set
-# CONFIG_BOARD_GOOGLE_MITHRAX is not set
-# CONFIG_BOARD_GOOGLE_KULDAX is not set
-
-#
-# Butterfly
-#
-# CONFIG_BOARD_GOOGLE_BUTTERFLY is not set
-
-#
-# Cherry
-#
-# CONFIG_BOARD_GOOGLE_CHERRY is not set
-# CONFIG_BOARD_GOOGLE_DOJO is not set
-# CONFIG_BOARD_GOOGLE_TOMATO is not set
-
-#
-# Kingler
-#
-# CONFIG_BOARD_GOOGLE_KINGLER is not set
-# CONFIG_BOARD_GOOGLE_STEELIX is not set
-
-#
-# Krabby
-#
-# CONFIG_BOARD_GOOGLE_KRABBY is not set
-
-#
-# Cyan
-#
-# CONFIG_BOARD_GOOGLE_BANON is not set
-# CONFIG_BOARD_GOOGLE_CELES is not set
-# CONFIG_BOARD_GOOGLE_CYAN is not set
-# CONFIG_BOARD_GOOGLE_EDGAR is not set
-# CONFIG_BOARD_GOOGLE_KEFKA is not set
-# CONFIG_BOARD_GOOGLE_REKS is not set
-# CONFIG_BOARD_GOOGLE_RELM is not set
-# CONFIG_BOARD_GOOGLE_SETZER is not set
-# CONFIG_BOARD_GOOGLE_TERRA is not set
-# CONFIG_BOARD_GOOGLE_ULTIMA is not set
-# CONFIG_BOARD_GOOGLE_WIZPIG is not set
-
-#
-# Daisy
-#
-CONFIG_BOARD_GOOGLE_DAISY=y
-
-#
-# Dedede
-#
-# CONFIG_BOARD_GOOGLE_BOTEN is not set
-# CONFIG_BOARD_GOOGLE_DEDEDE is not set
-# CONFIG_BOARD_GOOGLE_DRAWCIA is not set
-# CONFIG_BOARD_GOOGLE_HABOKI is not set
-# CONFIG_BOARD_GOOGLE_MADOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
-# CONFIG_BOARD_GOOGLE_LALALA is not set
-# CONFIG_BOARD_GOOGLE_MAGOLOR is not set
-# CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
-# CONFIG_BOARD_GOOGLE_LANTIS is not set
-# CONFIG_BOARD_GOOGLE_GALTIC is not set
-# CONFIG_BOARD_GOOGLE_SASUKE is not set
-# CONFIG_BOARD_GOOGLE_STORO is not set
-# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
-# CONFIG_BOARD_GOOGLE_KRACKO is not set
-# CONFIG_BOARD_GOOGLE_BLIPPER is not set
-# CONFIG_BOARD_GOOGLE_CRET is not set
-# CONFIG_BOARD_GOOGLE_PIRIKA is not set
-# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
-# CONFIG_BOARD_GOOGLE_BUGZZY is not set
-# CONFIG_BOARD_GOOGLE_CORORI is not set
-# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
-# CONFIG_BOARD_GOOGLE_GOOEY is not set
-# CONFIG_BOARD_GOOGLE_BEADRIX is not set
-
-#
-# Drallion
-#
-# CONFIG_BOARD_GOOGLE_DRALLION is not set
-
-#
-# Eve
-#
-# CONFIG_BOARD_GOOGLE_EVE is not set
-
-#
-# Fizz
-#
-# CONFIG_BOARD_GOOGLE_FIZZ is not set
-# CONFIG_BOARD_GOOGLE_KARMA is not set
-# CONFIG_BOARD_GOOGLE_ENDEAVOUR is not set
-
-#
-# Foster
-#
-# CONFIG_BOARD_GOOGLE_FOSTER is not set
-
-#
-# Gale
-#
-# CONFIG_BOARD_GOOGLE_GALE is not set
-
-#
-# Glados
-#
-# CONFIG_BOARD_GOOGLE_ASUKA is not set
-# CONFIG_BOARD_GOOGLE_CAROLINE is not set
-# CONFIG_BOARD_GOOGLE_CAVE is not set
-# CONFIG_BOARD_GOOGLE_CHELL is not set
-# CONFIG_BOARD_GOOGLE_GLADOS is not set
-# CONFIG_BOARD_GOOGLE_LARS is not set
-# CONFIG_BOARD_GOOGLE_SENTRY is not set
-
-#
-# Gru
-#
-# CONFIG_BOARD_GOOGLE_KEVIN is not set
-# CONFIG_BOARD_GOOGLE_GRU is not set
-# CONFIG_BOARD_GOOGLE_BOB is not set
-# CONFIG_BOARD_GOOGLE_SCARLET is not set
-# CONFIG_BOARD_GOOGLE_NEFARIO is not set
-# CONFIG_BOARD_GOOGLE_RAINIER is not set
-
-#
-# Guybrush
-#
-# CONFIG_BOARD_GOOGLE_GUYBRUSH is not set
-# CONFIG_BOARD_GOOGLE_NIPPERKIN is not set
-# CONFIG_BOARD_GOOGLE_DEWATT is not set
-
-#
-# Hatch
-#
-# CONFIG_BOARD_GOOGLE_AKEMI is not set
-# CONFIG_BOARD_GOOGLE_AMBASSADOR is not set
-# CONFIG_BOARD_GOOGLE_DOOLY is not set
-# CONFIG_BOARD_GOOGLE_DRATINI is not set
-# CONFIG_BOARD_GOOGLE_DUFFY_LEGACY is not set
-# CONFIG_BOARD_GOOGLE_DUFFY is not set
-# CONFIG_BOARD_GOOGLE_FAFFY is not set
-# CONFIG_BOARD_GOOGLE_GENESIS is not set
-# CONFIG_BOARD_GOOGLE_HATCH is not set
-# CONFIG_BOARD_GOOGLE_HELIOS is not set
-# CONFIG_BOARD_GOOGLE_HELIOS_DISKSWAP is not set
-# CONFIG_BOARD_GOOGLE_JINLON is not set
-# CONFIG_BOARD_GOOGLE_KAISA_LEGACY is not set
-# CONFIG_BOARD_GOOGLE_KAISA is not set
-# CONFIG_BOARD_GOOGLE_KINDRED is not set
-# CONFIG_BOARD_GOOGLE_KOHAKU is not set
-# CONFIG_BOARD_GOOGLE_MOONBUGGY is not set
-# CONFIG_BOARD_GOOGLE_MUSHU is not set
-# CONFIG_BOARD_GOOGLE_NIGHTFURY is not set
-# CONFIG_BOARD_GOOGLE_NOIBAT is not set
-# CONFIG_BOARD_GOOGLE_PALKIA is not set
-# CONFIG_BOARD_GOOGLE_PUFF is not set
-# CONFIG_BOARD_GOOGLE_SCOUT is not set
-# CONFIG_BOARD_GOOGLE_WYVERN is not set
-
-#
-# Herobrine
-#
-
-#
-# (Herobrine requires 'Allow QC blobs repository')
-#
-
-#
-# Jecht
-#
-# CONFIG_BOARD_GOOGLE_GUADO is not set
-# CONFIG_BOARD_GOOGLE_JECHT is not set
-# CONFIG_BOARD_GOOGLE_RIKKU is not set
-# CONFIG_BOARD_GOOGLE_TIDUS is not set
-
-#
-# Kahlee
-#
-# CONFIG_BOARD_GOOGLE_ALEENA is not set
-# CONFIG_BOARD_GOOGLE_CAREENA is not set
-# CONFIG_BOARD_GOOGLE_GRUNT is not set
-# CONFIG_BOARD_GOOGLE_LIARA is not set
-# CONFIG_BOARD_GOOGLE_NUWANI is not set
-# CONFIG_BOARD_GOOGLE_TREEYA is not set
-
-#
-# Kukui
-#
-# CONFIG_BOARD_GOOGLE_KUKUI is not set
-# CONFIG_BOARD_GOOGLE_KRANE is not set
-# CONFIG_BOARD_GOOGLE_KODAMA is not set
-# CONFIG_BOARD_GOOGLE_KAKADU is not set
-# CONFIG_BOARD_GOOGLE_FLAPJACK is not set
-# CONFIG_BOARD_GOOGLE_KATSU is not set
-
-#
-# Jacuzzi
-#
-# CONFIG_BOARD_GOOGLE_JACUZZI is not set
-# CONFIG_BOARD_GOOGLE_JUNIPER is not set
-# CONFIG_BOARD_GOOGLE_KAPPA is not set
-# CONFIG_BOARD_GOOGLE_DAMU is not set
-# CONFIG_BOARD_GOOGLE_CERISE is not set
-# CONFIG_BOARD_GOOGLE_STERN is not set
-# CONFIG_BOARD_GOOGLE_WILLOW is not set
-# CONFIG_BOARD_GOOGLE_ESCHE is not set
-# CONFIG_BOARD_GOOGLE_BURNET is not set
-# CONFIG_BOARD_GOOGLE_FENNEL is not set
-# CONFIG_BOARD_GOOGLE_COZMO is not set
-# CONFIG_BOARD_GOOGLE_MAKOMO is not set
-# CONFIG_BOARD_GOOGLE_MUNNA is not set
-# CONFIG_BOARD_GOOGLE_PICO is not set
-
-#
-# Link
-#
-# CONFIG_BOARD_GOOGLE_LINK is not set
-
-#
-# Mistral
-#
-# CONFIG_BOARD_GOOGLE_MISTRAL is not set
-
-#
-# Nyan
-#
-# CONFIG_BOARD_GOOGLE_NYAN is not set
-
-#
-# Nyan Big
-#
-# CONFIG_BOARD_GOOGLE_NYAN_BIG is not set
-
-#
-# Nyan Blaze
-#
-# CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set
-
-#
-# Oak
-#
-# CONFIG_BOARD_GOOGLE_OAK is not set
-# CONFIG_BOARD_GOOGLE_ELM is not set
-# CONFIG_BOARD_GOOGLE_HANA is not set
-
-#
-# Octopus
-#
-# CONFIG_BOARD_GOOGLE_AMPTON is not set
-# CONFIG_BOARD_GOOGLE_BLOOG is not set
-# CONFIG_BOARD_GOOGLE_BOBBA is not set
-# CONFIG_BOARD_GOOGLE_CASTA is not set
-# CONFIG_BOARD_GOOGLE_DOOD is not set
-# CONFIG_BOARD_GOOGLE_FLEEX is not set
-# CONFIG_BOARD_GOOGLE_FOOB is not set
-# CONFIG_BOARD_GOOGLE_GARG is not set
-# CONFIG_BOARD_GOOGLE_LICK is not set
-# CONFIG_BOARD_GOOGLE_MEEP is not set
-# CONFIG_BOARD_GOOGLE_OCTOPUS is not set
-# CONFIG_BOARD_GOOGLE_PHASER is not set
-# CONFIG_BOARD_GOOGLE_YORP is not set
-
-#
-# Parrot
-#
-# CONFIG_BOARD_GOOGLE_PARROT is not set
-
-#
-# Peach Pit
-#
-# CONFIG_BOARD_GOOGLE_PEACH_PIT is not set
-
-#
-# Poppy
-#
-# CONFIG_BOARD_GOOGLE_ATLAS is not set
-# CONFIG_BOARD_GOOGLE_POPPY is not set
-# CONFIG_BOARD_GOOGLE_NAMI is not set
-# CONFIG_BOARD_GOOGLE_NAUTILUS is not set
-# CONFIG_BOARD_GOOGLE_NOCTURNE is not set
-# CONFIG_BOARD_GOOGLE_RAMMUS is not set
-# CONFIG_BOARD_GOOGLE_SORAKA is not set
-
-#
-# Rambi
-#
-# CONFIG_BOARD_GOOGLE_BANJO is not set
-# CONFIG_BOARD_GOOGLE_CANDY is not set
-# CONFIG_BOARD_GOOGLE_CLAPPER is not set
-# CONFIG_BOARD_GOOGLE_ENGUARDE is not set
-# CONFIG_BOARD_GOOGLE_GLIMMER is not set
-# CONFIG_BOARD_GOOGLE_GNAWTY is not set
-# CONFIG_BOARD_GOOGLE_HELI is not set
-# CONFIG_BOARD_GOOGLE_KIP is not set
-# CONFIG_BOARD_GOOGLE_NINJA is not set
-# CONFIG_BOARD_GOOGLE_ORCO is not set
-# CONFIG_BOARD_GOOGLE_QUAWKS is not set
-# CONFIG_BOARD_GOOGLE_SQUAWKS is not set
-# CONFIG_BOARD_GOOGLE_RAMBI is not set
-# CONFIG_BOARD_GOOGLE_SUMO is not set
-# CONFIG_BOARD_GOOGLE_SWANKY is not set
-# CONFIG_BOARD_GOOGLE_WINKY is not set
-
-#
-# Reef
-#
-# CONFIG_BOARD_GOOGLE_REEF is not set
-# CONFIG_BOARD_GOOGLE_PYRO is not set
-# CONFIG_BOARD_GOOGLE_SAND is not set
-# CONFIG_BOARD_GOOGLE_SNAPPY is not set
-# CONFIG_BOARD_GOOGLE_CORAL is not set
-
-#
-# Sarien
-#
-# CONFIG_BOARD_GOOGLE_ARCADA is not set
-# CONFIG_BOARD_GOOGLE_SARIEN is not set
-
-#
-# Skyrim
-#
-# CONFIG_BOARD_GOOGLE_SKYRIM is not set
-
-#
-# Slippy
-#
-# CONFIG_BOARD_GOOGLE_FALCO is not set
-# CONFIG_BOARD_GOOGLE_LEON is not set
-# CONFIG_BOARD_GOOGLE_PEPPY is not set
-# CONFIG_BOARD_GOOGLE_WOLF is not set
-
-#
-# Smaug
-#
-# CONFIG_BOARD_GOOGLE_SMAUG is not set
-
-#
-# Storm
-#
-# CONFIG_BOARD_GOOGLE_STORM is not set
-
-#
-# Stout
-#
-# CONFIG_BOARD_GOOGLE_STOUT is not set
-
-#
-# Trogdor
-#
-
-#
-# (Trogdor requires 'Allow QC blobs repository')
-#
-
-#
-# Veyron
-#
-# CONFIG_BOARD_GOOGLE_VEYRON_JAQ is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_JERRY is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_MIGHTY is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_MINNIE is not set
-# CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY is not set
-
-#
-# Veyron Mickey
-#
-# CONFIG_BOARD_GOOGLE_VEYRON_MICKEY is not set
-
-#
-# Veyron Rialto
-#
-# CONFIG_BOARD_GOOGLE_VEYRON_RIALTO is not set
-
-#
-# Volteer
-#
-# CONFIG_BOARD_GOOGLE_DELBIN is not set
-# CONFIG_BOARD_GOOGLE_ELDRID is not set
-# CONFIG_BOARD_GOOGLE_HALVOR is not set
-# CONFIG_BOARD_GOOGLE_LINDAR is not set
-# CONFIG_BOARD_GOOGLE_MALEFOR is not set
-# CONFIG_BOARD_GOOGLE_TERRADOR is not set
-# CONFIG_BOARD_GOOGLE_TODOR is not set
-# CONFIG_BOARD_GOOGLE_TRONDO is not set
-# CONFIG_BOARD_GOOGLE_VOLTEER is not set
-# CONFIG_BOARD_GOOGLE_VOLTEER2 is not set
-# CONFIG_BOARD_GOOGLE_VOLTEER2_TI50 is not set
-# CONFIG_BOARD_GOOGLE_VOXEL is not set
-# CONFIG_BOARD_GOOGLE_ELEMI is not set
-# CONFIG_BOARD_GOOGLE_VOEMA is not set
-# CONFIG_BOARD_GOOGLE_DROBIT is not set
-# CONFIG_BOARD_GOOGLE_COPANO is not set
-# CONFIG_BOARD_GOOGLE_COLLIS is not set
-# CONFIG_BOARD_GOOGLE_VOLET is not set
-# CONFIG_BOARD_GOOGLE_CHRONICLER is not set
-
-#
-# Zork
-#
-# CONFIG_BOARD_GOOGLE_DALBOZ is not set
-# CONFIG_BOARD_GOOGLE_VILBOZ is not set
-# CONFIG_BOARD_GOOGLE_EZKINIL is not set
-# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
-# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
-# CONFIG_BOARD_GOOGLE_BERKNIP is not set
-# CONFIG_BOARD_GOOGLE_WOOMAX is not set
-# CONFIG_BOARD_GOOGLE_DIRINBOZ is not set
-# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
-# CONFIG_BOARD_GOOGLE_GUMBOZ is not set
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_DRIVER_TPM_I2C_BUS=0x9
-CONFIG_DRIVER_TPM_I2C_ADDR=0x2
-CONFIG_EC_GOOGLE_CHROMEEC_I2C_BUS=0x4
-CONFIG_PMIC_BUS=0
-CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_HEAP_SIZE=0x4000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_BOARD_ROMSIZE_KB_4096=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_4096=y
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=4096
-CONFIG_ROM_SIZE=0x00400000
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x0
-CONFIG_VBT_DATA_SIZE_KB=8
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_TTYS0_BASE=0x2e8
-CONFIG_UART_PCI_ADDR=0x0
-CONFIG_GENERIC_UDELAY=y
-CONFIG_CPU_SAMSUNG_EXYNOS5250=y
-
-#
-# CPU
-#
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_SUPPORTS_DPTF_TEVT=y
-CONFIG_EC_GOOGLE_CHROMEEC=y
-CONFIG_EC_GOOGLE_CHROMEEC_I2C=y
-CONFIG_EC_GOOGLE_CHROMEEC_I2C_CHIP=0x1e
-# CONFIG_EC_GOOGLE_CHROMEEC_RTC is not set
-CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
-CONFIG_MAINBOARD_HAS_CHROMEOS=y
-
-#
-# ChromeOS
-#
-# end of ChromeOS
-
-CONFIG_ARCH_ARM=y
-CONFIG_ARCH_BOOTBLOCK_ARM=y
-CONFIG_ARCH_VERSTAGE_ARM=y
-CONFIG_ARCH_ROMSTAGE_ARM=y
-CONFIG_ARCH_RAMSTAGE_ARM=y
-CONFIG_ARCH_BOOTBLOCK_ARMV7=y
-CONFIG_ARCH_VERSTAGE_ARMV7=y
-CONFIG_ARCH_ROMSTAGE_ARMV7=y
-CONFIG_ARCH_RAMSTAGE_ARMV7=y
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-
-#
-# Display
-#
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATOR_V4=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-CONFIG_TPM_INIT_RAMSTAGE=y
-CONFIG_DRIVERS_UART=y
-CONFIG_HAVE_UART_SPECIAL=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_I2C_TPM=y
-CONFIG_DRIVER_TIS_DEFAULT=y
-# CONFIG_DRIVER_I2C_TPM_ACPI is not set
-# CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES is not set
-CONFIG_INTEL_GMA_OPREGION_2_0=y
-CONFIG_DRIVER_MAXIM_MAX77686=y
-CONFIG_DRIVER_TI_TPS65090=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_MEASURED_BOOT is not set
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-# end of Memory initialization
-
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-
-#
-# device-specific UART
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_POST_DEVICE_NONE=y
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_MONOTONIC_TIMER=y
-
-#
-# System tables
-#
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_FIT is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUX is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PAYLOAD_FIT_SUPPORT is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# end of Debugging
-
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_NO_XIP_EARLY_STAGES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y

resources/coreboot/default/blobs.list

@@ -0,0 +1,43 @@
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+3rdparty/chromeec/test/legacy_nvmem_dump.h
+3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+3rdparty/chromeec/third_party/bmi260/accelgyro_bmi260_config_tbin.h
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+3rdparty/vboot/tests/futility/data/bios_peppy_dev.bin

resources/coreboot/default/board.cfg

@@ -1,4 +1,4 @@
 cbtree="default"
 romtype="normal"
-cbrevision="b2e8bd83647f664260120fdfc7d07cba694dd89e"
+cbrevision="e70bc423f9a2e1d13827f2703efe1f9c72549f20"
 arch="x86_64"

resources/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch

@@ -1,7 +1,7 @@
-From 852c6bfbd599460983ad864db019d1b60be35296 Mon Sep 17 00:00:00 2001
+From 4c5971a6fcf7e948f7df4d0ce2ab0751060cb2ca Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@retroboot.org>
 Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/17] apple/macbook21: Set default VRAM to 64MiB instead of
+Subject: [PATCH 01/18] apple/macbook21: Set default VRAM to 64MiB instead of
  8MiB
 
 ---
@@ -19,5 +19,5 @@ index cf1bc4566e..dc0df3b6d6 100644
 -gfx_uma_size=8M
 +gfx_uma_size=64M
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch

@@ -1,7 +1,7 @@
-From 82418ef368b7876fb1199b5e77139e2cef411250 Mon Sep 17 00:00:00 2001
+From ff523fd40649b72512b0f1253701509d83ca4a8d Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/17] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 02/18] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
@@ -46,10 +46,10 @@ index 13d06f0839..88b8669c61 100644
  
  int get_cst_entries(const acpi_cstate_t **entries)
 diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
-index bcce778cb1..16025d6fbb 100644
+index dd701da7ed..5587c48d1f 100644
 --- a/src/mainboard/apple/macbook21/devicetree.cb
 +++ b/src/mainboard/apple/macbook21/devicetree.cb
-@@ -104,7 +104,13 @@ chip northbridge/intel/i945
+@@ -100,7 +100,13 @@ chip northbridge/intel/i945
  			end
  			device pci 1f.3 on # SMBUS
  				subsystemid 0x8086 0x7270
@@ -64,5 +64,5 @@ index bcce778cb1..16025d6fbb 100644
  	end
  end
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch

@@ -1,7 +1,7 @@
-From 54e80b550f86cd08136242f0519053d63a1e4bfd Mon Sep 17 00:00:00 2001
+From fe79712702002bf2044227d6c3cef7ae022e3539 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/17] lenovo/x60: 64MiB Video RAM changed to default
+Subject: [PATCH 03/18] lenovo/x60: 64MiB Video RAM changed to default
  (previously it was 8MiB)
 
 ---
@@ -19,5 +19,5 @@ index 5c3576d1f3..88170a1aab 100644
 -gfx_uma_size=8M
 +gfx_uma_size=64M
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch

@@ -1,7 +1,7 @@
-From 48c0fbea2d0f4be7860205dad5db07f00b1b0a78 Mon Sep 17 00:00:00 2001
+From 79440902866bdafeec651476a5a0e51d42b43b21 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/17] lenovo/t60: make 64MiB VRAM the default in cmos.default
+Subject: [PATCH 04/18] lenovo/t60: make 64MiB VRAM the default in cmos.default
 
 ---
  src/mainboard/lenovo/t60/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index af865f16da..7f03157df7 100644
 -gfx_uma_size=8M
 +gfx_uma_size=64M
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-352MiB-VRAM-by-default.patch

@@ -1,7 +1,7 @@
-From 21b3f3773dcb50cef81690d6648e804814e573a4 Mon Sep 17 00:00:00 2001
+From 73ca2562e77c971c2e581a414dc57b4b9aa544d7 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:10:33 +0100
-Subject: [PATCH 05/17] lenovo/t400: set VRAM to 352MiB VRAM by default
+Subject: [PATCH 05/18] lenovo/t400: set VRAM to 352MiB VRAM by default
 
 In the past, this caused stability issues so we set it to 256MiB. Nowadays,
 coreboot has fixed the issue preventing this. See:
@@ -23,5 +23,5 @@ index a326e315b1..e74d15d030 100644
 -gfx_uma_size=32M
 +gfx_uma_size=352M
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-352MiB-by-default.patch

@@ -1,7 +1,7 @@
-From f1d4dab6fc8e86c59ae1b65c51d812d4605972cf Mon Sep 17 00:00:00 2001
+From badcbb2f07ac0e3d8b53a23e324f709bf93c3dd5 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:11:59 +0100
-Subject: [PATCH 06/17] lenovo/x200: set VRAM to 352MiB by default
+Subject: [PATCH 06/18] lenovo/x200: set VRAM to 352MiB by default
 
 This fix makes it possible:
 https://review.coreboot.org/c/coreboot/+/16831
@@ -20,5 +20,5 @@ index bb4323836e..33a6a69f59 100644
 -gfx_uma_size=32M
 +gfx_uma_size=352M
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-352MiB-by-default.patch

@@ -1,7 +1,7 @@
-From 7e51411400fd71ebaf2b90c22a778227c275bb22 Mon Sep 17 00:00:00 2001
+From 59e14decddd3a3d0eb9905196df045e34b7ce035 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:18:26 +0100
-Subject: [PATCH 07/17] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
+Subject: [PATCH 07/18] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
 
 ---
  src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index 8372032119..3a9a8e2d72 100644
 -gfx_uma_size=64M
 +gfx_uma_size=352M
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-352MiB-by-default.patch

@@ -1,7 +1,7 @@
-From add3b218110aa54a8aa89a0ea7c20ab58d5c7a47 Mon Sep 17 00:00:00 2001
+From 794e082e64558678fe245c86a2c81b4edc582795 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:21:39 +0100
-Subject: [PATCH 08/17] acer/g43t-am3: set VRAM to 352MiB by default
+Subject: [PATCH 08/18] acer/g43t-am3: set VRAM to 352MiB by default
 
 ---
  src/mainboard/acer/g43t-am3/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index 706f5dd551..98899e8bf5 100644
 -gfx_uma_size=64M
 +gfx_uma_size=352M
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch

@@ -1,7 +1,7 @@
-From 967ef36a3f3cf5efaf92235905ab4a6b5a878d01 Mon Sep 17 00:00:00 2001
+From 62121b837771b0b05f6490943ff9f1ccaba45bdb Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 09/17] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 09/18] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -15,10 +15,10 @@ This patch unmasked all SATA ports found within t400s with factory firmware.
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
-index 670b4883f3..1fc60d9b24 100644
+index 1df350ab67..21c8e2c9a1 100644
 --- a/src/mainboard/lenovo/t400/devicetree.cb
 +++ b/src/mainboard/lenovo/t400/devicetree.cb
-@@ -59,8 +59,8 @@ chip northbridge/intel/gm45
+@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
  			register "gpe0_en" = "0x01000000"
  			register "gpi1_routing"  = "2"
  
@@ -30,5 +30,5 @@ index 670b4883f3..1fc60d9b24 100644
  			register "sata_traffic_monitor"		= "0"
  
 -- 
-2.25.1
+2.39.2
 

resources/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch

@@ -1,22 +0,0 @@
-From 990717f4bed5ff0bcf89e7f583251c76f6cf5559 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 20 Dec 2021 01:29:31 +0000
-Subject: [PATCH 10/17] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
- default
-
----
- src/mainboard/lenovo/x230/cmos.default | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 7314066c2b..2e315d4521 100644
---- a/src/mainboard/lenovo/x230/cmos.default
-+++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
- usb_always_on=Disable
- f1_to_f12_as_primary=Enable
- me_state=Normal
-+gfx_uma_size=224M
--- 
-2.25.1
-

resources/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch

@@ -1,38 +0,0 @@
-From a069b42f28f22e6377d0ddcc5984cd191ab196f0 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 11/17] lenovo/x230: set me_state=Disabled in cmos.default
-
-I only recently found out about this. It's possible to use me_cleaner to
-do the same thing, but some people might just flash coreboot and not do
-anything with the ME region
-
-With this change, the ME is set to disabled. It's my understanding that this
-will accomplish more or less the same thing as me_cleaner, without actually
-using that. Of course, I still recommend using me_cleaner
-
-I saw this when I audited coreboot's git history, and saw this:
-
-commit 833e9bad4762e0dca6c867d3a18dbaf6d5166be8
-Author: Evgeny Zinoviev <me@ch1p.io>
-Date:   Thu Nov 21 21:47:31 2019 +0300
-
-    sb/intel/bd82x6x: Support ME Soft Temporary Disable Mode
----
- src/mainboard/lenovo/x230/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 2e315d4521..3585cbd58b 100644
---- a/src/mainboard/lenovo/x230/cmos.default
-+++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -15,5 +15,5 @@ trackpoint=Enable
- backlight=Both
- usb_always_on=Disable
- f1_to_f12_as_primary=Enable
--me_state=Normal
-+me_state=Disabled
- gfx_uma_size=224M
--- 
-2.25.1
-

resources/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch

@@ -1,100 +0,0 @@
-From 3be4cad0bd43fe33cd62f22ed7b89433232d4ed7 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 12/17] set me_state=Disabled on all cmos.default files!
-
-yeah. why the hell isn't this the default
----
- src/mainboard/lenovo/l520/cmos.default  | 2 +-
- src/mainboard/lenovo/t420/cmos.default  | 2 +-
- src/mainboard/lenovo/t420s/cmos.default | 2 +-
- src/mainboard/lenovo/t430/cmos.default  | 2 +-
- src/mainboard/lenovo/t430s/cmos.default | 2 +-
- src/mainboard/lenovo/t520/cmos.default  | 2 +-
- src/mainboard/lenovo/t530/cmos.default  | 2 +-
- src/mainboard/lenovo/x220/cmos.default  | 2 +-
- 8 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/src/mainboard/lenovo/l520/cmos.default b/src/mainboard/lenovo/l520/cmos.default
-index 681c40e78b..57cdcf9162 100644
---- a/src/mainboard/lenovo/l520/cmos.default
-+++ b/src/mainboard/lenovo/l520/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
- trackpoint=Enable
- backlight=Both
- usb_always_on=Disable
--me_state=Normal
-+me_state=Disabled
-diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index 8244071b8a..c011867916 100644
---- a/src/mainboard/lenovo/t420/cmos.default
-+++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
- trackpoint=Enable
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
--me_state=Normal
-+me_state=Disabled
-diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index 8244071b8a..c011867916 100644
---- a/src/mainboard/lenovo/t420s/cmos.default
-+++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
- trackpoint=Enable
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
--me_state=Normal
-+me_state=Disabled
-diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 26795fe5cf..55e1e6c04e 100644
---- a/src/mainboard/lenovo/t430/cmos.default
-+++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- backlight=Both
- usb_always_on=Disable
- hybrid_graphics_mode=Integrated Only
--me_state=Normal
-+me_state=Disabled
-diff --git a/src/mainboard/lenovo/t430s/cmos.default b/src/mainboard/lenovo/t430s/cmos.default
-index 52dbf70377..b16800ca9e 100644
---- a/src/mainboard/lenovo/t430s/cmos.default
-+++ b/src/mainboard/lenovo/t430s/cmos.default
-@@ -16,4 +16,4 @@ backlight=Both
- enable_dual_graphics=Disable
- usb_always_on=Disable
- f1_to_f12_as_primary=Enable
--me_state=Normal
-+me_state=Disabled
-diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index cf79b391e2..b66f7034dc 100644
---- a/src/mainboard/lenovo/t520/cmos.default
-+++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- backlight=Both
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
--me_state=Normal
-+me_state=Disabled
-diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index cf79b391e2..b66f7034dc 100644
---- a/src/mainboard/lenovo/t530/cmos.default
-+++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- backlight=Both
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
--me_state=Normal
-+me_state=Disabled
-diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index 6d1d57a795..52f303dfdb 100644
---- a/src/mainboard/lenovo/x220/cmos.default
-+++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -13,4 +13,4 @@ usb_always_on=Disable
- fn_ctrl_swap=Disable
- sticky_fn=Disable
- trackpoint=Enable
--me_state=Normal
-+me_state=Disabled
--- 
-2.25.1
-

resources/coreboot/default/patches/0013-specifically-use-python3-in-scripts.patch

@@ -1,36 +0,0 @@
-From 45c2ae2e2885aedd8a75de077bf4cbbcf5b87a87 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 13 Mar 2022 18:04:55 +0000
-Subject: [PATCH 13/17] specifically use python3, in scripts
-
----
- src/drivers/intel/fsp2_0/Makefile.inc | 2 +-
- util/spdtool/spdtool.py               | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
-index eaf99d1492..9e82172c9e 100644
---- a/src/drivers/intel/fsp2_0/Makefile.inc
-+++ b/src/drivers/intel/fsp2_0/Makefile.inc
-@@ -84,7 +84,7 @@ endif
- 
- ifeq ($(CONFIG_FSP_FULL_FD),y)
- $(obj)/Fsp_M.fd: $(call strip_quotes,$(CONFIG_FSP_FD_PATH)) $(DOTCONFIG)
--	python 3rdparty/fsp/Tools/SplitFspBin.py split -f $(CONFIG_FSP_FD_PATH) -o "$(obj)" -n "Fsp.fd"
-+	python3 3rdparty/fsp/Tools/SplitFspBin.py split -f $(CONFIG_FSP_FD_PATH) -o "$(obj)" -n "Fsp.fd"
- 
- $(obj)/Fsp_S.fd: $(call strip_quotes,$(CONFIG_FSP_FD_PATH)) $(obj)/Fsp_M.fd
- 	true
-diff --git a/util/spdtool/spdtool.py b/util/spdtool/spdtool.py
-index 89976eac59..2cd7027377 100644
---- a/util/spdtool/spdtool.py
-+++ b/util/spdtool/spdtool.py
-@@ -1,4 +1,4 @@
--#!/usr/bin/env python
-+#!/usr/bin/env python3
- # spdtool - Tool for partial deblobbing of UEFI firmware images
- # SPDX-License-Identifier: GPL-3.0-or-later
- #
--- 
-2.25.1
-

resources/coreboot/default/patches/0014-coreboot-default-fix-crossgcc-build.patch

@@ -1,57 +0,0 @@
-From d89a5c66a0150bb6a2e82c685915b2c8a44cb9ed Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sat, 19 Nov 2022 03:30:34 +0000
-Subject: [PATCH 14/17] coreboot/default: fix crossgcc build
-
-patch copied from
-coreboot f9b5665d280faa35c6b41fe0c48a9e9e1afd634b
----
- util/crossgcc/patches/gcc-11.2.0_gnat.patch | 32 ++++++++++++++++++++-
- 1 file changed, 31 insertions(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/patches/gcc-11.2.0_gnat.patch b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
-index 2d7cecee24..c22cec45d0 100644
---- a/util/crossgcc/patches/gcc-11.2.0_gnat.patch
-+++ b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
-@@ -5,7 +5,37 @@
-  
-  # Extra flags to pass to recursive makes.
- -COMMON_ADAFLAGS= -gnatpg
--+COMMON_ADAFLAGS= -gnatpg -gnatwGUR
-++COMMON_ADAFLAGS= -gnatpg -gnatwn
-  ifeq ($(TREECHECKING),)
-  CHECKING_ADAFLAGS=
-  else
-+diff -Nurp gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in
-+--- gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in	2022-06-03 00:31:57.993273717 +0200
-++++ gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in	2022-06-03 00:30:50.214166847 +0200
-+@@ -334,6 +334,7 @@ GNAT_ADA_OBJS =	\
-+  ada/hostparm.o	\
-+  ada/impunit.o	\
-+  ada/inline.o	\
-++ ada/libgnat/i-c.o	\
-+  ada/libgnat/interfac.o	\
-+  ada/itypes.o	\
-+  ada/krunch.o	\
-+@@ -364,7 +365,10 @@ GNAT_ADA_OBJS =	\
-+  ada/rtsfind.o	\
-+  ada/libgnat/s-addope.o	\
-+  ada/libgnat/s-addima.o \
-++ ada/libgnat/s-aotase.o	\
-+  ada/libgnat/s-assert.o	\
-++ ada/libgnat/s-atoope.o	\
-++ ada/libgnat/s-atopri.o	\
-+  ada/libgnat/s-bitops.o	\
-+  ada/libgnat/s-carun8.o	\
-+  ada/libgnat/s-casuti.o	\
-+@@ -548,6 +552,7 @@ GNATBIND_OBJS = \
-+  ada/hostparm.o   \
-+  ada/init.o       \
-+  ada/initialize.o \
-++ ada/libgnat/i-c.o        \
-+  ada/libgnat/interfac.o   \
-+  ada/krunch.o     \
-+  ada/lib.o        \
--- 
-2.25.1
-

resources/coreboot/default/patches/0015-lenovo-x230-introduce-FHD-variant.patch

@@ -1,198 +0,0 @@
-From 495555d383345124d7b45b8e2c8feb38153b9f7e Mon Sep 17 00:00:00 2001
-From: Alexander Couzens <lynxis@fe80.eu>
-Date: Sat, 19 Mar 2022 13:42:33 +0000
-Subject: [PATCH 15/17] lenovo/x230: introduce FHD variant
-
-There is a modification for the x230 which uses the 2nd DP from the dock
-as the integrated panel's connection, which allows using a custom eDP
-panel instead of the stock LVDS display.
-
-There are several adapter boards present on the market and all of them
-uses the same method of enabling the custom eDP panel.
-
-To make this work with coreboot, the internal LVDS connector should be
-disabled in libgfxinit. The VBT has been modified as well, which allows
-brightness controls to work out of the box.
-
-The modifications done to the VBT are:
-- Remove the LVDS port entry.
-- Move the DP-3 (which is the 2nd DP on the dock) entry to the first
-  position on the list.
-- Set the DP-3 as internally connected.
-
-This has been reported to work with the following panels:
-- LP125WF2-SPB4 (1920*1080, 12.5")
-- LQ125T1JW02 (2560*1440, 12.5")
-- LQ133M1JW21 (1920*1080, 13.3")
-- LTN133HL10-201 (1920*1080, 13.3")
-- B133HAN04.6 (1920*1080, 13.3")
-- B133QAN02.0 (2560*1600, 13.3")
-
-Other eDP panels not on this list should work as well.
-
-Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0
-Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
-Signed-off-by: Felix Singer <felixsinger@posteo.net>
----
- src/mainboard/lenovo/x230/Kconfig             |  15 ++++++++-----
- src/mainboard/lenovo/x230/Kconfig.name        |   3 +++
- src/mainboard/lenovo/x230/Makefile.inc        |   5 +++++
- .../lenovo/x230/variants/x230_edp/data.vbt    | Bin 0 -> 4281 bytes
- .../x230/variants/x230_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
- 5 files changed, 38 insertions(+), 6 deletions(-)
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-
-diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
-index cafdead858..b8cae24199 100644
---- a/src/mainboard/lenovo/x230/Kconfig
-+++ b/src/mainboard/lenovo/x230/Kconfig
-@@ -1,4 +1,4 @@
--if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S
-+if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
- 
- config BOARD_SPECIFIC_OPTIONS
- 	def_bool y
-@@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select H8_HAS_BAT_TRESHOLDS_IMPL
- 	select H8_HAS_PRIMARY_FN_KEYS if BOARD_LENOVO_X230S
- 	select NO_UART_ON_SUPERIO
--	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select BOARD_ROMSIZE_KB_16384 if BOARD_LENOVO_X230S
- 	select HAVE_ACPI_TABLES
- 	select HAVE_OPTION_TABLE
-@@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select INTEL_INT15
- 	select DRIVERS_RICOH_RCE822
- 	select MAINBOARD_HAS_LPC_TPM
--	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select MAINBOARD_HAS_LIBGFXINIT
- 	select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
- 	select INTEL_GMA_HAVE_VBT
-@@ -51,17 +51,20 @@ config MAINBOARD_DIR
- 	default "lenovo/x230"
- 
- config VARIANT_DIR
--	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	default "x230s" if BOARD_LENOVO_X230S
- 
- config MAINBOARD_PART_NUMBER
--	default "ThinkPad X230" if BOARD_LENOVO_X230
-+	default "ThinkPad X230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230_EDP
- 	default "ThinkPad X230t" if BOARD_LENOVO_X230T
- 	default "ThinkPad X230s" if BOARD_LENOVO_X230S
- 
- config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
-+config INTEL_GMA_VBT_FILE
-+	default "variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
-+
- config USBDEBUG_HCD_INDEX
- 	int
- 	default 2
-@@ -83,4 +86,4 @@ config PS2M_EISAID
- config THINKPADEC_HKEY_EISAID
- 	default "LEN0068"
- 
--endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S
-+endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
-diff --git a/src/mainboard/lenovo/x230/Kconfig.name b/src/mainboard/lenovo/x230/Kconfig.name
-index 1a01436879..e7290a12dd 100644
---- a/src/mainboard/lenovo/x230/Kconfig.name
-+++ b/src/mainboard/lenovo/x230/Kconfig.name
-@@ -6,3 +6,6 @@ config BOARD_LENOVO_X230T
- 
- config BOARD_LENOVO_X230S
- 	bool "ThinkPad X230s"
-+
-+config BOARD_LENOVO_X230_EDP
-+	bool "ThinkPad X230 eDP Mod (2K/FHD)"
-diff --git a/src/mainboard/lenovo/x230/Makefile.inc b/src/mainboard/lenovo/x230/Makefile.inc
-index 8e801f145d..6e6f9f90b9 100644
---- a/src/mainboard/lenovo/x230/Makefile.inc
-+++ b/src/mainboard/lenovo/x230/Makefile.inc
-@@ -5,4 +5,9 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
- romstage-y += variants/$(VARIANT_DIR)/early_init.c
- romstage-y += variants/$(VARIANT_DIR)/gpio.c
- ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
-+
-+ifeq ($(CONFIG_BOARD_LENOVO_X230_EDP),y)
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/x230_edp/gma-mainboard.ads
-+else
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
-+endif
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt b/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..13384d45571ff76e592335143d01315e37893186
-GIT binary patch
-literal 4281
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-zHNiLuN+i^5TbBk=p_5vr0Ri$CB!v1Q6%yhL5TS}%ZG|E}(5mW(6!8It5AdN?tBP`+
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-zyvs4>_cUj9w4&M7&s8K0k<cwUM!E2PTu7mct3rr`5sB*7)nZ4R`hWT~<uZuic%Tb%
-z5{?q{&YwfGl9W%nBS~{SNhgx-V@b1~q?eQKTGD(wN&iT?re$ukXwY)YmN{$Dqn7)m
-zWuCX_HOswZnSZhfw(HvFPMeChJ7b&o+O%T3=WKJ;rZ;W(kGA=)O-9Pirp&!5I+$|r
-zNtySj=%*?7xs>@rirz}Oms94I6gg>kPulEG+g%^&e&n+7+xV#SfijjY{5o+C7V}H-
-zZs9PGrN7SK-OZ8YGZ>yr(&i#tdss~q`sQ|0&fnIIOUJ;O2*-=b;v=kW?O}6KsoH4P
-z0smI&%EQn#cd@w$RZTVP=TtP?l7~|?nRTSIQO2qkgO+Z!=3#T$D-XeMvn68}T3Ey8
-zHleye(7mkLXe*JtfA{Q*lj!gc)Wck4IFj|C#q&~HiNmA&>Z|kF4(U<Y;5eIloj)C%
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-z2d_)6&979w%w$-vyatVrqw??t&t%}iZhDAP3%j_I#cGANdzLq>W;J(F=Xwkxxj%^H
-zwQDmn=w}|@-y`RG{*wz0>A(ZGtk~AM=#-fE(LV1uZE98+Nk>UmiyyuJ8?##<Mr{1g
-p(B@uj-Va_SU#<T#GXLCvin_ms#}9BYOE7UKDyX7coWuJX{tbC=%boxL
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-new file mode 100644
-index 0000000000..f7cf0bc264
---- /dev/null
-+++ b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-@@ -0,0 +1,21 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (DP1,
-+      DP2,
-+      DP3,
-+      HDMI1,
-+      HDMI2,
-+      HDMI3,
-+      Analog,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
--- 
-2.25.1
-

resources/coreboot/default/patches/0016-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch

@@ -1,26 +0,0 @@
-From 27f963913d9afc6da15043c6e8b224c9b1a727ac Mon Sep 17 00:00:00 2001
-From: Alexei Sorokin <sor.alexei@meowr.ru>
-Date: Sun, 27 Nov 2022 18:36:26 +0300
-Subject: [PATCH 16/17] lenovo/x230: fix the data.vbt path for the EDP variant
-
----
- src/mainboard/lenovo/x230/Kconfig | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
-index b8cae24199..d72b6f8aea 100644
---- a/src/mainboard/lenovo/x230/Kconfig
-+++ b/src/mainboard/lenovo/x230/Kconfig
-@@ -62,9 +62,6 @@ config MAINBOARD_PART_NUMBER
- config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
--config INTEL_GMA_VBT_FILE
--	default "variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
--
- config USBDEBUG_HCD_INDEX
- 	int
- 	default 2
--- 
-2.25.1
-

resources/coreboot/default/patches/0017-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch

@@ -1,183 +0,0 @@
-From 0cf2eee19eef5270410d054cf8e26a8be99245a8 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 4 Dec 2022 22:35:01 +0000
-Subject: [PATCH 17/17] util/ifdtool: add --nuke flag (all 0xFF on region)
-
-When this option is used, the region's contents are overwritten
-with all ones (0xFF).
-
-Example:
-
-./ifdtool --nuke gbe coreboot.rom
-./ifdtool --nuke bios coreboot.com
-./ifdtool --nuke me coreboot.com
----
- util/ifdtool/ifdtool.c | 98 ++++++++++++++++++++++++++++++++----------
- 1 file changed, 76 insertions(+), 22 deletions(-)
-
-diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index ca5d3b8d21..8ba1335772 100644
---- a/util/ifdtool/ifdtool.c
-+++ b/util/ifdtool/ifdtool.c
-@@ -1640,19 +1640,68 @@ static void print_usage(const char *name)
- 	       "                                         tgl    - Tiger Lake\n"
- 	       "   -S | --setpchstrap                    Write a PCH strap\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
-+	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
- 	       "   -v | --version:                       print the version\n"
- 	       "   -h | --help:                          print this help\n\n"
- 	       "<region> is one of Descriptor, BIOS, ME, GbE, Platform, res1, res2, res3\n"
- 	       "\n");
- }
- 
-+static int
-+get_region_type_string(const char *region_type_string)
-+{
-+	if (region_type_string == NULL)
-+		return -1;
-+	else if (!strcasecmp("Descriptor", region_type_string))
-+		return 0;
-+	else if (!strcasecmp("BIOS", region_type_string))
-+		return 1;
-+	else if (!strcasecmp("ME", region_type_string))
-+		return 2;
-+	else if (!strcasecmp("GbE", region_type_string))
-+		return 3;
-+	else if (!strcasecmp("Platform", region_type_string))
-+		return 4;
-+	else if (!strcasecmp("res1", region_type_string))
-+		return 5;
-+	else if (!strcasecmp("res2", region_type_string))
-+		return 6;
-+	else if (!strcasecmp("res3", region_type_string))
-+		return 7;
-+	else if (!strcasecmp("EC", region_type_string))
-+		return 8;
-+	else
-+		return -1;
-+}
-+
-+
-+static void
-+nuke(const char *filename, char *image, int size, int region_type)
-+{
-+	int i;
-+	region_t region;
-+	const frba_t *frba = find_frba(image, size);
-+	if (!frba)
-+		exit(EXIT_FAILURE);
-+
-+	region = get_region(frba, region_type);
-+	if (region.size > 0) {
-+		for (i = region.base; i <= region.limit; i++) {
-+			if ((i + 1) > (size))
-+				break;
-+			image[i] = 0xFF;
-+		}
-+		write_image(filename, image, size);
-+	}
-+}
-+
- int main(int argc, char *argv[])
- {
- 	int opt, option_index = 0;
- 	int mode_dump = 0, mode_extract = 0, mode_inject = 0, mode_spifreq = 0;
- 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
- 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
--	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0;
-+	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_nuke = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
- 	const char *layout_fname = NULL;
- 	char *new_filename = NULL;
-@@ -1683,6 +1732,7 @@ int main(int argc, char *argv[])
- 		{"validate", 0, NULL, 't'},
- 		{"setpchstrap", 1, NULL, 'S'},
- 		{"newvalue", 1, NULL, 'V'},
-+		{"nuke", 1, NULL, 'N'},
- 		{0, 0, 0, 0}
- 	};
- 
-@@ -1723,25 +1773,8 @@ int main(int argc, char *argv[])
- 			region_fname++;
- 			// Descriptor, BIOS, ME, GbE, Platform
- 			// valid type?
--			if (!strcasecmp("Descriptor", region_type_string))
--				region_type = 0;
--			else if (!strcasecmp("BIOS", region_type_string))
--				region_type = 1;
--			else if (!strcasecmp("ME", region_type_string))
--				region_type = 2;
--			else if (!strcasecmp("GbE", region_type_string))
--				region_type = 3;
--			else if (!strcasecmp("Platform", region_type_string))
--				region_type = 4;
--			else if (!strcasecmp("res1", region_type_string))
--				region_type = 5;
--			else if (!strcasecmp("res2", region_type_string))
--				region_type = 6;
--			else if (!strcasecmp("res3", region_type_string))
--				region_type = 7;
--			else if (!strcasecmp("EC", region_type_string))
--				region_type = 8;
--			if (region_type == -1) {
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
- 				fprintf(stderr, "No such region type: '%s'\n\n",
- 					region_type_string);
- 				print_usage(argv[0]);
-@@ -1900,6 +1933,22 @@ int main(int argc, char *argv[])
- 		case 't':
- 			mode_validate = 1;
- 			break;
-+		case 'N':
-+			region_type_string = strdup(optarg);
-+			if (!region_type_string) {
-+				fprintf(stderr, "No region specified\n");
-+				print_usage(argv[0]);
-+				exit(EXIT_FAILURE);
-+			}
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
-+				fprintf(stderr, "No such region type: '%s'\n\n",
-+					region_type_string);
-+				print_usage(argv[0]);
-+				exit(EXIT_FAILURE);
-+			}
-+			mode_nuke = 1;
-+			break;
- 		case 'v':
- 			print_version();
- 			exit(EXIT_SUCCESS);
-@@ -1915,7 +1964,7 @@ int main(int argc, char *argv[])
- 
- 	if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
- 		mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked |
--		 mode_locked) + mode_altmedisable + mode_validate) > 1) {
-+		 mode_locked) + mode_altmedisable + mode_validate + mode_nuke) > 1) {
- 		fprintf(stderr, "You may not specify more than one mode.\n\n");
- 		print_usage(argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -1923,7 +1972,8 @@ int main(int argc, char *argv[])
- 
- 	if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
- 	     mode_newlayout + mode_spifreq + mode_em100 + mode_locked +
--	     mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
-+	     mode_unlocked + mode_density + mode_altmedisable + mode_validate +
-+	     mode_nuke) == 0) {
- 		fprintf(stderr, "You need to specify a mode.\n\n");
- 		print_usage(argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2021,6 +2071,10 @@ int main(int argc, char *argv[])
- 		write_image(new_filename, image, size);
- 	}
- 
-+	if (mode_nuke) {
-+		nuke(new_filename, image, size, region_type);
-+	}
-+
- 	if (mode_altmedisable) {
- 		fpsba_t *fpsba = find_fpsba(image, size);
- 		fmsba_t *fmsba = find_fmsba(image, size);
--- 
-2.25.1
-

resources/coreboot/default/patches/0018-ich9m-boards-set-256MB-VRAM-instead.patch

@@ -0,0 +1,56 @@
+From 30d8dd45ab489bed21398b04bd03a54e08eafaf2 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 4 Mar 2023 23:55:41 +0000
+Subject: [PATCH 18/18] ich9m boards: set 256MB VRAM instead
+
+352MB causes some stability issues reported by a few people
+---
+ src/mainboard/acer/g43t-am3/cmos.default         | 2 +-
+ src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
+ src/mainboard/lenovo/t400/cmos.default           | 2 +-
+ src/mainboard/lenovo/x200/cmos.default           | 2 +-
+ 4 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/src/mainboard/acer/g43t-am3/cmos.default b/src/mainboard/acer/g43t-am3/cmos.default
+index 98899e8bf5..e8b45ea22c 100644
+--- a/src/mainboard/acer/g43t-am3/cmos.default
++++ b/src/mainboard/acer/g43t-am3/cmos.default
+@@ -3,4 +3,4 @@ debug_level=Debug
+ power_on_after_fail=Disable
+ nmi=Enable
+ sata_mode=AHCI
+-gfx_uma_size=352M
++gfx_uma_size=256M
+diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
+index 3a9a8e2d72..bedad54d2a 100644
+--- a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
++++ b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
+@@ -2,4 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ power_on_after_fail=Enable
+ nmi=Enable
+-gfx_uma_size=352M
++gfx_uma_size=256M
+diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default
+index e74d15d030..b907a3e2df 100644
+--- a/src/mainboard/lenovo/t400/cmos.default
++++ b/src/mainboard/lenovo/t400/cmos.default
+@@ -13,4 +13,4 @@ power_management_beeps=Enable
+ low_battery_beep=Enable
+ sata_mode=AHCI
+ hybrid_graphics_mode=Integrated Only
+-gfx_uma_size=352M
++gfx_uma_size=256M
+diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default
+index 33a6a69f59..458b3f19c5 100644
+--- a/src/mainboard/lenovo/x200/cmos.default
++++ b/src/mainboard/lenovo/x200/cmos.default
+@@ -12,4 +12,4 @@ sticky_fn=Disable
+ power_management_beeps=Enable
+ low_battery_beep=Enable
+ sata_mode=AHCI
+-gfx_uma_size=352M
++gfx_uma_size=256M
+-- 
+2.39.2
+

resources/coreboot/default/patches/0019-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch

@@ -0,0 +1,47 @@
+From 3cf315fd59f1388d60cce9290eb52bccb7b29625 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Wed, 1 Dec 2021 02:53:00 +0000
+Subject: [PATCH 1/2] fix speedstep on x200/t400: Revert
+ "cpu/intel/model_1067x: enable PECI"
+
+This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
+
+Enabling PECI without microcode updates loaded causes the CPUID feature set
+to become corrupted. And one consequence is broken SpeedStep. At least, that's
+my understanding looking at Intel Errata. This revert is not a fix, because
+upstream is correct (upstream assumes microcode updates). We will simply
+maintain this revert patch in Libreboot, from now on.
+---
+ src/cpu/intel/model_1067x/model_1067x_init.c | 9 ---------
+ 1 file changed, 9 deletions(-)
+
+diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
+index 315e7c36fc..1423fd72bc 100644
+--- a/src/cpu/intel/model_1067x/model_1067x_init.c
++++ b/src/cpu/intel/model_1067x/model_1067x_init.c
+@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
+ 	wrmsr(MSR_EMTTM_CR_TABLE(5), msr);
+ }
+ 
+-#define IA32_PECI_CTL		0x5a0
+-
+ static void configure_misc(const int eist, const int tm2, const int emttm)
+ {
+ 	msr_t msr;
+@@ -185,13 +183,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
+ 		msr.lo |= (1 << 20);	/* Lock Enhanced SpeedStep Enable */
+ 		wrmsr(IA32_MISC_ENABLE, msr);
+ 	}
+-
+-	/* Enable PECI
+-	   WARNING: due to Erratum AW67 described in Intel document #318733
+-	   the microcode must be updated before this MSR is written to. */
+-	msr = rdmsr(IA32_PECI_CTL);
+-	msr.lo |= 1;
+-	wrmsr(IA32_PECI_CTL, msr);
+ }
+ 
+ #define PIC_SENS_CFG	0x1aa
+-- 
+2.40.0
+

resources/coreboot/default/patches/0020-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch

@@ -0,0 +1,173 @@
+From 651292a204b00d7a39d8722f9d26fd9d7178fba2 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 17 Apr 2023 15:49:57 +0100
+Subject: [PATCH 1/1] GM45-type CPUs: don't enable alternative SMRR
+
+This reverts the changes in coreboot revision:
+df7aecd92643d207feaf7fd840f8835097346644
+
+While this fix is *technically correct*, the one in
+coreboot, it breaks rebooting as tested on several
+GM45 ThinkPads e.g. X200, T400, when microcode
+updates are not applied.
+
+Since November 2022, Libreboot includes microcode
+updates by default, but it tells users how to remove
+it from the ROM (with cbfstool) if they wish.
+
+Well, with Libreboot 20221214, 20230319 and 20230413,
+mitigations present in Libreboot 20220710 (which did
+not have microcode updates) do not exist.
+
+This patch, along with the other patch to remove PECI
+support (which breaks speedstep when microcode updates
+are not applied) have now been re-added to Libreboot.
+
+It is still best to use microcode updates by default.
+These patches in coreboot are not critically urgent,
+and you can use the machines with or without them,
+regardless of ucode.
+
+I'll probably re-write this and the other patch at
+some point, applying the change conditionally upon
+whether or not microcode is applied.
+
+Pragmatism is a good thing. I recommend it.
+---
+ src/cpu/intel/model_1067x/model_1067x_init.c |  4 +++
+ src/cpu/intel/model_1067x/mp_init.c          | 26 --------------------
+ src/cpu/intel/model_106cx/model_106cx_init.c |  4 +++
+ src/cpu/intel/model_6ex/model_6ex_init.c     |  4 +++
+ src/cpu/intel/model_6fx/model_6fx_init.c     |  4 +++
+ 5 files changed, 16 insertions(+), 26 deletions(-)
+
+diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
+index 1423fd72bc..d1f98ca43a 100644
+--- a/src/cpu/intel/model_1067x/model_1067x_init.c
++++ b/src/cpu/intel/model_1067x/model_1067x_init.c
+@@ -8,6 +8,7 @@
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
+ #include <cpu/intel/smm_reloc.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define MSR_BBL_CR_CTL3		0x11e
+ 
+@@ -234,6 +235,9 @@ static void model_1067x_init(struct device *cpu)
+ 	fill_processor_name(processor_name);
+ 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states(quad);
+ 
+diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
+index bc53214310..72f40f6762 100644
+--- a/src/cpu/intel/model_1067x/mp_init.c
++++ b/src/cpu/intel/model_1067x/mp_init.c
+@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
+ 	smm_initialize();
+ }
+ 
+-#define SMRR_SUPPORTED (1 << 11)
+-
+ static void per_cpu_smm_trigger(void)
+ {
+-	msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
+-	if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
+-		set_feature_ctrl_vmx();
+-		msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
+-		/* We don't care if the lock is already setting
+-		   as our smm relocation handler is able to handle
+-		   setups where SMRR is not enabled here. */
+-		if (ia32_ft_ctrl.lo & (1 << 0)) {
+-			/* IA32_FEATURE_CONTROL locked. If we set it again we
+-			   get an illegal instruction. */
+-			printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
+-			printk(BIOS_DEBUG, "SMRR status: %senabled\n",
+-			       ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
+-		} else {
+-			if (!CONFIG(SET_IA32_FC_LOCK_BIT))
+-				printk(BIOS_INFO,
+-				       "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
+-			ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
+-			wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
+-		}
+-	} else {
+-		set_vmx_and_lock();
+-	}
+-
+ 	/* Relocate the SMM handler. */
+ 	smm_relocate();
+ }
+diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
+index 05f5f327cc..0450c2ad83 100644
+--- a/src/cpu/intel/model_106cx/model_106cx_init.c
++++ b/src/cpu/intel/model_106cx/model_106cx_init.c
+@@ -7,6 +7,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+@@ -66,6 +67,9 @@ static void model_106cx_init(struct device *cpu)
+ 	fill_processor_name(processor_name);
+ 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states();
+ 
+diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
+index 5bd1c32815..f3bb08cde3 100644
+--- a/src/cpu/intel/model_6ex/model_6ex_init.c
++++ b/src/cpu/intel/model_6ex/model_6ex_init.c
+@@ -7,6 +7,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+@@ -105,6 +106,9 @@ static void model_6ex_init(struct device *cpu)
+ 	/* Setup Page Attribute Tables (PAT) */
+ 	// TODO set up PAT
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states();
+ 
+diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
+index 535fb8fae7..f7b05facd2 100644
+--- a/src/cpu/intel/model_6fx/model_6fx_init.c
++++ b/src/cpu/intel/model_6fx/model_6fx_init.c
+@@ -7,6 +7,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+@@ -118,6 +119,9 @@ static void model_6fx_init(struct device *cpu)
+ 	/* Setup Page Attribute Tables (PAT) */
+ 	// TODO set up PAT
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states();
+ 
+-- 
+2.40.0
+

resources/coreboot/default/patches/0021-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch

@@ -0,0 +1,28 @@
+From 521a2edd13050fa39c896bf4f481ff0021c9213e Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sat, 6 May 2023 15:53:41 -0600
+Subject: [PATCH] mb/dell/e6400: Enable 01.0 device in devicetree for dGPU
+ models
+
+Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/devicetree.cb | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
+index bb954cbd7b..e9f3915d17 100644
+--- a/src/mainboard/dell/e6400/devicetree.cb
++++ b/src/mainboard/dell/e6400/devicetree.cb
+@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
+ 		ops gm45_pci_domain_ops
+ 
+ 		device pci 00.0 on end # host bridge
+-		device pci 01.0 off end
++		device pci 01.0 on end
+ 		device pci 02.0 on end # VGA
+ 		device pci 02.1 on end # Display
+ 		device pci 03.0 on end # ME
+-- 
+2.40.1
+

resources/coreboot/default/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch

@@ -0,0 +1,38 @@
+From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 12 May 2023 19:55:15 -0600
+Subject: [PATCH] Remove warning for coreboot images built without a payload
+
+I added this in upstream to prevent people from accidentally flashing
+roms without a payload resulting in a no boot situation, but in
+libreboot lbmk handles the payload and thus this warning always comes
+up. This has caused confusion and concern so just patch it out.
+---
+ payloads/Makefile.inc | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
+index e735443a76..4f1692a873 100644
+--- a/payloads/Makefile.inc
++++ b/payloads/Makefile.inc
+@@ -49,16 +49,5 @@ distclean-payloads:
+ print-repo-info-payloads:
+ 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
+ 
+-ifeq ($(CONFIG_PAYLOAD_NONE),y)
+-files_added:: warn_no_payload
+-endif
+-
+-warn_no_payload:
+-	printf "\n\t** WARNING **\n"
+-	printf "coreboot has been built without a payload. Writing\n"
+-	printf "a coreboot image without a payload to your board's\n"
+-	printf "flash chip will result in a non-booting system. You\n"
+-	printf "can use cbfstool to add a payload to the image.\n\n"
+-
+ .PHONY: force-payload coreinfo nvramcui
+-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
++.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
+-- 
+2.40.1
+

resources/coreboot/default/patches/0023-mb-dell-e6400-acpi-Route-Ricoh-R5C847-PCI-IRQ-lines-.patch

@@ -0,0 +1,125 @@
+From 5c1455495e8d2030473d8194fcf2e1d1111696b7 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Tue, 23 May 2023 20:59:56 -0600
+Subject: [PATCH] mb/dell/e6400/acpi: Route Ricoh R5C847 PCI IRQ lines as DBC
+
+Based on the schematic and vendor ASL code, PCI interrupt lines ABC of
+the Ricoh R5C847 PC Card/Media Card/FireWire controller are routed DBC.
+From lspci and the schematic this chip is PCI device 1. The original
+config copied from the T400 was routed ABCD->BCDA, causing Linux to
+issue an "irq 18: nobody cared" message when inserting an SD card.
+This is fixed by this patch and the SD card now works properly.
+
+Change-Id: Iede1de72d5369f1aebbac170792733739add3431
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/75411
+Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Angel Pons <th3fanbus@gmail.com>
+---
+ .../dell/e6400/acpi/ich9_pci_irqs.asl         | 85 ++-----------------
+ 1 file changed, 8 insertions(+), 77 deletions(-)
+
+diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
+index 21066fbf3b..9a4cdfb75b 100644
+--- a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
++++ b/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
+@@ -4,87 +4,18 @@
+  * 0:1e.0 PCI bridge of the ICH9
+  */
+ 
+-/* TODO: which slots are actually relevant? */
+ If (PICM) {
+ 	Return (Package() {
+-		// PCI Slot 1 routes ABCD
+-		Package() { 0x0000ffff, 0, 0, 16},
+-		Package() { 0x0000ffff, 1, 0, 17},
+-		Package() { 0x0000ffff, 2, 0, 18},
+-		Package() { 0x0000ffff, 3, 0, 19},
+-
+-		// PCI Slot 2 routes BCDA
+-		Package() { 0x0001ffff, 0, 0, 17},
+-		Package() { 0x0001ffff, 1, 0, 18},
+-		Package() { 0x0001ffff, 2, 0, 19},
+-		Package() { 0x0001ffff, 3, 0, 16},
+-
+-		// PCI Slot 3 routes CDAB
+-		Package() { 0x0002ffff, 0, 0, 18},
+-		Package() { 0x0002ffff, 1, 0, 19},
+-		Package() { 0x0002ffff, 2, 0, 16},
+-		Package() { 0x0002ffff, 3, 0, 17},
+-
+-		// PCI Slot 4 routes ABCD
+-		Package() { 0x0003ffff, 0, 0, 16},
+-		Package() { 0x0003ffff, 1, 0, 17},
+-		Package() { 0x0003ffff, 2, 0, 18},
+-		Package() { 0x0003ffff, 3, 0, 19},
+-
+-		// PCI Slot 5 routes ABCD
+-		Package() { 0x0004ffff, 0, 0, 16},
+-		Package() { 0x0004ffff, 1, 0, 17},
+-		Package() { 0x0004ffff, 2, 0, 18},
+-		Package() { 0x0004ffff, 3, 0, 19},
+-
+-		// PCI Slot 6 routes BCDA
+-		Package() { 0x0005ffff, 0, 0, 17},
+-		Package() { 0x0005ffff, 1, 0, 18},
+-		Package() { 0x0005ffff, 2, 0, 19},
+-		Package() { 0x0005ffff, 3, 0, 16},
+-
+-		// FIXME: what's this supposed to mean? (adopted from ich7)
+-		//Package() { 0x0008ffff, 0, 0, 20},
++		// PCI Device 1, Ricoh R5C847 routes DBC
++		Package() { 0x0001ffff, 0, 0, 19},
++		Package() { 0x0001ffff, 1, 0, 17},
++		Package() { 0x0001ffff, 2, 0, 18},
+ 	})
+ } Else {
+ 	Return (Package() {
+-		// PCI Slot 1 routes ABCD
+-		Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
+-		Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
+-		Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
+-		Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
+-
+-		// PCI Slot 2 routes BCDA
+-		Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
+-		Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKC, 0},
+-		Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKD, 0},
+-		Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
+-
+-		// PCI Slot 3 routes CDAB
+-		Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKC, 0},
+-		Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKD, 0},
+-		Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKA, 0},
+-		Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKB, 0},
+-
+-		// PCI Slot 4 routes ABCD
+-		Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
+-		Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
+-		Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
+-		Package() { 0x0003ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
+-
+-		// PCI Slot 5 routes ABCD
+-		Package() { 0x0004ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
+-		Package() { 0x0004ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
+-		Package() { 0x0004ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
+-		Package() { 0x0004ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
+-
+-		// PCI Slot 6 routes BCDA
+-		Package() { 0x0005ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
+-		Package() { 0x0005ffff, 1, \_SB.PCI0.LPCB.LNKC, 0},
+-		Package() { 0x0005ffff, 2, \_SB.PCI0.LPCB.LNKD, 0},
+-		Package() { 0x0005ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
+-
+-		// FIXME
+-		// Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
++		// PCI Device 1, Ricoh R5C847 routes DBC
++		Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKD, 0},
++		Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
++		Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
+ 	})
+ }
+-- 
+2.41.0
+

resources/coreboot/default/patches/0025-never-add-cpu-microcode-updates.patch

@@ -0,0 +1,157 @@
+From 6490aad9a1095c837a13cf3002cd4f7340267964 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 8 Jul 2023 20:33:59 +0100
+Subject: [PATCH 1/1] never add cpu microcode updates
+
+we do it at the source.
+
+this way, we can just leave the default option
+enabled in coreboot configs, which is to include
+the microcode updates.
+
+however, this patch to the coreboot build system
+will result in the default setting being ignored.
+
+simply put: no action will be taken.
+
+no microcode updates will ever be inserted.
+
+this combined with ommitting --checkout in
+the submodule update command, should result reliably
+in no-microcode roms being the only reality in this
+version of coreboot, at least on intel machines.
+
+amd is another matter (for d8 and d16, the solution was/is
+to just patch the coreboot code to not add them - which actually
+is exactly the same as this change)
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/cpu/Makefile.inc                      | 59 -----------------------
+ src/cpu/intel/fit/Makefile.inc            | 33 -------------
+ src/soc/amd/common/block/cpu/Makefile.inc |  1 -
+ 3 files changed, 93 deletions(-)
+
+diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
+index 12c682d43d..6be29bc942 100644
+--- a/src/cpu/Makefile.inc
++++ b/src/cpu/Makefile.inc
+@@ -8,62 +8,3 @@ subdirs-y += ti
+ subdirs-$(CONFIG_ARCH_X86) += x86
+ subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86
+ subdirs-$(CONFIG_CPU_POWER9) += power9
+-
+-$(eval $(call create_class_compiler,cpu_microcode,x86_32))
+-################################################################################
+-## Rules for building the microcode blob in CBFS
+-################################################################################
+-
+-cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin
+-
+-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
+-cbfs-files-y  += cpu_microcode_blob.bin
+-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin
+-
+-$(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER_FILES))
+-	echo "   util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\""
+-	util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES)
+-endif
+-
+-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y)
+-$(obj)/cpu_microcode_blob.bin: cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
+-endif
+-# otherwise `cpu_microcode_bins` should be filled by platform makefiles
+-
+-# We just mash all microcode binaries together into one binary to rule them all.
+-# This approach assumes that the microcode binaries are properly padded, and
+-# their headers specify the correct size. This works fairly well on isolatied
+-# updates, such as Intel and some AMD microcode, but won't work very well if the
+-# updates are wrapped in a container, like AMD's microcode update container. If
+-# there is only one microcode binary (i.e. one container), then we don't have
+-# this issue, and this rule will continue to work.
+-$(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins)) $(DOTCONFIG)
+-	for bin in $(cpu_microcode_bins); do \
+-		if [ ! -f "$$bin" ]; then \
+-			echo "Microcode error: $$bin does not exist"; \
+-			NO_MICROCODE_FILE=1; \
+-		fi; \
+-	done; \
+-	if [ -n "$$NO_MICROCODE_FILE" ]; then \
+-		if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \
+-			echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \
+-		fi; \
+-		false; \
+-	fi
+-	$(if $(cpu_microcode_bins),,false) # fail if no file is given at all
+-	@printf "    MICROCODE  $(subst $(obj)/,,$(@))\n"
+-	@echo $(cpu_microcode_bins)
+-	cat $(cpu_microcode_bins) > $@
+-
+-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
+-cpu_microcode_blob.bin-type := microcode
+-# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
+-ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
+-cpu_microcode_blob.bin-align := 64
+-else
+-cpu_microcode_blob.bin-align := 16
+-endif
+-
+-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
+-cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
+-endif
+diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc
+index d3f12e43e6..10d1c7c1fe 100644
+--- a/src/cpu/intel/fit/Makefile.inc
++++ b/src/cpu/intel/fit/Makefile.inc
+@@ -16,36 +16,3 @@ $(call add_intermediate, set_fit_ptr, $(IFITTOOL))
+ 	$(IFITTOOL) -f $< -F -n intel_fit -r COREBOOT -c
+ 
+ FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG))
+-
+-ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock
+-
+-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
+-
+-$(call add_intermediate, add_mcu_fit, set_fit_ptr $(IFITTOOL))
+-	@printf "    UPDATE-FIT Microcode\n"
+-	$(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
+-
+-# Second FIT in TOP_SWAP bootblock
+-ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
+-
+-$(call add_intermediate, set_ts_fit_ptr, $(IFITTOOL))
+-	@printf "    UPDATE-FIT Top Swap: set FIT pointer to table\n"
+-	$(IFITTOOL) -f $< -F -n intel_fit_ts -r COREBOOT $(TS_OPTIONS)
+-
+-$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr $(IFITTOOL))
+-	@printf "    UPDATE-FIT Top Swap: Microcode\n"
+-ifneq ($(FIT_ENTRY),)
+-	$(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
+-endif # FIT_ENTRY
+-	$(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
+-
+-cbfs-files-y += intel_fit_ts
+-intel_fit_ts-file := fit_table.c:struct
+-intel_fit_ts-type := intel_fit
+-intel_fit_ts-align := 16
+-
+-endif # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK
+-
+-endif # CONFIG_CPU_MICROCODE_CBFS_NONE
+-
+-endif # CONFIG_UPDATE_IMAGE
+diff --git a/src/soc/amd/common/block/cpu/Makefile.inc b/src/soc/amd/common/block/cpu/Makefile.inc
+index bd9e8ff88f..6f95b9684c 100644
+--- a/src/soc/amd/common/block/cpu/Makefile.inc
++++ b/src/soc/amd/common/block/cpu/Makefile.inc
+@@ -6,7 +6,6 @@ ramstage-y += cpu.c
+ 
+ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE),y)
+ define add-ucode-as-cbfs
+-cbfs-files-y += cpu_microcode_$(2).bin
+ cpu_microcode_$(2).bin-file := $(1)
+ cpu_microcode_$(2).bin-type := microcode
+ 
+-- 
+2.40.1
+

resources/coreboot/e6400_4mb/board.cfg

@@ -0,0 +1,10 @@
+cbtree="default"
+romtype="4MiB ICH9 IFD NOR flash"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+microcode_required="n"
+blobs_required="n"

resources/coreboot/e6400_4mb/config/libgfxinit_corebootfb

@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
+CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-CONFIG_VENDOR_INTEL=y
-# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,124 +93,88 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="intel/d945gclf"
-CONFIG_VGA_BIOS_ID="8086,2772"
+CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_VGA_BIOS_ID="8086,2a42"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Intel"
-CONFIG_CBFS_SIZE=0x01000000
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
-CONFIG_IRQ_SLOT_COUNT=18
-# CONFIG_VBOOT is not set
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_POST_IO=y
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_POST_DEVICE=y
+CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
-CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_BOARD_INTEL_ADLRVP_P is not set
-# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
-# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
-# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
-# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
-# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
-# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
-
-#
-# Coffeelake RVP
-#
-# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
-# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
-# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
-# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_D510MO is not set
-CONFIG_BOARD_INTEL_D945GCLF=y
-# CONFIG_BOARD_INTEL_DCP847SKE is not set
-# CONFIG_BOARD_INTEL_DG41WV is not set
-# CONFIG_BOARD_INTEL_DG43GT is not set
-# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
-# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
-# CONFIG_BOARD_INTEL_GALILEO is not set
-# CONFIG_BOARD_INTEL_GLKRVP is not set
-# CONFIG_BOARD_INTEL_HARCUVAR is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
-# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
-# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
-# CONFIG_BOARD_INTEL_KBLRVP3 is not set
-# CONFIG_BOARD_INTEL_KBLRVP7 is not set
-# CONFIG_BOARD_INTEL_KBLRVP8 is not set
-# CONFIG_BOARD_INTEL_KBLRVP11 is not set
-# CONFIG_BOARD_INTEL_KUNIMITSU is not set
-# CONFIG_BOARD_INTEL_LEAFHILL is not set
-# CONFIG_BOARD_INTEL_MINNOW3 is not set
-# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
-# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
-# CONFIG_BOARD_INTEL_STRAGO is not set
-# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
-# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
-# CONFIG_BOARD_INTEL_WTM2 is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
+# CONFIG_HAVE_IFD_BIN is not set
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
-CONFIG_BOARD_ROMSIZE_KB_512=y
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x01000000
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
 CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
 CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
@@ -215,6 +183,8 @@ CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
 CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 # end of Mainboard
 
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
 #
 # Chipset
 #
@@ -222,41 +192,37 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_RAMBASE=0xe00000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x1000
+CONFIG_STACK_SIZE=0x2000
 CONFIG_VBT_DATA_SIZE_KB=8
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_AZALIA_MAX_CODECS=3
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_UART_PCI_ADDR=0x0
-CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
-CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
 
 #
 # CPU
 #
-CONFIG_CPU_INTEL_MODEL_106CX=y
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
 CONFIG_SOCKET_SPECIFIC_OPTIONS=y
-CONFIG_SSE2=y
-CONFIG_CPU_INTEL_SOCKET_441=y
+CONFIG_CPU_INTEL_SOCKET_P=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
 CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -268,6 +234,7 @@ CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
 # CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
@@ -275,14 +242,12 @@ CONFIG_SETUP_XIP_CACHE=y
 CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SERIALIZED_SMM_INITIALIZATION=y
-CONFIG_CPU_INFO_V2=y
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
 CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -293,45 +258,46 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 #
 # Northbridge
 #
-CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_NORTHBRIDGE_INTEL_I945=y
-CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
 
 #
 # Southbridge
 #
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_PCIEXP_HOTPLUG=y
-CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
 
 #
 # Super I/O
 #
-CONFIG_SUPERIO_SMSC_LPC47M15X=y
 
 #
 # Embedded Controllers
 #
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -339,34 +305,39 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_AP_IN_SIPI_WAIT=y
-CONFIG_SIPI_VECTOR_IN_ROM=y
-CONFIG_RAMTOP=0x1000000
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_HPET_ADDRESS=0xfed00000
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # end of Chipset
 
 #
 # Devices
 #
 CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
 #
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
 # end of Display
 
 CONFIG_PCI=y
@@ -379,16 +350,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
 # end of Devices
 
 #
@@ -412,14 +393,28 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -431,6 +426,12 @@ CONFIG_VGA=y
 # Security
 #
 
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
 #
 # Verified Boot (vboot)
 #
@@ -475,6 +476,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -485,6 +487,8 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
@@ -499,14 +503,10 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 CONFIG_HAVE_OPTION_TABLE=y
 CONFIG_IOAPIC=y
 CONFIG_USE_WATCHDOG_ON_BOOT=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
 
 #
 # System tables
 #
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
@@ -515,28 +515,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -559,17 +537,20 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
 # end of Debugging
 
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

resources/coreboot/e6400_4mb/config/libgfxinit_txtmode

@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
+CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-CONFIG_VENDOR_INTEL=y
-# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,114 +93,76 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="intel/d945gclf"
-CONFIG_VGA_BIOS_ID="8086,2772"
+CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_VGA_BIOS_ID="8086,2a42"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Intel"
-CONFIG_CBFS_SIZE=0x00080000
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
 CONFIG_MAX_CPUS=4
-CONFIG_IRQ_SLOT_COUNT=18
-# CONFIG_VBOOT is not set
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_POST_IO=y
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_POST_DEVICE=y
+CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
-CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_BOARD_INTEL_ADLRVP_P is not set
-# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
-# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
-# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
-# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
-# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
-# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
-
-#
-# Coffeelake RVP
-#
-# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
-# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
-# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
-# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_D510MO is not set
-CONFIG_BOARD_INTEL_D945GCLF=y
-# CONFIG_BOARD_INTEL_DCP847SKE is not set
-# CONFIG_BOARD_INTEL_DG41WV is not set
-# CONFIG_BOARD_INTEL_DG43GT is not set
-# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
-# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
-# CONFIG_BOARD_INTEL_GALILEO is not set
-# CONFIG_BOARD_INTEL_GLKRVP is not set
-# CONFIG_BOARD_INTEL_HARCUVAR is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
-# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
-# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
-# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
-# CONFIG_BOARD_INTEL_KBLRVP3 is not set
-# CONFIG_BOARD_INTEL_KBLRVP7 is not set
-# CONFIG_BOARD_INTEL_KBLRVP8 is not set
-# CONFIG_BOARD_INTEL_KBLRVP11 is not set
-# CONFIG_BOARD_INTEL_KUNIMITSU is not set
-# CONFIG_BOARD_INTEL_LEAFHILL is not set
-# CONFIG_BOARD_INTEL_MINNOW3 is not set
-# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
-# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
-# CONFIG_BOARD_INTEL_STRAGO is not set
-# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
-# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
-# CONFIG_BOARD_INTEL_WTM2 is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
+# CONFIG_HAVE_IFD_BIN is not set
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
-CONFIG_BOARD_ROMSIZE_KB_512=y
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_512=y
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
@@ -205,8 +171,8 @@ CONFIG_COREBOOT_ROMSIZE_KB_512=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=512
-CONFIG_ROM_SIZE=0x00080000
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
 CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
 CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
@@ -215,6 +181,8 @@ CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
 CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 # end of Mainboard
 
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
 #
 # Chipset
 #
@@ -222,41 +190,37 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_RAMBASE=0xe00000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x1000
+CONFIG_STACK_SIZE=0x2000
 CONFIG_VBT_DATA_SIZE_KB=8
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_AZALIA_MAX_CODECS=3
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_UART_PCI_ADDR=0x0
-CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
-CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
 
 #
 # CPU
 #
-CONFIG_CPU_INTEL_MODEL_106CX=y
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
 CONFIG_SOCKET_SPECIFIC_OPTIONS=y
-CONFIG_SSE2=y
-CONFIG_CPU_INTEL_SOCKET_441=y
+CONFIG_CPU_INTEL_SOCKET_P=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
 CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -268,6 +232,7 @@ CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
 # CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
@@ -275,14 +240,12 @@ CONFIG_SETUP_XIP_CACHE=y
 CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SERIALIZED_SMM_INITIALIZATION=y
-CONFIG_CPU_INFO_V2=y
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
 CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -293,45 +256,46 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 #
 # Northbridge
 #
-CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_NORTHBRIDGE_INTEL_I945=y
-CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
 
 #
 # Southbridge
 #
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_PCIEXP_HOTPLUG=y
-CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
 
 #
 # Super I/O
 #
-CONFIG_SUPERIO_SMSC_LPC47M15X=y
 
 #
 # Embedded Controllers
 #
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -339,34 +303,37 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_AP_IN_SIPI_WAIT=y
-CONFIG_SIPI_VECTOR_IN_ROM=y
-CONFIG_RAMTOP=0x1000000
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_HPET_ADDRESS=0xfed00000
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # end of Chipset
 
 #
 # Devices
 #
 CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
 # end of Display
 
 CONFIG_PCI=y
@@ -379,16 +346,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
 # end of Devices
 
 #
@@ -412,14 +389,28 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -431,6 +422,12 @@ CONFIG_VGA=y
 # Security
 #
 
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
 #
 # Verified Boot (vboot)
 #
@@ -475,6 +472,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -485,6 +483,8 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
@@ -499,14 +499,10 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 CONFIG_HAVE_OPTION_TABLE=y
 CONFIG_IOAPIC=y
 CONFIG_USE_WATCHDOG_ON_BOOT=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
 
 #
 # System tables
 #
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
@@ -515,28 +511,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -559,17 +533,20 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
 # end of Debugging
 
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

resources/coreboot/fam15h_rdimm/blobs.list

@@ -0,0 +1,22 @@
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+3rdparty/chromeec/test/legacy_nvmem_dump.h
+3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse.c

resources/coreboot/fam15h_rdimm/board.cfg

@@ -0,0 +1,9 @@
+cbtree="fam15h_rdimm"
+romtype="normal"
+cbrevision="1c13f8d85c7306213cd525308ee8973e5663a3f8"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="n"
+payload_memtest="n"
+crossgcc_ada="n"

resources/coreboot/fam15h_rdimm/deblob-check.results.list

@@ -0,0 +1,825 @@
+./3rdparty/arm-trusted-firmware/docs/design/firmware-design.rst
+./3rdparty/arm-trusted-firmware/docs/getting_started/user-guide.rst
+./3rdparty/arm-trusted-firmware/drivers/marvell/comphy/phy-comphy-3700.c
+./3rdparty/arm-trusted-firmware/drivers/st/pmic/stpmic1.c
+./3rdparty/arm-trusted-firmware/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c
+./3rdparty/arm-trusted-firmware/lib/romlib/gen_combined_bl1_romlib.sh
+./3rdparty/arm-trusted-firmware/lib/zlib/crc32.h
+./3rdparty/arm-trusted-firmware/lib/zlib/inffixed.h
+./3rdparty/arm-trusted-firmware/lib/zlib/inftrees.c
+./3rdparty/arm-trusted-firmware/plat/arm/board/fvp/fvp_io_storage.c
+./3rdparty/arm-trusted-firmware/plat/arm/css/sgi/sgi_topology.c
+./3rdparty/arm-trusted-firmware/plat/hisilicon/hikey/hisi_dvfs.c
+./3rdparty/arm-trusted-firmware/plat/hisilicon/poplar/include/platform_def.h
+./3rdparty/arm-trusted-firmware/plat/hisilicon/poplar/include/poplar_layout.h
+./3rdparty/arm-trusted-firmware/plat/intel/soc/agilex/soc/agilex_pinmux.c
+./3rdparty/arm-trusted-firmware/plat/intel/soc/stratix10/soc/s10_pinmux.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a70x0/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a70x0_amc/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a80x0/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a80x0_mcbin/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+./3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+./3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+./3rdparty/arm-trusted-firmware/plat/qemu/common/qemu_io_storage.c
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dfs.c
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/startup.c
+./3rdparty/arm-trusted-firmware/plat/rpi/common/rpi3_io_storage.c
+./3rdparty/arm-trusted-firmware/plat/socionext/synquacer/sq_spm.c
+./3rdparty/arm-trusted-firmware/plat/st/stm32mp1/platform.mk
+./3rdparty/arm-trusted-firmware/tools/amlogic/doimage.c
+./3rdparty/arm-trusted-firmware/tools/fiptool/fiptool.c
+./3rdparty/chromeec/board/bloog/board.c
+./3rdparty/chromeec/board/coffeecake/board.c
+./3rdparty/chromeec/board/cr50/tpm2/ecc.c
+./3rdparty/chromeec/board/cr50/tpm2/endorsement.c
+./3rdparty/chromeec/board/cr50/tpm2/rsa.c
+./3rdparty/chromeec/board/dingdong/board.c
+./3rdparty/chromeec/board/flapjack/battery.c
+./3rdparty/chromeec/board/hoho/board.c
+./3rdparty/chromeec/board/kukui_scp/update_scp
+./3rdparty/chromeec/board/meep/board.c
+./3rdparty/chromeec/chip/g/dcrypto/bn.c
+./3rdparty/chromeec/chip/g/dcrypto/hmac_drbg.c
+./3rdparty/chromeec/chip/mchp/util/pack_ec.py
+./3rdparty/chromeec/chip/mec1322/util/pack_ec.py
+./3rdparty/chromeec/chip/stm32/usb_hid_keyboard.c
+./3rdparty/chromeec/chip/stm32/usb_hid_touchpad.c
+./3rdparty/chromeec/common/crc.c
+./3rdparty/chromeec/common/ctz.c
+./3rdparty/chromeec/common/keyboard_8042_sharedlib.c
+./3rdparty/chromeec/common/lightbar.c
+./3rdparty/chromeec/common/mock/rollback_mock.c
+./3rdparty/chromeec/common/sha256.c
+./3rdparty/chromeec/core/riscv-rv32i/init.S
+./3rdparty/chromeec/driver/als_tcs3400.c
+./3rdparty/chromeec/driver/led/lm3509.c
+./3rdparty/chromeec/driver/regulator_ir357x.c
+./3rdparty/chromeec/driver/touchpad_elan.c
+./3rdparty/chromeec/extra/rma_reset/rma_reset.c
+./3rdparty/chromeec/extra/touchpad_updater/touchpad_updater.c
+./3rdparty/chromeec/extra/usb_updater/fw_update.py
+./3rdparty/chromeec/extra/usb_updater/servo_updater.py
+./3rdparty/chromeec/fuzz/nvmem_tpm2_mock.c
+./3rdparty/chromeec/setup.py
+./3rdparty/chromeec/test/aes.c
+./3rdparty/chromeec/test/fpsensor.c
+./3rdparty/chromeec/test/legacy_nvmem_dump.h
+./3rdparty/chromeec/test/nvmem_tpm2_mock.c
+./3rdparty/chromeec/test/pinweaver.c
+./3rdparty/chromeec/test/rsa2048-3.h
+./3rdparty/chromeec/test/rsa2048-F4.h
+./3rdparty/chromeec/test/sha256.c
+./3rdparty/chromeec/test/test_config.h
+./3rdparty/chromeec/test/thermal.c
+./3rdparty/chromeec/test/tpm_test/rsa_test.py
+./3rdparty/chromeec/test/usb_prl.c
+./3rdparty/chromeec/test/x25519.c
+./3rdparty/chromeec/third_party/boringssl/common/aes.c
+./3rdparty/chromeec/third_party/boringssl/core/cortex-m/aes.S
+./3rdparty/chromeec/util/ec_sb_firmware_update.c
+./3rdparty/chromeec/util/ectool_keyscan.c
+./3rdparty/chromeec/util/flash_ec
+./3rdparty/chromeec/util/flash_fp_mcu
+./3rdparty/chromeec/util/flash_pd.py
+./3rdparty/chromeec/util/signer/create_released_image.sh
+./3rdparty/chromeec/util/uut/lib_crc.c
+./3rdparty/libgfxinit/common/skylake/hw-gfx-gma-plls-dpll.adb
+./3rdparty/opensbi/Makefile
+./3rdparty/vboot/cgpt/cgpt_wrapper.c
+./3rdparty/vboot/firmware/2lib/2sha256.c
+./3rdparty/vboot/firmware/2lib/2sha512.c
+./3rdparty/vboot/firmware/lib/cgptlib/crc32.c
+./3rdparty/vboot/firmware/lib/tpm_lite/include/tlcl_structures.h
+./3rdparty/vboot/futility/cmd_gbb_utility.c
+./3rdparty/vboot/futility/file_type_rwsig.c
+./3rdparty/vboot/futility/updater.c
+./3rdparty/vboot/futility/updater_archive.c
+./3rdparty/vboot/scripts/image_signing/make_dev_firmware.sh
+./3rdparty/vboot/scripts/image_signing/make_dev_ssd.sh
+./3rdparty/vboot/scripts/image_signing/sign_android_image.sh
+./3rdparty/vboot/scripts/image_signing/sign_cr50_firmware.sh
+./3rdparty/vboot/scripts/image_signing/sign_nv_cbootimage.sh
+./3rdparty/vboot/scripts/image_signing/sign_official_build.sh
+./3rdparty/vboot/scripts/image_signing/strip_boot_from_image.sh
+./3rdparty/vboot/scripts/image_signing/tag_image.sh
+./3rdparty/vboot/scripts/image_signing/tofactory.sh
+./3rdparty/vboot/tests/cgptlib_test.c
+./3rdparty/vboot/tests/crc32_test.c
+./3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+./3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+./3rdparty/vboot/tests/futility/link_bios.manifest.json
+./3rdparty/vboot/tests/futility/link_image.manifest.json
+./3rdparty/vboot/tests/futility/models/link/setvars.sh
+./3rdparty/vboot/tests/futility/models/peppy/setvars.sh
+./3rdparty/vboot/tests/futility/models/whitetip/setvars.sh
+./3rdparty/vboot/tests/futility/test_dump_fmap.sh
+./3rdparty/vboot/tests/futility/test_file_types.c
+./3rdparty/vboot/tests/futility/test_file_types.sh
+./3rdparty/vboot/tests/futility/test_rwsig.sh
+./3rdparty/vboot/tests/futility/test_sign_firmware.sh
+./3rdparty/vboot/tests/futility/test_update.sh
+./3rdparty/vboot/tests/gen_preamble_testdata.sh
+./3rdparty/vboot/tests/load_kernel_tests.sh
+./3rdparty/vboot/tests/rsa_padding_test.h
+./3rdparty/vboot/tests/run_vbutil_kernel_arg_tests.sh
+./3rdparty/vboot/tests/sha_test_vectors.h
+./3rdparty/vboot/tests/testcases/padding_test_vectors.inc
+./3rdparty/vboot/tests/tlcl_tests.c
+./3rdparty/vboot/tests/vb21_host_misc_tests.c
+./3rdparty/vboot/tests/vb2_api_tests.c
+./3rdparty/vboot/tests/vb2_sha_tests.c
+./3rdparty/vboot/utility/vbutil_what_keys
+./Documentation/Intel/SoC/soc.html
+./Documentation/releases/coreboot-4.2-relnotes.md
+./Documentation/soc/intel/fit.md
+./Documentation/tutorial/part1.md
+./Documentation/codeflow.svg
+./Documentation/hypertransport.svg
+./configs/builder/config.lenovo_t420
+./configs/builder/config.lenovo_t420s
+./configs/builder/config.lenovo_t430s
+./configs/builder/config.lenovo_t520
+./configs/builder/config.lenovo_t530
+./configs/builder/config.lenovo_x220
+./configs/builder/config.lenovo_x220i
+./configs/builder/config.lenovo_x230
+./payloads/external/FILO/Kconfig
+./payloads/external/GRUB2/Kconfig
+./payloads/external/SeaBIOS/Kconfig
+./payloads/external/U-Boot/Kconfig
+./payloads/external/Yabits/Kconfig
+./payloads/external/depthcharge/Kconfig
+./payloads/libpayload/curses/PDCurses/demos/worm.c
+./payloads/libpayload/curses/PDCurses/sdl1/deffont.h
+./payloads/libpayload/curses/PDCurses/sdl1/deficon.h
+./payloads/libpayload/curses/PDCurses/win32/pdckbd.c
+./payloads/libpayload/curses/PDCurses/x11/big_icon.xbm
+./payloads/libpayload/curses/PDCurses/x11/little_icon.xbm
+./payloads/libpayload/curses/pdcurses-backend/pdcdisp.c
+./payloads/libpayload/curses/tinycurses.c
+./payloads/libpayload/drivers/i8042/keyboard.c
+./payloads/libpayload/drivers/usb/usbmsc.c
+./payloads/libpayload/tests/cbfs-x86-test.c
+./payloads/nvramcui/payload.sh
+./payloads/Kconfig
+./src/cpu/amd/pi/00730F01/Makefile.inc
+./src/cpu/amd/pi/00730F01/microcode_fam16h.c
+./src/cpu/amd/pi/00730F01/model_16_init.c
+./src/cpu/amd/pi/00730F01/update_microcode.c
+./src/cpu/amd/family_10h-family_15h/Makefile.inc
+./src/cpu/amd/family_10h-family_15h/init_cpus.c
+./src/cpu/amd/family_10h-family_15h/init_cpus.h
+./src/cpu/amd/family_10h-family_15h/processor_name.c
+./src/cpu/amd/family_10h-family_15h/update_microcode.c
+./src/cpu/amd/microcode/microcode.c
+./src/cpu/intel/car/non-evict/cache_as_ram.S
+./src/cpu/intel/car/p4-netburst/cache_as_ram.S
+./src/cpu/intel/haswell/acpi.c
+./src/cpu/intel/microcode/Kconfig
+./src/cpu/intel/microcode/microcode.c
+./src/cpu/intel/microcode/microcode_asm.S
+./src/cpu/intel/model_2065x/acpi.c
+./src/cpu/intel/model_206ax/acpi.c
+./src/cpu/intel/model_65x/model_65x_init.c
+./src/cpu/intel/model_67x/model_67x_init.c
+./src/cpu/intel/model_68x/model_68x_init.c
+./src/cpu/intel/model_6bx/model_6bx_init.c
+./src/cpu/intel/model_6xx/model_6xx_init.c
+./src/cpu/intel/model_f2x/model_f2x_init.c
+./src/cpu/intel/model_f3x/model_f3x_init.c
+./src/cpu/intel/fsp_model_406dx/acpi.c
+./src/cpu/intel/fsp_model_406dx/bootblock.c
+./src/cpu/intel/fsp_model_406dx/model_406dx_init.c
+./src/cpu/Kconfig
+./src/cpu/Makefile.inc
+./src/device/oprom/yabel/interrupt.c
+./src/device/Kconfig
+./src/drivers/aspeed/common/ast_dram_tables.h
+./src/drivers/aspeed/common/ast_tables.h
+./src/drivers/i2c/ww_ring/ww_ring_programs.c
+./src/drivers/intel/fsp1_1/cache_as_ram.S
+./src/drivers/intel/fsp1_1/car.c
+./src/drivers/intel/fsp1_1/ramstage.c
+./src/drivers/intel/fsp1_1/romstage.c
+./src/drivers/intel/fsp1_1/temp_ram_exit.c
+./src/drivers/intel/fsp2_0/Kconfig
+./src/drivers/intel/gma/opregion.c
+./src/drivers/intel/gma/opregion.h
+./src/drivers/intel/fsp1_0/fsp_util.c
+./src/drivers/pc80/rtc/mc146818rtc.c
+./src/drivers/pc80/vga/vga_palette.c
+./src/drivers/siemens/nc_fpga/nc_fpga.c
+./src/drivers/wifi/Kconfig
+./src/drivers/xgi/common/XGI_main.h
+./src/drivers/xgi/common/vb_setmode.c
+./src/drivers/xgi/common/vb_table.h
+./src/ec/hp/kbc1126/Kconfig
+./src/include/cpu/amd/microcode.h
+./src/include/cpu/intel/microcode.h
+./src/include/spd_bin.h
+./src/lib/coreboot_table.c
+./src/lib/jpeg.c
+./src/lib/spd_bin.c
+./src/mainboard/amd/gardenia/bootblock/OemCustomize.c
+./src/mainboard/amd/inagua/Kconfig
+./src/mainboard/amd/olivehill/mptable.c
+./src/mainboard/amd/parmer/mptable.c
+./src/mainboard/amd/persimmon/Kconfig
+./src/mainboard/amd/south_station/Kconfig
+./src/mainboard/amd/south_station/mptable.c
+./src/mainboard/amd/thatcher/mptable.c
+./src/mainboard/amd/union_station/Kconfig
+./src/mainboard/amd/union_station/mptable.c
+./src/mainboard/amd/bimini_fam10/mptable.c
+./src/mainboard/amd/bimini_fam10/romstage.c
+./src/mainboard/amd/db-ft3b-lc/Memphis_MEM4G16D3EABG.spd.hex
+./src/mainboard/amd/lamar/Kconfig
+./src/mainboard/amd/mahogany_fam10/romstage.c
+./src/mainboard/amd/olivehillplus/mptable.c
+./src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+./src/mainboard/amd/tilapia_fam10/romstage.c
+./src/mainboard/apple/macbookair4_2/early_init.c
+./src/mainboard/asrock/b75pro3-m/early_init.c
+./src/mainboard/asrock/e350m1/mptable.c
+./src/mainboard/asrock/imb-a180/mptable.c
+./src/mainboard/asus/f2a85-m/mptable.c
+./src/mainboard/asus/h61m-cs/early_init.c
+./src/mainboard/asus/maximus_iv_gene-z/early_init.c
+./src/mainboard/asus/p8h61-m_lx/early_init.c
+./src/mainboard/asus/p8h61-m_pro/early_init.c
+./src/mainboard/asus/kcma-d8/romstage.c
+./src/mainboard/asus/kfsn4-dre/romstage.c
+./src/mainboard/asus/kgpe-d16/romstage.c
+./src/mainboard/asus/m4a78-em/romstage.c
+./src/mainboard/asus/m4a785-m/romstage.c
+./src/mainboard/asus/m5a88-v/mptable.c
+./src/mainboard/asus/m5a88-v/romstage.c
+./src/mainboard/bap/ode_e20XX/BAP_Q7_1066.spd.hex
+./src/mainboard/bap/ode_e20XX/BAP_Q7_800.spd.hex
+./src/mainboard/bap/ode_e21XX/BAP_Q7_1066.spd.hex
+./src/mainboard/bap/ode_e21XX/BAP_Q7_1333.spd.hex
+./src/mainboard/bap/ode_e21XX/BAP_Q7_800.spd.hex
+./src/mainboard/bap/ode_e21XX/mptable.c
+./src/mainboard/biostar/a68n_5200/mptable.c
+./src/mainboard/compulab/intense_pc/early_init.c
+./src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex
+./src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex
+./src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex
+./src/mainboard/facebook/fbg1701/board_mboot.h
+./src/mainboard/facebook/fbg1701/board_verified_boot.c
+./src/mainboard/facebook/fbg1701/onboard.h
+./src/mainboard/facebook/fbg1701/ramstage.c
+./src/mainboard/gigabyte/ga-b75m-d3h/early_init.c
+./src/mainboard/gigabyte/ga-h61m-s2pv/early_init.c
+./src/mainboard/gigabyte/ma785gm/romstage.c
+./src/mainboard/gigabyte/ma785gmt/romstage.c
+./src/mainboard/gigabyte/ma78gm/romstage.c
+./src/mainboard/gizmosphere/gizmo/mptable.c
+./src/mainboard/gizmosphere/gizmo2/Micron_MT41J128M16JT.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/spd.c
+./src/mainboard/google/auron/variants/auron_yuna/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/spd.c
+./src/mainboard/google/auron/variants/buddy/variant.c
+./src/mainboard/google/auron/variants/gandof/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/Samsung_M471B5674EB0-YK0.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/spd.c
+./src/mainboard/google/auron/variants/lulu/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/hynix_4GiB_dimm_H5TC8G63CMR-PBA.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/micron_4GiB_dimm_MT41K512M16TNA-125.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/samsung_2GiB_dimm_K4B4G1646E-BYK0.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/samsung_4GiB_dimm_K4B8G1646Q-MYK0.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/spd.c
+./src/mainboard/google/auron/variants/samus/spd/elpida_16.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/elpida_4.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/elpida_8.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/hynix_16.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/hynix_4.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/hynix_8.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/samsung_4.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/samsung_8.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/spd.c
+./src/mainboard/google/beltino/lan.c
+./src/mainboard/google/butterfly/hda_verb.c
+./src/mainboard/google/butterfly/mainboard.c
+./src/mainboard/google/cyan/spd/empty.spd.hex
+./src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex
+./src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8GTALAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8GTMLAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_EDF8132A3MA-GD-F-R.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_EDF8132A3MA-JD-F.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_MT41K256M16TW-107.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_MT52L256M32D1PF-107WT.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_MT52L256M32D1PF.spd.hex
+./src/mainboard/google/cyan/spd/micron_dimm_MT52L256M32D1PF-107.spd.hex
+./src/mainboard/google/cyan/spd/nanya_dimm_NT6CL256T32CM-H1.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646E-BYK0.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4E8E304EE-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/spd.c
+./src/mainboard/google/cyan/Kconfig
+./src/mainboard/google/drallion/spd/empty_ddr4.spd.hex
+./src/mainboard/google/drallion/spd/hynix_dimm_H5AN8G6NCJR-VKC.spd.hex
+./src/mainboard/google/drallion/spd/hynix_dimm_H5ANAG6NCMR-VKC.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KNR-075E.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A512M16LY-075E.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A512M16TB-062EJ.spd.hex
+./src/mainboard/google/drallion/spd/samsung_dimm_K4A8G165WC-BCTD.spd.hex
+./src/mainboard/google/drallion/spd/samsung_dimm_K4AAG165WB-MCTD.spd.hex
+./src/mainboard/google/drallion/variants/drallion/devicetree.cb
+./src/mainboard/google/drallion/variants/drallion/memory.c
+./src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb
+./src/mainboard/google/eve/spd/empty.spd.hex
+./src/mainboard/google/eve/spd/hynix_dimm_H9CCNNN8GTALAR.spd.hex
+./src/mainboard/google/eve/spd/hynix_dimm_H9CCNNNBJTALAR.spd.hex
+./src/mainboard/google/eve/spd/hynix_dimm_H9CCNNNCLTMLAR.spd.hex
+./src/mainboard/google/eve/spd/samsung_dimm_K4E6E304EB.spd.hex
+./src/mainboard/google/eve/spd/samsung_dimm_K4E8E324EB.spd.hex
+./src/mainboard/google/eve/spd/samsung_dimm_K4EBE304EB.spd.hex
+./src/mainboard/google/eve/spd/spd.c
+./src/mainboard/google/glados/spd/empty.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8GTALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8GTMLAR-NUD.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8GTMLAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBJTALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBJTMLAR-NUD.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBJTMLAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNCLGALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNCLTMLAR.spd.hex
+./src/mainboard/google/glados/spd/micron_16GiB_dimm_MT52L1G32D4PG.spd.hex
+./src/mainboard/google/glados/spd/micron_4GiB_dimm_MT52L256M32D1PF.spd.hex
+./src/mainboard/google/glados/spd/micron_8GiB_dimm_MT52L512M32D2PF.spd.hex
+./src/mainboard/google/glados/spd/micron_dimm_MT52L256M32D1PF-107-1G-1866.spd.hex
+./src/mainboard/google/glados/spd/micron_dimm_MT52L512M32D2PF-107-2G-1866.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EB-EGCF-2G-1866.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EB-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E304EE-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E324EB-EGCF-1G-1866.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4EBE304EB-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4EBE304EB-EGCG.spd.hex
+./src/mainboard/google/glados/spd/spd.c
+./src/mainboard/google/glados/Kconfig
+./src/mainboard/google/hatch/spd/16G_2400.spd.hex
+./src/mainboard/google/hatch/spd/16G_2666.spd.hex
+./src/mainboard/google/hatch/spd/16G_2666_2bg.spd.hex
+./src/mainboard/google/hatch/spd/16G_3200.spd.hex
+./src/mainboard/google/hatch/spd/16G_3200_4bg.spd.hex
+./src/mainboard/google/hatch/spd/4G_2400.spd.hex
+./src/mainboard/google/hatch/spd/8G_2400.spd.hex
+./src/mainboard/google/hatch/spd/8G_2666.spd.hex
+./src/mainboard/google/hatch/spd/8G_3200.spd.hex
+./src/mainboard/google/hatch/spd/LP_16G_2133.spd.hex
+./src/mainboard/google/hatch/spd/LP_8G_2133.spd.hex
+./src/mainboard/google/hatch/spd/empty_ddr4.spd.hex
+./src/mainboard/google/hatch/variants/dratini/variant.c
+./src/mainboard/google/jecht/lan.c
+./src/mainboard/google/kahlee/spd/empty.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5AN8G6NAFR-UH.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5AN8G6NCJR-VKC.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5AN8G6NCJR-XNC.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5ANAG6NAMR-UH.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5ANAG6NCMR-VKC.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5ANAG6NCMR-XNC.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A1G16KNR-075-E.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A1G16RC-062E-B.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A512M16JY-083E-B.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A512M16LY-075-E.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A512M16TB-062E-J.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4A8G165WB-BCRC.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4A8G165WC-BCTD.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4A8G165WC-BCWE.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WA-BCTD.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WA-BCWE.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WB-MCRC.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WB-MCTD.spd.hex
+./src/mainboard/google/kahlee/variants/baseboard/mainboard.c
+./src/mainboard/google/kahlee/Kconfig
+./src/mainboard/google/link/early_init.c
+./src/mainboard/google/link/elpida_4Gb_1600_x16.spd.hex
+./src/mainboard/google/link/hda_verb.c
+./src/mainboard/google/link/micron_4Gb_1600_1.35v_x16.spd.hex
+./src/mainboard/google/link/samsung_4Gb_1600_1.35v_x16.spd.hex
+./src/mainboard/google/octopus/variants/bloog/variant.c
+./src/mainboard/google/octopus/variants/bobba/variant.c
+./src/mainboard/google/octopus/variants/casta/variant.c
+./src/mainboard/google/octopus/variants/garg/variant.c
+./src/mainboard/google/octopus/variants/meep/variant.c
+./src/mainboard/google/octopus/variants/phaser/mainboard.c
+./src/mainboard/google/peach_pit/mainboard.c
+./src/mainboard/google/poppy/spd/empty.spd.hex
+./src/mainboard/google/poppy/spd/empty_ddr4.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NAFR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NBJR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN8G6NAFR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN8G6NCJR-VKC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5ANAG6NAMR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5ANAG6NCMR-VKC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNN8GTALAR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBJTALAR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBKTALBR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCLGALAR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCLGALAR-NVD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCPTALBR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNFAGMLLR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A1G16KNR-075E.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A256M16GE-083E.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A256M16LY-075F.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A512M16LY-075E.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A512M16TB-062EJ.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L1G32D4PG-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L1G64D8QC-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L256M32D1PF-093.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L256M32D1PF-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L256M64D2PP-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L512M32D2PF-093.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L512M32D2PF-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L512M64D4PQ-107.spd.hex
+./src/mainboard/google/poppy/spd/nayna_dimm_NT6CL256T32CM-H1.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K3QF3F30BM-AGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K3QF4F40BM-AGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K3QFAFA0CM-AGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4A4G165WE-BCRC.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4A8G165WB-BCRC.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4A8G165WC-BCTD.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4AAG165WB-MCRC.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EB-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EC-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304ED-EGCG.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EB-EGCG.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCG.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304ED-EGCG.spd.hex
+./src/mainboard/google/poppy/variants/nami/mainboard.c
+./src/mainboard/google/poppy/romstage.c
+./src/mainboard/google/rambi/spd/HT_micron_HTTC4G63CFR-PBA_x16_4Gb.spd.hex
+./src/mainboard/google/rambi/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/rambi/spd/Samsung_2Gib_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/rambi/spd/Samsung_2Gib_M471B5674QH0.spd.hex
+./src/mainboard/google/rambi/spd/elpida_2GiB_dimm_EDJ4216EFBG-GNL-F.spd.hex
+./src/mainboard/google/rambi/spd/empty.spd.hex
+./src/mainboard/google/rambi/spd/hynix_1GiB_dimm_H5TC2G63FFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63CFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63MFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/micron_1GiB_dimm_MT41K128M16JT-125.spd.hex
+./src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex
+./src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125a.spd.hex
+./src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16TW-107.spd.hex
+./src/mainboard/google/rambi/spd/samsung_1GiB_dimm_K4B2G1646Q-BYK0.spd.hex
+./src/mainboard/google/rambi/spd/samsung_2GiB_dimm_K4B4G1646E-BYK0.spd.hex
+./src/mainboard/google/rambi/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/rambi/variants/ninja/lan.c
+./src/mainboard/google/rambi/variants/sumo/lan.c
+./src/mainboard/google/rambi/romstage.c
+./src/mainboard/google/reef/variants/coral/mainboard.c
+./src/mainboard/google/sarien/variants/arcada/devicetree.cb
+./src/mainboard/google/slippy/variants/falco/spd/Elpida_EDJ4216EFBG.spd.hex
+./src/mainboard/google/slippy/variants/falco/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/falco/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/falco/spd/Samsung_M471B5674QH0.spd.hex
+./src/mainboard/google/slippy/variants/falco/romstage.c
+./src/mainboard/google/slippy/variants/leon/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/leon/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/leon/spd/Samsung_K4B4G1646Q.spd.hex
+./src/mainboard/google/slippy/variants/leon/romstage.c
+./src/mainboard/google/slippy/variants/peppy/spd/Elpida_EDJ4216EFBG.spd.hex
+./src/mainboard/google/slippy/variants/peppy/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/peppy/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/peppy/romstage.c
+./src/mainboard/google/slippy/variants/wolf/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/wolf/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/wolf/spd/Samsung_K4B4G1646B.spd.hex
+./src/mainboard/google/slippy/variants/wolf/romstage.c
+./src/mainboard/google/dragonegg/romstage_fsp_params.c
+./src/mainboard/google/dragonegg/spd/Hynix_H9HCNNN8KUMLHR_2GB.spd.hex
+./src/mainboard/google/dragonegg/spd/Hynix_H9HCNNNCPMMLHR_4GB.spd.hex
+./src/mainboard/google/dragonegg/spd/Micron_MT53E2G32D8QD_8GB.spd.hex
+./src/mainboard/google/dragonegg/spd/Micron_MT53E512M32D2NP_2GB.spd.hex
+./src/mainboard/hp/abm/mptable.c
+./src/mainboard/hp/pavilion_m6_1035dx/mptable.c
+./src/mainboard/hp/z220_sff_workstation/early_init.c
+./src/mainboard/hp/2760p/early_init.c
+./src/mainboard/hp/8470p/early_init.c
+./src/mainboard/hp/dl165_g6_fam10/romstage.c
+./src/mainboard/hp/revolve_810_g1/early_init.c
+./src/mainboard/hp/revolve_810_g1/spd/hynix_4g.spd.hex
+./src/mainboard/ibase/mb899/cmos.layout
+./src/mainboard/ibase/mb899/superio_hwm.c
+./src/mainboard/intel/apollolake_rvp/romstage.c
+./src/mainboard/intel/coffeelake_rvp/variants/cml_u/include/variant/hda_verb.h
+./src/mainboard/intel/coffeelake_rvp/variants/whl_u/include/variant/hda_verb.h
+./src/mainboard/intel/glkrvp/romstage.c
+./src/mainboard/intel/harcuvar/spd/micron_4GiB_dimm_MTA9ASF51272PZ-2G1A2.spd.hex
+./src/mainboard/intel/harcuvar/spd/spd.c
+./src/mainboard/intel/icelake_rvp/spd/empty.spd.hex
+./src/mainboard/intel/icelake_rvp/spd/samsung_K4F6E304HBMGCJ.spd.hex
+./src/mainboard/intel/icelake_rvp/variants/icl_u/include/variant/hda_verb.h
+./src/mainboard/intel/icelake_rvp/variants/icl_y/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/spd/empty.spd.hex
+./src/mainboard/intel/kblrvp/spd/hynix_dimm_H9CCNNNBJTMLAR.spd.hex
+./src/mainboard/intel/kblrvp/spd/rvp3.spd.hex
+./src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/Kconfig
+./src/mainboard/intel/kunimitsu/spd/empty.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/mic_dimm_EDF8132A3MA-JD-F-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/spd_util.c
+./src/mainboard/intel/leafhill/Kconfig
+./src/mainboard/intel/leafhill/romstage.c
+./src/mainboard/intel/minnow3/Kconfig
+./src/mainboard/intel/minnow3/romstage.c
+./src/mainboard/intel/strago/Kconfig
+./src/mainboard/intel/cannonlake_rvp/spd/empty.spd.hex
+./src/mainboard/intel/cannonlake_rvp/spd/samsung_ddr4_4GB.spd.hex
+./src/mainboard/intel/cannonlake_rvp/spd/samsung_lpddr4_8GB.spd.hex
+./src/mainboard/intel/mohonpeak/Kconfig
+./src/mainboard/jetway/nf81-t56n-lf/Kconfig
+./src/mainboard/jetway/pa78vm5/romstage.c
+./src/mainboard/kontron/986lcd-m/cmos.layout
+./src/mainboard/kontron/986lcd-m/mainboard.c
+./src/mainboard/lenovo/g505s/mptable.c
+./src/mainboard/lenovo/s230u/spd/elpida_2gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/elpida_4gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/elpida_8gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/hynix_2gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/hynix_4gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/samsung_2gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/samsung_4gb.spd.hex
+./src/mainboard/lenovo/s230u/early_init.c
+./src/mainboard/lenovo/t430s/variants/t431s/spd/samsung_4gb.spd.hex
+./src/mainboard/lenovo/t430s/variants/t431s/romstage.c
+./src/mainboard/lenovo/x1_carbon_gen1/spd/elpida.hex
+./src/mainboard/lenovo/x1_carbon_gen1/spd/hynix.hex
+./src/mainboard/lenovo/x1_carbon_gen1/spd/samsung.hex
+./src/mainboard/lenovo/x1_carbon_gen1/early_init.c
+./src/mainboard/lenovo/x220/variants/x1/romstage.c
+./src/mainboard/lenovo/x220/early_init.c
+./src/mainboard/lippert/frontrunner-af/Kconfig
+./src/mainboard/lippert/frontrunner-af/mptable.c
+./src/mainboard/lippert/toucan-af/Kconfig
+./src/mainboard/lippert/toucan-af/mptable.c
+./src/mainboard/msi/ms7707/Kconfig
+./src/mainboard/msi/ms7707/early_init.c
+./src/mainboard/msi/ms7721/mptable.c
+./src/mainboard/msi/ms9652_fam10/romstage.c
+./src/mainboard/opencellular/elgon/gbcv2.dts
+./src/mainboard/packardbell/ms2290/mainboard.c
+./src/mainboard/pcengines/apu1/Kconfig
+./src/mainboard/pcengines/apu2/Kconfig
+./src/mainboard/portwell/m107/spd/KINGSTON_B5116ECMDXGGB.spd.hex
+./src/mainboard/portwell/m107/spd/MICRON_MT41K512M16HA-125A.spd.hex
+./src/mainboard/portwell/m107/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex
+./src/mainboard/razer/blade_stealth_kbl/spd/micron_dimm_MT52L1G32D4PG-107.spd.hex
+./src/mainboard/razer/blade_stealth_kbl/spd/micron_dimm_MT52L512M32D2PF-107.spd.hex
+./src/mainboard/samsung/lumpy/early_init.c
+./src/mainboard/sapphire/pureplatinumh61/early_init.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl1/lcd_panel.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl4/lcd_panel.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl5/lcd_panel.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c
+./src/mainboard/siemens/mc_apl1/mainboard.c
+./src/mainboard/siemens/mc_apl1/romstage.c
+./src/mainboard/siemens/mc_bdx1/mainboard.c
+./src/mainboard/siemens/mc_tcu3/lcd_panel.c
+./src/mainboard/siemens/mc_tcu3/mainboard.c
+./src/mainboard/siemens/mc_tcu3/romstage.c
+./src/mainboard/supermicro/h8dmr_fam10/romstage.c
+./src/mainboard/supermicro/h8qme_fam10/romstage.c
+./src/mainboard/supermicro/h8scm_fam10/romstage.c
+./src/mainboard/up/squared/romstage.c
+./src/mainboard/adi/rcc-dff/Kconfig
+./src/mainboard/advansus/a785e-i/mptable.c
+./src/mainboard/advansus/a785e-i/romstage.c
+./src/mainboard/avalue/eax-785e/mptable.c
+./src/mainboard/avalue/eax-785e/romstage.c
+./src/mainboard/iei/kino-780am2-fam10/romstage.c
+./src/mainboard/tyan/s2912_fam10/romstage.c
+./src/northbridge/amd/pi/00630F01/Kconfig
+./src/northbridge/amd/pi/00730F01/Kconfig
+./src/northbridge/amd/pi/00660F01/Kconfig
+./src/northbridge/amd/amdmct/mct/mctardk3.c
+./src/northbridge/amd/amdmct/mct/mctardk4.c
+./src/northbridge/amd/amdmct/mct/mcttmrl.c
+./src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c
+./src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+./src/northbridge/intel/gm45/raminit_read_write_training.c
+./src/northbridge/intel/haswell/Kconfig
+./src/northbridge/intel/haswell/raminit.c
+./src/northbridge/intel/i945/raminit.c
+./src/northbridge/intel/pineview/raminit.c
+./src/northbridge/intel/sandybridge/Kconfig
+./src/northbridge/intel/sandybridge/gma.c
+./src/northbridge/intel/sandybridge/raminit.c
+./src/northbridge/intel/sandybridge/raminit_mrc.c
+./src/northbridge/intel/sandybridge/raminit_patterns.h
+./src/northbridge/intel/x4x/dq_dqs.c
+./src/northbridge/intel/x4x/raminit_ddr23.c
+./src/northbridge/intel/x4x/raminit_tables.c
+./src/northbridge/intel/fsp_rangeley/fsp/Kconfig
+./src/northbridge/intel/nehalem/raminit.c
+./src/northbridge/intel/nehalem/raminit_tables.c
+./src/security/intel/txt/Kconfig
+./src/security/tpm/tss/tcg-1.2/tss_commands.h
+./src/security/vboot/secdata_tpm.c
+./src/soc/amd/picasso/Kconfig
+./src/soc/amd/stoneyridge/Kconfig
+./src/soc/cavium/cn81xx/Kconfig
+./src/soc/cavium/common/rom_clib_s_nbl1fw.bin.hex
+./src/soc/cavium/common/rom_csib_s_nbl1fw.bin.hex
+./src/soc/intel/apollolake/Kconfig
+./src/soc/intel/apollolake/nhlt.c
+./src/soc/intel/baytrail/bootblock/bootblock.c
+./src/soc/intel/baytrail/romstage/raminit.c
+./src/soc/intel/baytrail/Kconfig
+./src/soc/intel/baytrail/acpi.c
+./src/soc/intel/braswell/acpi.c
+./src/soc/intel/braswell/gpio.c
+./src/soc/intel/broadwell/Kconfig
+./src/soc/intel/broadwell/acpi.c
+./src/soc/intel/broadwell/romstage/raminit.c
+./src/soc/intel/cannonlake/nhlt.c
+./src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+./src/soc/intel/common/mma.c
+./src/soc/intel/denverton_ns/acpi.c
+./src/soc/intel/denverton_ns/chip.c
+./src/soc/intel/quark/romstage/romstage.c
+./src/soc/intel/quark/Kconfig
+./src/soc/intel/skylake/nhlt/da7219.c
+./src/soc/intel/skylake/nhlt/dmic.c
+./src/soc/intel/skylake/nhlt/max98357.c
+./src/soc/intel/skylake/nhlt/max98373.c
+./src/soc/intel/skylake/nhlt/max98927.c
+./src/soc/intel/skylake/nhlt/nau88l25.c
+./src/soc/intel/skylake/nhlt/rt5514.c
+./src/soc/intel/skylake/nhlt/rt5663.c
+./src/soc/intel/skylake/nhlt/ssm4567.c
+./src/soc/intel/fsp_baytrail/Kconfig
+./src/soc/intel/fsp_baytrail/acpi.c
+./src/soc/intel/fsp_baytrail/bootblock/bootblock.c
+./src/soc/intel/fsp_broadwell_de/bootblock/bootblock.c
+./src/soc/intel/fsp_broadwell_de/fsp/Kconfig
+./src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c
+./src/soc/mediatek/mt8183/spm.c
+./src/soc/mediatek/mt8183/sspm.c
+./src/soc/nvidia/tegra210/Kconfig
+./src/soc/nvidia/tegra210/mtc.c
+./src/soc/qualcomm/ipq40xx/Kconfig
+./src/soc/qualcomm/ipq40xx/lcc.c
+./src/soc/qualcomm/ipq806x/Kconfig
+./src/soc/qualcomm/ipq806x/blobs_init.c
+./src/soc/qualcomm/ipq806x/lcc.c
+./src/soc/samsung/exynos5250/clock.c
+./src/soc/samsung/exynos5420/clock.c
+./src/southbridge/amd/agesa/hudson/Kconfig
+./src/southbridge/amd/cimx/sb800/Kconfig
+./src/southbridge/amd/pi/hudson/Kconfig
+./src/southbridge/intel/bd82x6x/lpc.c
+./src/southbridge/intel/common/firmware/Kconfig
+./src/southbridge/intel/i82801ix/dmi_setup.c
+./src/southbridge/nvidia/ck804/early_setup_ss.h
+./src/southbridge/nvidia/mcp55/early_setup_ss.h
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnInitEarlyTable.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/cpuMicrocodePatch.c
+./src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+./src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+./src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnInitEarlyTable.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuMicrocodePatch.c
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbCacWeightsTN.h
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+./src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c
+./src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c
+./src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbInitEarlyTable.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16WheaInitDataTables.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuMicrocodePatch.c
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.c
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h
+./src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c
+./src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpkb3.c
+./src/vendorcode/amd/cimx/sb800/SATA.c
+./src/vendorcode/amd/pi/Kconfig
+./src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c
+./src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-xfi.c
+./src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse.c
+./src/vendorcode/cavium/bdk/libdram/lib_octeon_shared.c
+./src/vendorcode/eltan/security/verified_boot/vboot_check.c
+./src/vendorcode/google/chromeos/build-snow.sh
+./src/vendorcode/google/chromeos/sar.c
+./src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm12.h
+./src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Protocol/HiiConfigAccess.h
+./src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
+./src/vendorcode/intel/fsp/fsp2_0/cometlake/FspmUpd.h
+./util/amdtools/example_input/lspci-cb-48G-667MHz-18.2-20090909e
+./util/amdtools/example_input/lspci-prop-48G-667MHz-18.2
+./util/autoport/readme.md
+./util/bincfg/bincfg.lex.c_shipped
+./util/bincfg/bincfg.tab.c_shipped
+./util/cbfstool/lz4/lib/lz4.c
+./util/cbfstool/fit.c
+./util/cbfstool/fmd_parser.c_shipped
+./util/cbfstool/fmd_scanner.c_shipped
+./util/cbfstool/linux_trampoline.c
+./util/ifdtool/ifdtool.c
+./util/intelmetool/intelmetool.c
+./util/kbc1126/kbc1126_ec_dump.c
+./util/kconfig/zconf.hash.c_shipped
+./util/kconfig/zconf.lex.c_shipped
+./util/kconfig/zconf.tab.c_shipped
+./util/mma/mma_automated_test.sh
+./util/mtkheader/gen-bl-img.py
+./util/nvidia/cbootimage/samples/sign.sh
+./util/nvidia/cbootimage/src/aes_ref.c
+./util/nvramtool/accessors/layout-bin.c
+./util/qualcomm/scripts/cmm/debug_cb_common.cmm
+./util/qualcomm/createxbl.py
+./util/riscv/make-spike-elf.sh
+./util/riscv/sifive-gpt.py
+./util/rockchip/make_idb.py
+./util/sconfig/lex.yy.c_shipped
+./util/sconfig/sconfig.tab.c_shipped
+./util/spdtool/spdtool.py
+./util/superiotool/fintek.c
+./util/superiotool/ite.c
+./util/superiotool/nuvoton.c
+./util/superiotool/smsc.c
+./util/superiotool/winbond.c
+./util/xcompile/xcompile
+./util/genprof/genprof.c
+./util/romcc/test.sh
+./util/romcc/tests/include/linux_console.h
+./util/romcc/tests/linux_console.h
+./util/romcc/tests/linux_test5.c
+./util/romcc/tests/raminit_test6.c
+./util/romcc/tests/raminit_test7.c
+./util/romcc/tests/simple_test14.c
+./util/romcc/tests/simple_test30.c
+./util/romcc/tests/simple_test38.c
+./util/romcc/tests/simple_test39.c
+./util/romcc/tests/simple_test54.c
+./util/romcc/tests/simple_test59.c
+./util/romcc/tests/simple_test72.c
+./util/romcc/tests/simple_test73.c
+./Makefile.inc
+./deblob-check

resources/coreboot/fam15h_rdimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch

@@ -0,0 +1,38 @@
+From 7a00638cea41ad939a59fc0e5996959435fbdb7f Mon Sep 17 00:00:00 2001
+From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
+Date: Sun, 7 Feb 2021 16:40:05 +0100
+Subject: [PATCH 3/6] Tweak cmos defaults for KCMA-D8 (for a little speed
+ boost)
+
+63xx CPUs have the option to use a reduced latency value inside the crossbar.
+Setting "experimental_memory_speed_boost=Enable" aparently only has an effect
+on 63xx CPUs and may, in certain cases, yield a slight memory bandwidth
+increase (according to Timothy Pearson), but maybe it also works for
+43xx CPUs.
+
+Setting "l3_cache_partitioning=Enable" will increase performance in certain
+situations. See:
+https://developer.arm.com/documentation/100453/0401/functional-description/l3-cache/l3-cache-partitioning?lang=en
+---
+ src/mainboard/asus/kcma-d8/cmos.default | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/mainboard/asus/kcma-d8/cmos.default b/src/mainboard/asus/kcma-d8/cmos.default
+index 306687157f..4e033d756f 100644
+--- a/src/mainboard/asus/kcma-d8/cmos.default
++++ b/src/mainboard/asus/kcma-d8/cmos.default
+@@ -21,9 +21,9 @@ sata_ahci_mode=Enable
+ sata_alpm=Disable
+ maximum_p_state_limit=0xf
+ probe_filter=Auto
+-l3_cache_partitioning=Disable
++l3_cache_partitioning=Enable
+ gart=Enable
+ ehci_async_data_cache=Enable
+-experimental_memory_speed_boost=Disable
++experimental_memory_speed_boost=Enable
+ power_on_after_fail=On
+ boot_option=Fallback
+-- 
+2.25.1
+

resources/coreboot/fam15h_rdimm/patches/0004-Do-not-use-microcode-updates-on-AMD-platforms.patch

@@ -0,0 +1,108 @@
+From 2b1d40b970d9cbbb4f8fe30679e9b6909aa3d99a Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Thu, 6 May 2021 17:07:06 +0100
+Subject: [PATCH 4/6] Do not use microcode updates on AMD platforms
+
+Coreboot is hardcoding the use of microcode updates on some platforms.
+
+Just nuke it from orbit. This is the libre branch of osboot, so microcode must
+not be used.
+---
+ src/cpu/Makefile.inc                          | 52 +------------------
+ src/cpu/amd/family_10h-family_15h/Kconfig     |  1 -
+ .../amd/family_10h-family_15h/Makefile.inc    | 10 +---
+ 3 files changed, 2 insertions(+), 61 deletions(-)
+
+diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
+index b80c30d72b..e7909d32ed 100644
+--- a/src/cpu/Makefile.inc
++++ b/src/cpu/Makefile.inc
+@@ -14,54 +14,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32))
+ ## Rules for building the microcode blob in CBFS
+ ################################################################################
+ 
+-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y)
+-cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin
+-endif
+-
+-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
+-cbfs-files-y  += cpu_microcode_blob.bin
+-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin
+-
+-$(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER_FILES))
+-	echo "   util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\""
+-	util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES)
+-endif
+-
+-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y)
+-cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
+-endif
+-# otherwise `cpu_microcode_bins` should be filled by platform makefiles
+-
+-# We just mash all microcode binaries together into one binary to rule them all.
+-# This approach assumes that the microcode binaries are properly padded, and
+-# their headers specify the correct size. This works fairly well on isolatied
+-# updates, such as Intel and some AMD microcode, but won't work very well if the
+-# updates are wrapped in a container, like AMD's microcode update container. If
+-# there is only one microcode binary (i.e. one container), then we don't have
+-# this issue, and this rule will continue to work.
+-$(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins))
+-	for bin in $(cpu_microcode_bins); do \
+-		if [ ! -f "$$bin" ]; then \
+-			echo "Microcode error: $$bin does not exist"; \
+-			NO_MICROCODE_FILE=1; \
+-		fi; \
+-	done; \
+-	if [ -n "$$NO_MICROCODE_FILE" ]; then \
+-		if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \
+-			echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \
+-		fi; \
+-		false; \
+-	fi
+-	$(if $^,,false) # fail if no file is given at all
+-	@printf "    MICROCODE  $(subst $(obj)/,,$(@))\n"
+-	@echo $(cpu_microcode_bins)
+-	cat $^ > $@
+-
+-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
+-cpu_microcode_blob.bin-type := microcode
+-
+-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
+-cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
+-else
+-cpu_microcode_blob.bin-align := 16
+-endif
++# No microcode permitted in this version of coreboot.
+diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig
+index ad4f5f4ba6..21150ab1a7 100644
+--- a/src/cpu/amd/family_10h-family_15h/Kconfig
++++ b/src/cpu/amd/family_10h-family_15h/Kconfig
+@@ -8,7 +8,6 @@ config CPU_AMD_MODEL_10XXX
+ 	select TSC_SYNC_LFENCE
+ 	select UDELAY_LAPIC
+ 	select SUPPORT_CPU_UCODE_IN_CBFS
+-	select CPU_MICROCODE_MULTIPLE_FILES
+ 	select CAR_GLOBAL_MIGRATION
+ 
+ if CPU_AMD_MODEL_10XXX
+diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc
+index 7035323026..e0029f562d 100644
+--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc
++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc
+@@ -14,12 +14,4 @@ ramstage-y += ram_calc.c
+ ramstage-y += monotonic_timer.c
+ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c
+ 
+-# Microcode for Family 10h, 11h, 12h, and 14h
+-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd.bin
+-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin
+-microcode_amd.bin-type := microcode
+-
+-# Microcode for Family 15h
+-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd_fam15h.bin
+-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin
+-microcode_amd_fam15h.bin-type := microcode
++# Microcode deleted in this version of coreboot.
+-- 
+2.25.1
+

resources/coreboot/fam15h_rdimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch

@@ -0,0 +1,32 @@
+From f0aac7261e16adc8e61eca7a506ff2de5112be47 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Fri, 7 May 2021 19:43:32 +0100
+Subject: [PATCH 6/6] asus/kgpe-d16: enable lc_cache_partitioning and
+ experimental_memory_speed_boost
+
+This really only benefits 63xx opterons which are less reliable in libreboot due
+to lack of CPU microcode updates, but we might aswell enable this anyway.
+---
+ src/mainboard/asus/kgpe-d16/cmos.default | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default
+index 7c496a50d7..8a25620e1d 100644
+--- a/src/mainboard/asus/kgpe-d16/cmos.default
++++ b/src/mainboard/asus/kgpe-d16/cmos.default
+@@ -21,10 +21,10 @@ sata_ahci_mode=Enable
+ sata_alpm=Disable
+ maximum_p_state_limit=0xf
+ probe_filter=Auto
+-l3_cache_partitioning=Disable
++l3_cache_partitioning=Enable
+ ieee1394_controller=Enable
+ gart=Enable
+ ehci_async_data_cache=Enable
+-experimental_memory_speed_boost=Disable
++experimental_memory_speed_boost=Enable
+ power_on_after_fail=On
+ boot_option=Fallback
+-- 
+2.25.1
+

resources/coreboot/fam15h_rdimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch

@@ -0,0 +1,41 @@
+From d5dc3f23eb546cf328fdfe1e918afa028fb9cd8c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 04:13:52 +0100
+Subject: [PATCH 1/1] util/cbfstool Makefile: support distclean
+
+it just does make-clean
+
+this is so that this super-old coreboot revision
+interfaces well with lbmk, which runs distclean
+on cbfstool (which is supported, on modern cbfstool)
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/cbfstool/Makefile | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
+index d5321f6959..b8424d7d87 100644
+--- a/util/cbfstool/Makefile
++++ b/util/cbfstool/Makefile
+@@ -26,7 +26,7 @@ ifittool: $(objutil)/cbfstool/ifittool
+ 
+ cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool
+ 
+-.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
++.PHONY: distclean clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
+ clean:
+ 	$(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h
+ 	$(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj)
+@@ -55,6 +55,8 @@ install: all
+ 	$(INSTALL) ifittool $(DESTDIR)$(BINDIR)
+ 	$(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR)
+ 
++distclean: clean
++
+ ifneq ($(V),1)
+ .SILENT:
+ endif
+-- 
+2.40.1
+

resources/coreboot/fam15h_rdimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch

@@ -0,0 +1,37 @@
+From 4b4b2bdc2cedb3e219c6f90809e5684441b1dafa Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 04:54:19 +0100
+Subject: [PATCH 1/1] crossgcc: patch binutils 2.32 for newer hostcc
+
+tested on debian sid as of 9 July 2023
+
+implicit string declaration
+
+easy peasy
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/patches/binutils-2.32_stringfix.patch | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+ create mode 100644 util/crossgcc/patches/binutils-2.32_stringfix.patch
+
+diff --git a/util/crossgcc/patches/binutils-2.32_stringfix.patch b/util/crossgcc/patches/binutils-2.32_stringfix.patch
+new file mode 100644
+index 0000000000..de27a2752a
+--- /dev/null
++++ b/util/crossgcc/patches/binutils-2.32_stringfix.patch
+@@ -0,0 +1,11 @@
++diff -u binutils-2.32/gold/errors.h binutils-2.32.patched/gold/errors.h
++--- binutils-2.32/gold/errors.h
+++++ binutils-2.32.patched/gold/errors.h
++@@ -24,6 +24,7 @@
++ #define GOLD_ERRORS_H
++
++ #include <cstdarg>
+++#include <string>
++
++ #include "gold-threads.h"
++
+-- 
+2.40.1
+

resources/coreboot/fam15h_rdimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch

@@ -0,0 +1,108 @@
+From 373dd351e374f391c9e2048e5f3e535267a04719 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 19:37:39 +0100
+Subject: [PATCH 1/1] fix crossgcc/acpica build on newer hostcc
+
+Changes made to acpica/iasl:
+
+remove superfluous YYSTYPE declaration
+
+make LuxBuffer variables static, to avoid warnings
+treated as errors about multiple definitions
+
+AcpiGbl_DbOpt_NoRegionSupport - remove this definition
+in source/tools/acpiexec/aemain.c because it's already
+re-defined by acpiexec. otherwise the linker complains
+about multiple definitions
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ .../acpica-unix2-20190703_mitigategcc.patch   | 76 +++++++++++++++++++
+ 1 file changed, 76 insertions(+)
+ create mode 100644 util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
+
+diff --git a/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
+new file mode 100644
+index 0000000000..8de47245bd
+--- /dev/null
++++ b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
+@@ -0,0 +1,76 @@
++From 66b927d923183ff62c9a757fafdeca9d1ac3fa87 Mon Sep 17 00:00:00 2001
++From: Leah Rowe <leah@libreboot.org>
++Date: Sun, 9 Jul 2023 18:58:11 +0100
++Subject: [PATCH 1/1] fix building on newer hostcc (debian sid tested)
++
++remove superfluous YYSTYPE declaration
++
++make LuxBuffer variables static, to avoid warnings
++treated as errors about multiple definitions
++
++AcpiGbl_DbOpt_NoRegionSupport - remove this definition
++in source/tools/acpiexec/aemain.c because it's already
++re-defined by acpiexec. otherwise the linker complains
++about multiple definitions
++
++Signed-off-by: Leah Rowe <leah@libreboot.org>
++---
++ source/compiler/aslcompiler.l  | 1 -
++ source/compiler/dtparser.l     | 2 +-
++ source/compiler/prparser.l     | 2 +-
++ source/tools/acpiexec/aemain.c | 1 -
++ 4 files changed, 2 insertions(+), 4 deletions(-)
++
++diff --git a/source/compiler/aslcompiler.l b/source/compiler/aslcompiler.l
++index 1949b32..a24f028 100644
++--- a/source/compiler/aslcompiler.l
+++++ b/source/compiler/aslcompiler.l
++@@ -48,7 +48,6 @@
++ 
++ #include <stdlib.h>
++ #include <string.h>
++-YYSTYPE AslCompilerlval;
++ 
++ /*
++  * Generation:  Use the following command line:
++diff --git a/source/compiler/dtparser.l b/source/compiler/dtparser.l
++index 6517e52..d35181c 100644
++--- a/source/compiler/dtparser.l
+++++ b/source/compiler/dtparser.l
++@@ -100,7 +100,7 @@ NewLine         [\n]
++ /*
++  * Local support functions
++  */
++-YY_BUFFER_STATE         LexBuffer;
+++static YY_BUFFER_STATE         LexBuffer;
++ 
++ /******************************************************************************
++  *
++diff --git a/source/compiler/prparser.l b/source/compiler/prparser.l
++index bcdef14..5a1b848 100644
++--- a/source/compiler/prparser.l
+++++ b/source/compiler/prparser.l
++@@ -116,7 +116,7 @@ Identifier      [a-zA-Z][0-9a-zA-Z]*
++ /*
++  * Local support functions
++  */
++-YY_BUFFER_STATE         LexBuffer;
+++static YY_BUFFER_STATE         LexBuffer;
++ 
++ 
++ /******************************************************************************
++diff --git a/source/tools/acpiexec/aemain.c b/source/tools/acpiexec/aemain.c
++index 58640dd..cd0add6 100644
++--- a/source/tools/acpiexec/aemain.c
+++++ b/source/tools/acpiexec/aemain.c
++@@ -84,7 +84,6 @@ BOOLEAN                     AcpiGbl_VerboseHandlers = FALSE;
++ UINT8                       AcpiGbl_RegionFillValue = 0;
++ BOOLEAN                     AcpiGbl_IgnoreErrors = FALSE;
++ BOOLEAN                     AcpiGbl_AbortLoopOnTimeout = FALSE;
++-BOOLEAN                     AcpiGbl_DbOpt_NoRegionSupport = FALSE;
++ UINT8                       AcpiGbl_UseHwReducedFadt = FALSE;
++ BOOLEAN                     AcpiGbl_DoInterfaceTests = FALSE;
++ BOOLEAN                     AcpiGbl_LoadTestTables = FALSE;
++-- 
++2.40.1
++
+-- 
+2.40.1
+

resources/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch

@@ -0,0 +1,38 @@
+From ba94a3f27a26d181291b5908bdd627be375eb606 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 16 Jul 2023 00:44:22 +0100
+Subject: [PATCH 1/1] coreboot/fam15h: use new upstream for acpica
+
+the original upstream died
+
+i decided to host it myself, on libreboot rsync,
+for use by mirrors.
+
+this is also useful for GNU Boot, when downloading
+acpica on coreboot 4.11_branch, for fam15h boards
+
+this change is not necessary on other coreboot trees,
+which adhere to new coreboot policy (newer coreboot
+pulls acpica from github, which is fairly reliable)
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index b75b90a877..e3efa722f1 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -73,7 +73,7 @@ MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
+ GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
+ BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
+ GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
+-IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
++IASL_ARCHIVE="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
+ PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
+ EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
+ # CLANG toolchain archive locations
+-- 
+2.40.1
+

resources/coreboot/fam15h_udimm/blobs.list

@@ -0,0 +1,22 @@
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+3rdparty/chromeec/test/legacy_nvmem_dump.h
+3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse.c

resources/coreboot/fam15h_udimm/board.cfg

@@ -0,0 +1,9 @@
+cbtree="fam15h_udimm"
+romtype="normal"
+cbrevision="1c13f8d85c7306213cd525308ee8973e5663a3f8"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="n"
+payload_memtest="n"
+crossgcc_ada="n"

resources/coreboot/fam15h_udimm/deblob-check.results.list

@@ -0,0 +1,825 @@
+./3rdparty/arm-trusted-firmware/docs/design/firmware-design.rst
+./3rdparty/arm-trusted-firmware/docs/getting_started/user-guide.rst
+./3rdparty/arm-trusted-firmware/drivers/marvell/comphy/phy-comphy-3700.c
+./3rdparty/arm-trusted-firmware/drivers/st/pmic/stpmic1.c
+./3rdparty/arm-trusted-firmware/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c
+./3rdparty/arm-trusted-firmware/lib/romlib/gen_combined_bl1_romlib.sh
+./3rdparty/arm-trusted-firmware/lib/zlib/crc32.h
+./3rdparty/arm-trusted-firmware/lib/zlib/inffixed.h
+./3rdparty/arm-trusted-firmware/lib/zlib/inftrees.c
+./3rdparty/arm-trusted-firmware/plat/arm/board/fvp/fvp_io_storage.c
+./3rdparty/arm-trusted-firmware/plat/arm/css/sgi/sgi_topology.c
+./3rdparty/arm-trusted-firmware/plat/hisilicon/hikey/hisi_dvfs.c
+./3rdparty/arm-trusted-firmware/plat/hisilicon/poplar/include/platform_def.h
+./3rdparty/arm-trusted-firmware/plat/hisilicon/poplar/include/poplar_layout.h
+./3rdparty/arm-trusted-firmware/plat/intel/soc/agilex/soc/agilex_pinmux.c
+./3rdparty/arm-trusted-firmware/plat/intel/soc/stratix10/soc/s10_pinmux.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a70x0/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a70x0_amc/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a80x0/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/marvell/a8k/a80x0_mcbin/board/dram_port.c
+./3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
+./3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
+./3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+./3rdparty/arm-trusted-firmware/plat/qemu/common/qemu_io_storage.c
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/dfs.c
+./3rdparty/arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/startup.c
+./3rdparty/arm-trusted-firmware/plat/rpi/common/rpi3_io_storage.c
+./3rdparty/arm-trusted-firmware/plat/socionext/synquacer/sq_spm.c
+./3rdparty/arm-trusted-firmware/plat/st/stm32mp1/platform.mk
+./3rdparty/arm-trusted-firmware/tools/amlogic/doimage.c
+./3rdparty/arm-trusted-firmware/tools/fiptool/fiptool.c
+./3rdparty/chromeec/board/bloog/board.c
+./3rdparty/chromeec/board/coffeecake/board.c
+./3rdparty/chromeec/board/cr50/tpm2/ecc.c
+./3rdparty/chromeec/board/cr50/tpm2/endorsement.c
+./3rdparty/chromeec/board/cr50/tpm2/rsa.c
+./3rdparty/chromeec/board/dingdong/board.c
+./3rdparty/chromeec/board/flapjack/battery.c
+./3rdparty/chromeec/board/hoho/board.c
+./3rdparty/chromeec/board/kukui_scp/update_scp
+./3rdparty/chromeec/board/meep/board.c
+./3rdparty/chromeec/chip/g/dcrypto/bn.c
+./3rdparty/chromeec/chip/g/dcrypto/hmac_drbg.c
+./3rdparty/chromeec/chip/mchp/util/pack_ec.py
+./3rdparty/chromeec/chip/mec1322/util/pack_ec.py
+./3rdparty/chromeec/chip/stm32/usb_hid_keyboard.c
+./3rdparty/chromeec/chip/stm32/usb_hid_touchpad.c
+./3rdparty/chromeec/common/crc.c
+./3rdparty/chromeec/common/ctz.c
+./3rdparty/chromeec/common/keyboard_8042_sharedlib.c
+./3rdparty/chromeec/common/lightbar.c
+./3rdparty/chromeec/common/mock/rollback_mock.c
+./3rdparty/chromeec/common/sha256.c
+./3rdparty/chromeec/core/riscv-rv32i/init.S
+./3rdparty/chromeec/driver/als_tcs3400.c
+./3rdparty/chromeec/driver/led/lm3509.c
+./3rdparty/chromeec/driver/regulator_ir357x.c
+./3rdparty/chromeec/driver/touchpad_elan.c
+./3rdparty/chromeec/extra/rma_reset/rma_reset.c
+./3rdparty/chromeec/extra/touchpad_updater/touchpad_updater.c
+./3rdparty/chromeec/extra/usb_updater/fw_update.py
+./3rdparty/chromeec/extra/usb_updater/servo_updater.py
+./3rdparty/chromeec/fuzz/nvmem_tpm2_mock.c
+./3rdparty/chromeec/setup.py
+./3rdparty/chromeec/test/aes.c
+./3rdparty/chromeec/test/fpsensor.c
+./3rdparty/chromeec/test/legacy_nvmem_dump.h
+./3rdparty/chromeec/test/nvmem_tpm2_mock.c
+./3rdparty/chromeec/test/pinweaver.c
+./3rdparty/chromeec/test/rsa2048-3.h
+./3rdparty/chromeec/test/rsa2048-F4.h
+./3rdparty/chromeec/test/sha256.c
+./3rdparty/chromeec/test/test_config.h
+./3rdparty/chromeec/test/thermal.c
+./3rdparty/chromeec/test/tpm_test/rsa_test.py
+./3rdparty/chromeec/test/usb_prl.c
+./3rdparty/chromeec/test/x25519.c
+./3rdparty/chromeec/third_party/boringssl/common/aes.c
+./3rdparty/chromeec/third_party/boringssl/core/cortex-m/aes.S
+./3rdparty/chromeec/util/ec_sb_firmware_update.c
+./3rdparty/chromeec/util/ectool_keyscan.c
+./3rdparty/chromeec/util/flash_ec
+./3rdparty/chromeec/util/flash_fp_mcu
+./3rdparty/chromeec/util/flash_pd.py
+./3rdparty/chromeec/util/signer/create_released_image.sh
+./3rdparty/chromeec/util/uut/lib_crc.c
+./3rdparty/libgfxinit/common/skylake/hw-gfx-gma-plls-dpll.adb
+./3rdparty/opensbi/Makefile
+./3rdparty/vboot/cgpt/cgpt_wrapper.c
+./3rdparty/vboot/firmware/2lib/2sha256.c
+./3rdparty/vboot/firmware/2lib/2sha512.c
+./3rdparty/vboot/firmware/lib/cgptlib/crc32.c
+./3rdparty/vboot/firmware/lib/tpm_lite/include/tlcl_structures.h
+./3rdparty/vboot/futility/cmd_gbb_utility.c
+./3rdparty/vboot/futility/file_type_rwsig.c
+./3rdparty/vboot/futility/updater.c
+./3rdparty/vboot/futility/updater_archive.c
+./3rdparty/vboot/scripts/image_signing/make_dev_firmware.sh
+./3rdparty/vboot/scripts/image_signing/make_dev_ssd.sh
+./3rdparty/vboot/scripts/image_signing/sign_android_image.sh
+./3rdparty/vboot/scripts/image_signing/sign_cr50_firmware.sh
+./3rdparty/vboot/scripts/image_signing/sign_nv_cbootimage.sh
+./3rdparty/vboot/scripts/image_signing/sign_official_build.sh
+./3rdparty/vboot/scripts/image_signing/strip_boot_from_image.sh
+./3rdparty/vboot/scripts/image_signing/tag_image.sh
+./3rdparty/vboot/scripts/image_signing/tofactory.sh
+./3rdparty/vboot/tests/cgptlib_test.c
+./3rdparty/vboot/tests/crc32_test.c
+./3rdparty/vboot/tests/futility/data/bios_link_mp.bin
+./3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
+./3rdparty/vboot/tests/futility/link_bios.manifest.json
+./3rdparty/vboot/tests/futility/link_image.manifest.json
+./3rdparty/vboot/tests/futility/models/link/setvars.sh
+./3rdparty/vboot/tests/futility/models/peppy/setvars.sh
+./3rdparty/vboot/tests/futility/models/whitetip/setvars.sh
+./3rdparty/vboot/tests/futility/test_dump_fmap.sh
+./3rdparty/vboot/tests/futility/test_file_types.c
+./3rdparty/vboot/tests/futility/test_file_types.sh
+./3rdparty/vboot/tests/futility/test_rwsig.sh
+./3rdparty/vboot/tests/futility/test_sign_firmware.sh
+./3rdparty/vboot/tests/futility/test_update.sh
+./3rdparty/vboot/tests/gen_preamble_testdata.sh
+./3rdparty/vboot/tests/load_kernel_tests.sh
+./3rdparty/vboot/tests/rsa_padding_test.h
+./3rdparty/vboot/tests/run_vbutil_kernel_arg_tests.sh
+./3rdparty/vboot/tests/sha_test_vectors.h
+./3rdparty/vboot/tests/testcases/padding_test_vectors.inc
+./3rdparty/vboot/tests/tlcl_tests.c
+./3rdparty/vboot/tests/vb21_host_misc_tests.c
+./3rdparty/vboot/tests/vb2_api_tests.c
+./3rdparty/vboot/tests/vb2_sha_tests.c
+./3rdparty/vboot/utility/vbutil_what_keys
+./Documentation/Intel/SoC/soc.html
+./Documentation/releases/coreboot-4.2-relnotes.md
+./Documentation/soc/intel/fit.md
+./Documentation/tutorial/part1.md
+./Documentation/codeflow.svg
+./Documentation/hypertransport.svg
+./configs/builder/config.lenovo_t420
+./configs/builder/config.lenovo_t420s
+./configs/builder/config.lenovo_t430s
+./configs/builder/config.lenovo_t520
+./configs/builder/config.lenovo_t530
+./configs/builder/config.lenovo_x220
+./configs/builder/config.lenovo_x220i
+./configs/builder/config.lenovo_x230
+./payloads/external/FILO/Kconfig
+./payloads/external/GRUB2/Kconfig
+./payloads/external/SeaBIOS/Kconfig
+./payloads/external/U-Boot/Kconfig
+./payloads/external/Yabits/Kconfig
+./payloads/external/depthcharge/Kconfig
+./payloads/libpayload/curses/PDCurses/demos/worm.c
+./payloads/libpayload/curses/PDCurses/sdl1/deffont.h
+./payloads/libpayload/curses/PDCurses/sdl1/deficon.h
+./payloads/libpayload/curses/PDCurses/win32/pdckbd.c
+./payloads/libpayload/curses/PDCurses/x11/big_icon.xbm
+./payloads/libpayload/curses/PDCurses/x11/little_icon.xbm
+./payloads/libpayload/curses/pdcurses-backend/pdcdisp.c
+./payloads/libpayload/curses/tinycurses.c
+./payloads/libpayload/drivers/i8042/keyboard.c
+./payloads/libpayload/drivers/usb/usbmsc.c
+./payloads/libpayload/tests/cbfs-x86-test.c
+./payloads/nvramcui/payload.sh
+./payloads/Kconfig
+./src/cpu/amd/pi/00730F01/Makefile.inc
+./src/cpu/amd/pi/00730F01/microcode_fam16h.c
+./src/cpu/amd/pi/00730F01/model_16_init.c
+./src/cpu/amd/pi/00730F01/update_microcode.c
+./src/cpu/amd/family_10h-family_15h/Makefile.inc
+./src/cpu/amd/family_10h-family_15h/init_cpus.c
+./src/cpu/amd/family_10h-family_15h/init_cpus.h
+./src/cpu/amd/family_10h-family_15h/processor_name.c
+./src/cpu/amd/family_10h-family_15h/update_microcode.c
+./src/cpu/amd/microcode/microcode.c
+./src/cpu/intel/car/non-evict/cache_as_ram.S
+./src/cpu/intel/car/p4-netburst/cache_as_ram.S
+./src/cpu/intel/haswell/acpi.c
+./src/cpu/intel/microcode/Kconfig
+./src/cpu/intel/microcode/microcode.c
+./src/cpu/intel/microcode/microcode_asm.S
+./src/cpu/intel/model_2065x/acpi.c
+./src/cpu/intel/model_206ax/acpi.c
+./src/cpu/intel/model_65x/model_65x_init.c
+./src/cpu/intel/model_67x/model_67x_init.c
+./src/cpu/intel/model_68x/model_68x_init.c
+./src/cpu/intel/model_6bx/model_6bx_init.c
+./src/cpu/intel/model_6xx/model_6xx_init.c
+./src/cpu/intel/model_f2x/model_f2x_init.c
+./src/cpu/intel/model_f3x/model_f3x_init.c
+./src/cpu/intel/fsp_model_406dx/acpi.c
+./src/cpu/intel/fsp_model_406dx/bootblock.c
+./src/cpu/intel/fsp_model_406dx/model_406dx_init.c
+./src/cpu/Kconfig
+./src/cpu/Makefile.inc
+./src/device/oprom/yabel/interrupt.c
+./src/device/Kconfig
+./src/drivers/aspeed/common/ast_dram_tables.h
+./src/drivers/aspeed/common/ast_tables.h
+./src/drivers/i2c/ww_ring/ww_ring_programs.c
+./src/drivers/intel/fsp1_1/cache_as_ram.S
+./src/drivers/intel/fsp1_1/car.c
+./src/drivers/intel/fsp1_1/ramstage.c
+./src/drivers/intel/fsp1_1/romstage.c
+./src/drivers/intel/fsp1_1/temp_ram_exit.c
+./src/drivers/intel/fsp2_0/Kconfig
+./src/drivers/intel/gma/opregion.c
+./src/drivers/intel/gma/opregion.h
+./src/drivers/intel/fsp1_0/fsp_util.c
+./src/drivers/pc80/rtc/mc146818rtc.c
+./src/drivers/pc80/vga/vga_palette.c
+./src/drivers/siemens/nc_fpga/nc_fpga.c
+./src/drivers/wifi/Kconfig
+./src/drivers/xgi/common/XGI_main.h
+./src/drivers/xgi/common/vb_setmode.c
+./src/drivers/xgi/common/vb_table.h
+./src/ec/hp/kbc1126/Kconfig
+./src/include/cpu/amd/microcode.h
+./src/include/cpu/intel/microcode.h
+./src/include/spd_bin.h
+./src/lib/coreboot_table.c
+./src/lib/jpeg.c
+./src/lib/spd_bin.c
+./src/mainboard/amd/gardenia/bootblock/OemCustomize.c
+./src/mainboard/amd/inagua/Kconfig
+./src/mainboard/amd/olivehill/mptable.c
+./src/mainboard/amd/parmer/mptable.c
+./src/mainboard/amd/persimmon/Kconfig
+./src/mainboard/amd/south_station/Kconfig
+./src/mainboard/amd/south_station/mptable.c
+./src/mainboard/amd/thatcher/mptable.c
+./src/mainboard/amd/union_station/Kconfig
+./src/mainboard/amd/union_station/mptable.c
+./src/mainboard/amd/bimini_fam10/mptable.c
+./src/mainboard/amd/bimini_fam10/romstage.c
+./src/mainboard/amd/db-ft3b-lc/Memphis_MEM4G16D3EABG.spd.hex
+./src/mainboard/amd/lamar/Kconfig
+./src/mainboard/amd/mahogany_fam10/romstage.c
+./src/mainboard/amd/olivehillplus/mptable.c
+./src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+./src/mainboard/amd/tilapia_fam10/romstage.c
+./src/mainboard/apple/macbookair4_2/early_init.c
+./src/mainboard/asrock/b75pro3-m/early_init.c
+./src/mainboard/asrock/e350m1/mptable.c
+./src/mainboard/asrock/imb-a180/mptable.c
+./src/mainboard/asus/f2a85-m/mptable.c
+./src/mainboard/asus/h61m-cs/early_init.c
+./src/mainboard/asus/maximus_iv_gene-z/early_init.c
+./src/mainboard/asus/p8h61-m_lx/early_init.c
+./src/mainboard/asus/p8h61-m_pro/early_init.c
+./src/mainboard/asus/kcma-d8/romstage.c
+./src/mainboard/asus/kfsn4-dre/romstage.c
+./src/mainboard/asus/kgpe-d16/romstage.c
+./src/mainboard/asus/m4a78-em/romstage.c
+./src/mainboard/asus/m4a785-m/romstage.c
+./src/mainboard/asus/m5a88-v/mptable.c
+./src/mainboard/asus/m5a88-v/romstage.c
+./src/mainboard/bap/ode_e20XX/BAP_Q7_1066.spd.hex
+./src/mainboard/bap/ode_e20XX/BAP_Q7_800.spd.hex
+./src/mainboard/bap/ode_e21XX/BAP_Q7_1066.spd.hex
+./src/mainboard/bap/ode_e21XX/BAP_Q7_1333.spd.hex
+./src/mainboard/bap/ode_e21XX/BAP_Q7_800.spd.hex
+./src/mainboard/bap/ode_e21XX/mptable.c
+./src/mainboard/biostar/a68n_5200/mptable.c
+./src/mainboard/compulab/intense_pc/early_init.c
+./src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex
+./src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex
+./src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex
+./src/mainboard/facebook/fbg1701/board_mboot.h
+./src/mainboard/facebook/fbg1701/board_verified_boot.c
+./src/mainboard/facebook/fbg1701/onboard.h
+./src/mainboard/facebook/fbg1701/ramstage.c
+./src/mainboard/gigabyte/ga-b75m-d3h/early_init.c
+./src/mainboard/gigabyte/ga-h61m-s2pv/early_init.c
+./src/mainboard/gigabyte/ma785gm/romstage.c
+./src/mainboard/gigabyte/ma785gmt/romstage.c
+./src/mainboard/gigabyte/ma78gm/romstage.c
+./src/mainboard/gizmosphere/gizmo/mptable.c
+./src/mainboard/gizmosphere/gizmo2/Micron_MT41J128M16JT.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/auron_paine/spd/spd.c
+./src/mainboard/google/auron/variants/auron_yuna/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/auron_yuna/spd/spd.c
+./src/mainboard/google/auron/variants/buddy/variant.c
+./src/mainboard/google/auron/variants/gandof/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/Samsung_M471B5674EB0-YK0.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/gandof/spd/spd.c
+./src/mainboard/google/auron/variants/lulu/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/hynix_4GiB_dimm_H5TC8G63CMR-PBA.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/micron_4GiB_dimm_MT41K512M16TNA-125.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/samsung_2GiB_dimm_K4B4G1646E-BYK0.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/samsung_4GiB_dimm_K4B8G1646Q-MYK0.spd.hex
+./src/mainboard/google/auron/variants/lulu/spd/spd.c
+./src/mainboard/google/auron/variants/samus/spd/elpida_16.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/elpida_4.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/elpida_8.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/empty.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/hynix_16.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/hynix_4.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/hynix_8.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/samsung_4.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/samsung_8.spd.hex
+./src/mainboard/google/auron/variants/samus/spd/spd.c
+./src/mainboard/google/beltino/lan.c
+./src/mainboard/google/butterfly/hda_verb.c
+./src/mainboard/google/butterfly/mainboard.c
+./src/mainboard/google/cyan/spd/empty.spd.hex
+./src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex
+./src/mainboard/google/cyan/spd/hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/hynix_2GiB_dimm_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8GTALAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8GTMLAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
+./src/mainboard/google/cyan/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_EDF8132A3MA-GD-F-R.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_EDF8132A3MA-JD-F.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_MT41K256M16TW-107.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_MT52L256M32D1PF-107WT.spd.hex
+./src/mainboard/google/cyan/spd/micron_2GiB_dimm_MT52L256M32D1PF.spd.hex
+./src/mainboard/google/cyan/spd/micron_dimm_MT52L256M32D1PF-107.spd.hex
+./src/mainboard/google/cyan/spd/nanya_dimm_NT6CL256T32CM-H1.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646E-BYK0.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4E8E304EE-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/samsung_2GiB_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/google/cyan/spd/samsung_dimm_K4E8E304EE-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/cyan/spd/spd.c
+./src/mainboard/google/cyan/Kconfig
+./src/mainboard/google/drallion/spd/empty_ddr4.spd.hex
+./src/mainboard/google/drallion/spd/hynix_dimm_H5AN8G6NCJR-VKC.spd.hex
+./src/mainboard/google/drallion/spd/hynix_dimm_H5ANAG6NCMR-VKC.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KNR-075E.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A512M16LY-075E.spd.hex
+./src/mainboard/google/drallion/spd/micron_dimm_MT40A512M16TB-062EJ.spd.hex
+./src/mainboard/google/drallion/spd/samsung_dimm_K4A8G165WC-BCTD.spd.hex
+./src/mainboard/google/drallion/spd/samsung_dimm_K4AAG165WB-MCTD.spd.hex
+./src/mainboard/google/drallion/variants/drallion/devicetree.cb
+./src/mainboard/google/drallion/variants/drallion/memory.c
+./src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb
+./src/mainboard/google/eve/spd/empty.spd.hex
+./src/mainboard/google/eve/spd/hynix_dimm_H9CCNNN8GTALAR.spd.hex
+./src/mainboard/google/eve/spd/hynix_dimm_H9CCNNNBJTALAR.spd.hex
+./src/mainboard/google/eve/spd/hynix_dimm_H9CCNNNCLTMLAR.spd.hex
+./src/mainboard/google/eve/spd/samsung_dimm_K4E6E304EB.spd.hex
+./src/mainboard/google/eve/spd/samsung_dimm_K4E8E324EB.spd.hex
+./src/mainboard/google/eve/spd/samsung_dimm_K4EBE304EB.spd.hex
+./src/mainboard/google/eve/spd/spd.c
+./src/mainboard/google/glados/spd/empty.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8GTALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8GTMLAR-NUD.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8GTMLAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNN8JTBLAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBJTALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBJTMLAR-NUD.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBJTMLAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNCLGALAR.spd.hex
+./src/mainboard/google/glados/spd/hynix_dimm_H9CCNNNCLTMLAR.spd.hex
+./src/mainboard/google/glados/spd/micron_16GiB_dimm_MT52L1G32D4PG.spd.hex
+./src/mainboard/google/glados/spd/micron_4GiB_dimm_MT52L256M32D1PF.spd.hex
+./src/mainboard/google/glados/spd/micron_8GiB_dimm_MT52L512M32D2PF.spd.hex
+./src/mainboard/google/glados/spd/micron_dimm_MT52L256M32D1PF-107-1G-1866.spd.hex
+./src/mainboard/google/glados/spd/micron_dimm_MT52L512M32D2PF-107-2G-1866.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EB-EGCF-2G-1866.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EB-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E6E304EE-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E304EE-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E324EB-EGCF-1G-1866.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4EBE304EB-EGCF.spd.hex
+./src/mainboard/google/glados/spd/samsung_dimm_K4EBE304EB-EGCG.spd.hex
+./src/mainboard/google/glados/spd/spd.c
+./src/mainboard/google/glados/Kconfig
+./src/mainboard/google/hatch/spd/16G_2400.spd.hex
+./src/mainboard/google/hatch/spd/16G_2666.spd.hex
+./src/mainboard/google/hatch/spd/16G_2666_2bg.spd.hex
+./src/mainboard/google/hatch/spd/16G_3200.spd.hex
+./src/mainboard/google/hatch/spd/16G_3200_4bg.spd.hex
+./src/mainboard/google/hatch/spd/4G_2400.spd.hex
+./src/mainboard/google/hatch/spd/8G_2400.spd.hex
+./src/mainboard/google/hatch/spd/8G_2666.spd.hex
+./src/mainboard/google/hatch/spd/8G_3200.spd.hex
+./src/mainboard/google/hatch/spd/LP_16G_2133.spd.hex
+./src/mainboard/google/hatch/spd/LP_8G_2133.spd.hex
+./src/mainboard/google/hatch/spd/empty_ddr4.spd.hex
+./src/mainboard/google/hatch/variants/dratini/variant.c
+./src/mainboard/google/jecht/lan.c
+./src/mainboard/google/kahlee/spd/empty.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5AN8G6NAFR-UH.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5AN8G6NCJR-VKC.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5AN8G6NCJR-XNC.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5ANAG6NAMR-UH.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5ANAG6NCMR-VKC.spd.hex
+./src/mainboard/google/kahlee/spd/hynix-H5ANAG6NCMR-XNC.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A1G16KNR-075-E.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A1G16RC-062E-B.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A512M16JY-083E-B.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A512M16LY-075-E.spd.hex
+./src/mainboard/google/kahlee/spd/micron-MT40A512M16TB-062E-J.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4A8G165WB-BCRC.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4A8G165WC-BCTD.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4A8G165WC-BCWE.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WA-BCTD.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WA-BCWE.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WB-MCRC.spd.hex
+./src/mainboard/google/kahlee/spd/samsung-K4AAG165WB-MCTD.spd.hex
+./src/mainboard/google/kahlee/variants/baseboard/mainboard.c
+./src/mainboard/google/kahlee/Kconfig
+./src/mainboard/google/link/early_init.c
+./src/mainboard/google/link/elpida_4Gb_1600_x16.spd.hex
+./src/mainboard/google/link/hda_verb.c
+./src/mainboard/google/link/micron_4Gb_1600_1.35v_x16.spd.hex
+./src/mainboard/google/link/samsung_4Gb_1600_1.35v_x16.spd.hex
+./src/mainboard/google/octopus/variants/bloog/variant.c
+./src/mainboard/google/octopus/variants/bobba/variant.c
+./src/mainboard/google/octopus/variants/casta/variant.c
+./src/mainboard/google/octopus/variants/garg/variant.c
+./src/mainboard/google/octopus/variants/meep/variant.c
+./src/mainboard/google/octopus/variants/phaser/mainboard.c
+./src/mainboard/google/peach_pit/mainboard.c
+./src/mainboard/google/poppy/spd/empty.spd.hex
+./src/mainboard/google/poppy/spd/empty_ddr4.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NAFR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN4G6NBJR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN8G6NAFR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5AN8G6NCJR-VKC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5ANAG6NAMR-UHC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H5ANAG6NCMR-VKC.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNN8GTALAR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBJTALAR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBKTALBR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCLGALAR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCLGALAR-NVD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNCPTALBR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNFAGMLLR-NUD.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A1G16KNR-075E.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A256M16GE-083E.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A256M16LY-075F.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A512M16LY-075E.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT40A512M16TB-062EJ.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L1G32D4PG-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L1G64D8QC-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L256M32D1PF-093.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L256M32D1PF-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L256M64D2PP-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L512M32D2PF-093.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L512M32D2PF-107.spd.hex
+./src/mainboard/google/poppy/spd/micron_dimm_MT52L512M64D4PQ-107.spd.hex
+./src/mainboard/google/poppy/spd/nayna_dimm_NT6CL256T32CM-H1.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K3QF3F30BM-AGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K3QF4F40BM-AGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K3QFAFA0CM-AGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4A4G165WE-BCRC.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4A8G165WB-BCRC.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4A8G165WC-BCTD.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4AAG165WB-MCRC.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EB-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304EC-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E6E304ED-EGCG.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4E8E324EB-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EB-EGCG.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCF.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304EC-EGCG.spd.hex
+./src/mainboard/google/poppy/spd/samsung_dimm_K4EBE304ED-EGCG.spd.hex
+./src/mainboard/google/poppy/variants/nami/mainboard.c
+./src/mainboard/google/poppy/romstage.c
+./src/mainboard/google/rambi/spd/HT_micron_HTTC4G63CFR-PBA_x16_4Gb.spd.hex
+./src/mainboard/google/rambi/spd/Hynix_HMT425S6CFR6A_H5TC4G63CFR.spd.hex
+./src/mainboard/google/rambi/spd/Samsung_2Gib_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/rambi/spd/Samsung_2Gib_M471B5674QH0.spd.hex
+./src/mainboard/google/rambi/spd/elpida_2GiB_dimm_EDJ4216EFBG-GNL-F.spd.hex
+./src/mainboard/google/rambi/spd/empty.spd.hex
+./src/mainboard/google/rambi/spd/hynix_1GiB_dimm_H5TC2G63FFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63AFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63CFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/hynix_2GiB_dimm_H5TC4G63MFR-PBA.spd.hex
+./src/mainboard/google/rambi/spd/micron_1GiB_dimm_MT41K128M16JT-125.spd.hex
+./src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex
+./src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16HA-125a.spd.hex
+./src/mainboard/google/rambi/spd/micron_2GiB_dimm_MT41K256M16TW-107.spd.hex
+./src/mainboard/google/rambi/spd/samsung_1GiB_dimm_K4B2G1646Q-BYK0.spd.hex
+./src/mainboard/google/rambi/spd/samsung_2GiB_dimm_K4B4G1646E-BYK0.spd.hex
+./src/mainboard/google/rambi/spd/samsung_2GiB_dimm_K4B4G1646Q-HYK0.spd.hex
+./src/mainboard/google/rambi/variants/ninja/lan.c
+./src/mainboard/google/rambi/variants/sumo/lan.c
+./src/mainboard/google/rambi/romstage.c
+./src/mainboard/google/reef/variants/coral/mainboard.c
+./src/mainboard/google/sarien/variants/arcada/devicetree.cb
+./src/mainboard/google/slippy/variants/falco/spd/Elpida_EDJ4216EFBG.spd.hex
+./src/mainboard/google/slippy/variants/falco/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/falco/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/falco/spd/Samsung_M471B5674QH0.spd.hex
+./src/mainboard/google/slippy/variants/falco/romstage.c
+./src/mainboard/google/slippy/variants/leon/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/leon/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/leon/spd/Samsung_K4B4G1646Q.spd.hex
+./src/mainboard/google/slippy/variants/leon/romstage.c
+./src/mainboard/google/slippy/variants/peppy/spd/Elpida_EDJ4216EFBG.spd.hex
+./src/mainboard/google/slippy/variants/peppy/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/peppy/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/peppy/romstage.c
+./src/mainboard/google/slippy/variants/wolf/spd/Hynix_HMT425S6AFR6A.spd.hex
+./src/mainboard/google/slippy/variants/wolf/spd/Micron_4KTF25664HZ.spd.hex
+./src/mainboard/google/slippy/variants/wolf/spd/Samsung_K4B4G1646B.spd.hex
+./src/mainboard/google/slippy/variants/wolf/romstage.c
+./src/mainboard/google/dragonegg/romstage_fsp_params.c
+./src/mainboard/google/dragonegg/spd/Hynix_H9HCNNN8KUMLHR_2GB.spd.hex
+./src/mainboard/google/dragonegg/spd/Hynix_H9HCNNNCPMMLHR_4GB.spd.hex
+./src/mainboard/google/dragonegg/spd/Micron_MT53E2G32D8QD_8GB.spd.hex
+./src/mainboard/google/dragonegg/spd/Micron_MT53E512M32D2NP_2GB.spd.hex
+./src/mainboard/hp/abm/mptable.c
+./src/mainboard/hp/pavilion_m6_1035dx/mptable.c
+./src/mainboard/hp/z220_sff_workstation/early_init.c
+./src/mainboard/hp/2760p/early_init.c
+./src/mainboard/hp/8470p/early_init.c
+./src/mainboard/hp/dl165_g6_fam10/romstage.c
+./src/mainboard/hp/revolve_810_g1/early_init.c
+./src/mainboard/hp/revolve_810_g1/spd/hynix_4g.spd.hex
+./src/mainboard/ibase/mb899/cmos.layout
+./src/mainboard/ibase/mb899/superio_hwm.c
+./src/mainboard/intel/apollolake_rvp/romstage.c
+./src/mainboard/intel/coffeelake_rvp/variants/cml_u/include/variant/hda_verb.h
+./src/mainboard/intel/coffeelake_rvp/variants/whl_u/include/variant/hda_verb.h
+./src/mainboard/intel/glkrvp/romstage.c
+./src/mainboard/intel/harcuvar/spd/micron_4GiB_dimm_MTA9ASF51272PZ-2G1A2.spd.hex
+./src/mainboard/intel/harcuvar/spd/spd.c
+./src/mainboard/intel/icelake_rvp/spd/empty.spd.hex
+./src/mainboard/intel/icelake_rvp/spd/samsung_K4F6E304HBMGCJ.spd.hex
+./src/mainboard/intel/icelake_rvp/variants/icl_u/include/variant/hda_verb.h
+./src/mainboard/intel/icelake_rvp/variants/icl_y/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/spd/empty.spd.hex
+./src/mainboard/intel/kblrvp/spd/hynix_dimm_H9CCNNNBJTMLAR.spd.hex
+./src/mainboard/intel/kblrvp/spd/rvp3.spd.hex
+./src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
+./src/mainboard/intel/kblrvp/Kconfig
+./src/mainboard/intel/kunimitsu/spd/empty.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/mic_dimm_EDF8132A3MA-JD-F-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E6E304EE-EGCF-2G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCE.spd.hex
+./src/mainboard/intel/kunimitsu/spd/samsung_dimm_K4E8E304EE-EGCF-1G-1866.spd.hex
+./src/mainboard/intel/kunimitsu/spd/spd_util.c
+./src/mainboard/intel/leafhill/Kconfig
+./src/mainboard/intel/leafhill/romstage.c
+./src/mainboard/intel/minnow3/Kconfig
+./src/mainboard/intel/minnow3/romstage.c
+./src/mainboard/intel/strago/Kconfig
+./src/mainboard/intel/cannonlake_rvp/spd/empty.spd.hex
+./src/mainboard/intel/cannonlake_rvp/spd/samsung_ddr4_4GB.spd.hex
+./src/mainboard/intel/cannonlake_rvp/spd/samsung_lpddr4_8GB.spd.hex
+./src/mainboard/intel/mohonpeak/Kconfig
+./src/mainboard/jetway/nf81-t56n-lf/Kconfig
+./src/mainboard/jetway/pa78vm5/romstage.c
+./src/mainboard/kontron/986lcd-m/cmos.layout
+./src/mainboard/kontron/986lcd-m/mainboard.c
+./src/mainboard/lenovo/g505s/mptable.c
+./src/mainboard/lenovo/s230u/spd/elpida_2gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/elpida_4gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/elpida_8gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/hynix_2gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/hynix_4gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/samsung_2gb.spd.hex
+./src/mainboard/lenovo/s230u/spd/samsung_4gb.spd.hex
+./src/mainboard/lenovo/s230u/early_init.c
+./src/mainboard/lenovo/t430s/variants/t431s/spd/samsung_4gb.spd.hex
+./src/mainboard/lenovo/t430s/variants/t431s/romstage.c
+./src/mainboard/lenovo/x1_carbon_gen1/spd/elpida.hex
+./src/mainboard/lenovo/x1_carbon_gen1/spd/hynix.hex
+./src/mainboard/lenovo/x1_carbon_gen1/spd/samsung.hex
+./src/mainboard/lenovo/x1_carbon_gen1/early_init.c
+./src/mainboard/lenovo/x220/variants/x1/romstage.c
+./src/mainboard/lenovo/x220/early_init.c
+./src/mainboard/lippert/frontrunner-af/Kconfig
+./src/mainboard/lippert/frontrunner-af/mptable.c
+./src/mainboard/lippert/toucan-af/Kconfig
+./src/mainboard/lippert/toucan-af/mptable.c
+./src/mainboard/msi/ms7707/Kconfig
+./src/mainboard/msi/ms7707/early_init.c
+./src/mainboard/msi/ms7721/mptable.c
+./src/mainboard/msi/ms9652_fam10/romstage.c
+./src/mainboard/opencellular/elgon/gbcv2.dts
+./src/mainboard/packardbell/ms2290/mainboard.c
+./src/mainboard/pcengines/apu1/Kconfig
+./src/mainboard/pcengines/apu2/Kconfig
+./src/mainboard/portwell/m107/spd/KINGSTON_B5116ECMDXGGB.spd.hex
+./src/mainboard/portwell/m107/spd/MICRON_MT41K512M16HA-125A.spd.hex
+./src/mainboard/portwell/m107/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex
+./src/mainboard/razer/blade_stealth_kbl/spd/micron_dimm_MT52L1G32D4PG-107.spd.hex
+./src/mainboard/razer/blade_stealth_kbl/spd/micron_dimm_MT52L512M32D2PF-107.spd.hex
+./src/mainboard/samsung/lumpy/early_init.c
+./src/mainboard/sapphire/pureplatinumh61/early_init.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl1/lcd_panel.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl4/lcd_panel.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl5/lcd_panel.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
+./src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c
+./src/mainboard/siemens/mc_apl1/mainboard.c
+./src/mainboard/siemens/mc_apl1/romstage.c
+./src/mainboard/siemens/mc_bdx1/mainboard.c
+./src/mainboard/siemens/mc_tcu3/lcd_panel.c
+./src/mainboard/siemens/mc_tcu3/mainboard.c
+./src/mainboard/siemens/mc_tcu3/romstage.c
+./src/mainboard/supermicro/h8dmr_fam10/romstage.c
+./src/mainboard/supermicro/h8qme_fam10/romstage.c
+./src/mainboard/supermicro/h8scm_fam10/romstage.c
+./src/mainboard/up/squared/romstage.c
+./src/mainboard/adi/rcc-dff/Kconfig
+./src/mainboard/advansus/a785e-i/mptable.c
+./src/mainboard/advansus/a785e-i/romstage.c
+./src/mainboard/avalue/eax-785e/mptable.c
+./src/mainboard/avalue/eax-785e/romstage.c
+./src/mainboard/iei/kino-780am2-fam10/romstage.c
+./src/mainboard/tyan/s2912_fam10/romstage.c
+./src/northbridge/amd/pi/00630F01/Kconfig
+./src/northbridge/amd/pi/00730F01/Kconfig
+./src/northbridge/amd/pi/00660F01/Kconfig
+./src/northbridge/amd/amdmct/mct/mctardk3.c
+./src/northbridge/amd/amdmct/mct/mctardk4.c
+./src/northbridge/amd/amdmct/mct/mcttmrl.c
+./src/northbridge/amd/amdmct/mct_ddr3/mcttmrl.c
+./src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+./src/northbridge/intel/gm45/raminit_read_write_training.c
+./src/northbridge/intel/haswell/Kconfig
+./src/northbridge/intel/haswell/raminit.c
+./src/northbridge/intel/i945/raminit.c
+./src/northbridge/intel/pineview/raminit.c
+./src/northbridge/intel/sandybridge/Kconfig
+./src/northbridge/intel/sandybridge/gma.c
+./src/northbridge/intel/sandybridge/raminit.c
+./src/northbridge/intel/sandybridge/raminit_mrc.c
+./src/northbridge/intel/sandybridge/raminit_patterns.h
+./src/northbridge/intel/x4x/dq_dqs.c
+./src/northbridge/intel/x4x/raminit_ddr23.c
+./src/northbridge/intel/x4x/raminit_tables.c
+./src/northbridge/intel/fsp_rangeley/fsp/Kconfig
+./src/northbridge/intel/nehalem/raminit.c
+./src/northbridge/intel/nehalem/raminit_tables.c
+./src/security/intel/txt/Kconfig
+./src/security/tpm/tss/tcg-1.2/tss_commands.h
+./src/security/vboot/secdata_tpm.c
+./src/soc/amd/picasso/Kconfig
+./src/soc/amd/stoneyridge/Kconfig
+./src/soc/cavium/cn81xx/Kconfig
+./src/soc/cavium/common/rom_clib_s_nbl1fw.bin.hex
+./src/soc/cavium/common/rom_csib_s_nbl1fw.bin.hex
+./src/soc/intel/apollolake/Kconfig
+./src/soc/intel/apollolake/nhlt.c
+./src/soc/intel/baytrail/bootblock/bootblock.c
+./src/soc/intel/baytrail/romstage/raminit.c
+./src/soc/intel/baytrail/Kconfig
+./src/soc/intel/baytrail/acpi.c
+./src/soc/intel/braswell/acpi.c
+./src/soc/intel/braswell/gpio.c
+./src/soc/intel/broadwell/Kconfig
+./src/soc/intel/broadwell/acpi.c
+./src/soc/intel/broadwell/romstage/raminit.c
+./src/soc/intel/cannonlake/nhlt.c
+./src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+./src/soc/intel/common/mma.c
+./src/soc/intel/denverton_ns/acpi.c
+./src/soc/intel/denverton_ns/chip.c
+./src/soc/intel/quark/romstage/romstage.c
+./src/soc/intel/quark/Kconfig
+./src/soc/intel/skylake/nhlt/da7219.c
+./src/soc/intel/skylake/nhlt/dmic.c
+./src/soc/intel/skylake/nhlt/max98357.c
+./src/soc/intel/skylake/nhlt/max98373.c
+./src/soc/intel/skylake/nhlt/max98927.c
+./src/soc/intel/skylake/nhlt/nau88l25.c
+./src/soc/intel/skylake/nhlt/rt5514.c
+./src/soc/intel/skylake/nhlt/rt5663.c
+./src/soc/intel/skylake/nhlt/ssm4567.c
+./src/soc/intel/fsp_baytrail/Kconfig
+./src/soc/intel/fsp_baytrail/acpi.c
+./src/soc/intel/fsp_baytrail/bootblock/bootblock.c
+./src/soc/intel/fsp_broadwell_de/bootblock/bootblock.c
+./src/soc/intel/fsp_broadwell_de/fsp/Kconfig
+./src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c
+./src/soc/mediatek/mt8183/spm.c
+./src/soc/mediatek/mt8183/sspm.c
+./src/soc/nvidia/tegra210/Kconfig
+./src/soc/nvidia/tegra210/mtc.c
+./src/soc/qualcomm/ipq40xx/Kconfig
+./src/soc/qualcomm/ipq40xx/lcc.c
+./src/soc/qualcomm/ipq806x/Kconfig
+./src/soc/qualcomm/ipq806x/blobs_init.c
+./src/soc/qualcomm/ipq806x/lcc.c
+./src/soc/samsung/exynos5250/clock.c
+./src/soc/samsung/exynos5420/clock.c
+./src/southbridge/amd/agesa/hudson/Kconfig
+./src/southbridge/amd/cimx/sb800/Kconfig
+./src/southbridge/amd/pi/hudson/Kconfig
+./src/southbridge/intel/bd82x6x/lpc.c
+./src/southbridge/intel/common/firmware/Kconfig
+./src/southbridge/intel/i82801ix/dmi_setup.c
+./src/southbridge/nvidia/ck804/early_setup_ss.h
+./src/southbridge/nvidia/mcp55/early_setup_ss.h
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnInitEarlyTable.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
+./src/vendorcode/amd/agesa/f14/Proc/CPU/cpuMicrocodePatch.c
+./src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
+./src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
+./src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnInitEarlyTable.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c
+./src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuMicrocodePatch.c
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbCacWeightsTN.h
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
+./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
+./src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c
+./src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c
+./src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbInitEarlyTable.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16WheaInitDataTables.c
+./src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuMicrocodePatch.c
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.c
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+./src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h
+./src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c
+./src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpkb3.c
+./src/vendorcode/amd/cimx/sb800/SATA.c
+./src/vendorcode/amd/pi/Kconfig
+./src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c
+./src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-xfi.c
+./src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse.c
+./src/vendorcode/cavium/bdk/libdram/lib_octeon_shared.c
+./src/vendorcode/eltan/security/verified_boot/vboot_check.c
+./src/vendorcode/google/chromeos/build-snow.sh
+./src/vendorcode/google/chromeos/sar.c
+./src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm12.h
+./src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Protocol/HiiConfigAccess.h
+./src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
+./src/vendorcode/intel/fsp/fsp2_0/cometlake/FspmUpd.h
+./util/amdtools/example_input/lspci-cb-48G-667MHz-18.2-20090909e
+./util/amdtools/example_input/lspci-prop-48G-667MHz-18.2
+./util/autoport/readme.md
+./util/bincfg/bincfg.lex.c_shipped
+./util/bincfg/bincfg.tab.c_shipped
+./util/cbfstool/lz4/lib/lz4.c
+./util/cbfstool/fit.c
+./util/cbfstool/fmd_parser.c_shipped
+./util/cbfstool/fmd_scanner.c_shipped
+./util/cbfstool/linux_trampoline.c
+./util/ifdtool/ifdtool.c
+./util/intelmetool/intelmetool.c
+./util/kbc1126/kbc1126_ec_dump.c
+./util/kconfig/zconf.hash.c_shipped
+./util/kconfig/zconf.lex.c_shipped
+./util/kconfig/zconf.tab.c_shipped
+./util/mma/mma_automated_test.sh
+./util/mtkheader/gen-bl-img.py
+./util/nvidia/cbootimage/samples/sign.sh
+./util/nvidia/cbootimage/src/aes_ref.c
+./util/nvramtool/accessors/layout-bin.c
+./util/qualcomm/scripts/cmm/debug_cb_common.cmm
+./util/qualcomm/createxbl.py
+./util/riscv/make-spike-elf.sh
+./util/riscv/sifive-gpt.py
+./util/rockchip/make_idb.py
+./util/sconfig/lex.yy.c_shipped
+./util/sconfig/sconfig.tab.c_shipped
+./util/spdtool/spdtool.py
+./util/superiotool/fintek.c
+./util/superiotool/ite.c
+./util/superiotool/nuvoton.c
+./util/superiotool/smsc.c
+./util/superiotool/winbond.c
+./util/xcompile/xcompile
+./util/genprof/genprof.c
+./util/romcc/test.sh
+./util/romcc/tests/include/linux_console.h
+./util/romcc/tests/linux_console.h
+./util/romcc/tests/linux_test5.c
+./util/romcc/tests/raminit_test6.c
+./util/romcc/tests/raminit_test7.c
+./util/romcc/tests/simple_test14.c
+./util/romcc/tests/simple_test30.c
+./util/romcc/tests/simple_test38.c
+./util/romcc/tests/simple_test39.c
+./util/romcc/tests/simple_test54.c
+./util/romcc/tests/simple_test59.c
+./util/romcc/tests/simple_test72.c
+./util/romcc/tests/simple_test73.c
+./Makefile.inc
+./deblob-check

resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch

@@ -0,0 +1,31 @@
+From 8f2988cba4fffef1bd4f65e123c76bf4b7a18672 Mon Sep 17 00:00:00 2001
+From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
+Date: Sun, 7 Feb 2021 15:29:40 +0100
+Subject: [PATCH 1/6] Revert "Revert "nb/amd/mct_ddr3: Fix RDIMM training
+ failure on Fam15h" (fixes a bug that prevent certain RAM modules from
+ booting)
+
+This reverts commit 610d1c67b2298a9840681c2b4492b6d3fdf44a46.
+
+After 610d1c67b2298a9840681c2b4492b6d3fdf44a46 many RAM modules wouldn't work and you couldn't even see any output on the screen.
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+index ddaaaab8d5..3b07786b91 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+@@ -71,6 +71,9 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
+ 		misc2 |= ((cs_mux_67 & 0x1) << 27);
+ 		misc2 &= ~(0x1 << 26);		/* CsMux45 = cs_mux_45 */
+ 		misc2 |= ((cs_mux_45 & 0x1) << 26);
++
++		if (pDCTstat->Status & (1 << SB_Registered))
++			misc2 |= 1 << SubMemclkRegDly;
+ 	} else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
+ 		if (pDCTstat->Status & (1 << SB_Registered)) {
+ 			misc2 |= 1 << SubMemclkRegDly;
+-- 
+2.25.1
+

resources/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch

@@ -0,0 +1,38 @@
+From 7a00638cea41ad939a59fc0e5996959435fbdb7f Mon Sep 17 00:00:00 2001
+From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
+Date: Sun, 7 Feb 2021 16:40:05 +0100
+Subject: [PATCH 3/6] Tweak cmos defaults for KCMA-D8 (for a little speed
+ boost)
+
+63xx CPUs have the option to use a reduced latency value inside the crossbar.
+Setting "experimental_memory_speed_boost=Enable" aparently only has an effect
+on 63xx CPUs and may, in certain cases, yield a slight memory bandwidth
+increase (according to Timothy Pearson), but maybe it also works for
+43xx CPUs.
+
+Setting "l3_cache_partitioning=Enable" will increase performance in certain
+situations. See:
+https://developer.arm.com/documentation/100453/0401/functional-description/l3-cache/l3-cache-partitioning?lang=en
+---
+ src/mainboard/asus/kcma-d8/cmos.default | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/mainboard/asus/kcma-d8/cmos.default b/src/mainboard/asus/kcma-d8/cmos.default
+index 306687157f..4e033d756f 100644
+--- a/src/mainboard/asus/kcma-d8/cmos.default
++++ b/src/mainboard/asus/kcma-d8/cmos.default
+@@ -21,9 +21,9 @@ sata_ahci_mode=Enable
+ sata_alpm=Disable
+ maximum_p_state_limit=0xf
+ probe_filter=Auto
+-l3_cache_partitioning=Disable
++l3_cache_partitioning=Enable
+ gart=Enable
+ ehci_async_data_cache=Enable
+-experimental_memory_speed_boost=Disable
++experimental_memory_speed_boost=Enable
+ power_on_after_fail=On
+ boot_option=Fallback
+-- 
+2.25.1
+

resources/coreboot/fam15h_udimm/patches/0004-Do-not-use-microcode-updates-on-AMD-platforms.patch

@@ -0,0 +1,108 @@
+From 2b1d40b970d9cbbb4f8fe30679e9b6909aa3d99a Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Thu, 6 May 2021 17:07:06 +0100
+Subject: [PATCH 4/6] Do not use microcode updates on AMD platforms
+
+Coreboot is hardcoding the use of microcode updates on some platforms.
+
+Just nuke it from orbit. This is the libre branch of osboot, so microcode must
+not be used.
+---
+ src/cpu/Makefile.inc                          | 52 +------------------
+ src/cpu/amd/family_10h-family_15h/Kconfig     |  1 -
+ .../amd/family_10h-family_15h/Makefile.inc    | 10 +---
+ 3 files changed, 2 insertions(+), 61 deletions(-)
+
+diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
+index b80c30d72b..e7909d32ed 100644
+--- a/src/cpu/Makefile.inc
++++ b/src/cpu/Makefile.inc
+@@ -14,54 +14,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32))
+ ## Rules for building the microcode blob in CBFS
+ ################################################################################
+ 
+-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y)
+-cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin
+-endif
+-
+-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
+-cbfs-files-y  += cpu_microcode_blob.bin
+-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin
+-
+-$(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER_FILES))
+-	echo "   util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\""
+-	util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES)
+-endif
+-
+-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y)
+-cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
+-endif
+-# otherwise `cpu_microcode_bins` should be filled by platform makefiles
+-
+-# We just mash all microcode binaries together into one binary to rule them all.
+-# This approach assumes that the microcode binaries are properly padded, and
+-# their headers specify the correct size. This works fairly well on isolatied
+-# updates, such as Intel and some AMD microcode, but won't work very well if the
+-# updates are wrapped in a container, like AMD's microcode update container. If
+-# there is only one microcode binary (i.e. one container), then we don't have
+-# this issue, and this rule will continue to work.
+-$(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins))
+-	for bin in $(cpu_microcode_bins); do \
+-		if [ ! -f "$$bin" ]; then \
+-			echo "Microcode error: $$bin does not exist"; \
+-			NO_MICROCODE_FILE=1; \
+-		fi; \
+-	done; \
+-	if [ -n "$$NO_MICROCODE_FILE" ]; then \
+-		if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \
+-			echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \
+-		fi; \
+-		false; \
+-	fi
+-	$(if $^,,false) # fail if no file is given at all
+-	@printf "    MICROCODE  $(subst $(obj)/,,$(@))\n"
+-	@echo $(cpu_microcode_bins)
+-	cat $^ > $@
+-
+-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
+-cpu_microcode_blob.bin-type := microcode
+-
+-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
+-cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
+-else
+-cpu_microcode_blob.bin-align := 16
+-endif
++# No microcode permitted in this version of coreboot.
+diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig
+index ad4f5f4ba6..21150ab1a7 100644
+--- a/src/cpu/amd/family_10h-family_15h/Kconfig
++++ b/src/cpu/amd/family_10h-family_15h/Kconfig
+@@ -8,7 +8,6 @@ config CPU_AMD_MODEL_10XXX
+ 	select TSC_SYNC_LFENCE
+ 	select UDELAY_LAPIC
+ 	select SUPPORT_CPU_UCODE_IN_CBFS
+-	select CPU_MICROCODE_MULTIPLE_FILES
+ 	select CAR_GLOBAL_MIGRATION
+ 
+ if CPU_AMD_MODEL_10XXX
+diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc
+index 7035323026..e0029f562d 100644
+--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc
++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc
+@@ -14,12 +14,4 @@ ramstage-y += ram_calc.c
+ ramstage-y += monotonic_timer.c
+ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c
+ 
+-# Microcode for Family 10h, 11h, 12h, and 14h
+-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd.bin
+-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin
+-microcode_amd.bin-type := microcode
+-
+-# Microcode for Family 15h
+-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd_fam15h.bin
+-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin
+-microcode_amd_fam15h.bin-type := microcode
++# Microcode deleted in this version of coreboot.
+-- 
+2.25.1
+

resources/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch

@@ -0,0 +1,32 @@
+From f0aac7261e16adc8e61eca7a506ff2de5112be47 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Fri, 7 May 2021 19:43:32 +0100
+Subject: [PATCH 6/6] asus/kgpe-d16: enable lc_cache_partitioning and
+ experimental_memory_speed_boost
+
+This really only benefits 63xx opterons which are less reliable in libreboot due
+to lack of CPU microcode updates, but we might aswell enable this anyway.
+---
+ src/mainboard/asus/kgpe-d16/cmos.default | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default
+index 7c496a50d7..8a25620e1d 100644
+--- a/src/mainboard/asus/kgpe-d16/cmos.default
++++ b/src/mainboard/asus/kgpe-d16/cmos.default
+@@ -21,10 +21,10 @@ sata_ahci_mode=Enable
+ sata_alpm=Disable
+ maximum_p_state_limit=0xf
+ probe_filter=Auto
+-l3_cache_partitioning=Disable
++l3_cache_partitioning=Enable
+ ieee1394_controller=Enable
+ gart=Enable
+ ehci_async_data_cache=Enable
+-experimental_memory_speed_boost=Disable
++experimental_memory_speed_boost=Enable
+ power_on_after_fail=On
+ boot_option=Fallback
+-- 
+2.25.1
+

resources/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch

@@ -0,0 +1,41 @@
+From d5dc3f23eb546cf328fdfe1e918afa028fb9cd8c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 04:13:52 +0100
+Subject: [PATCH 1/1] util/cbfstool Makefile: support distclean
+
+it just does make-clean
+
+this is so that this super-old coreboot revision
+interfaces well with lbmk, which runs distclean
+on cbfstool (which is supported, on modern cbfstool)
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/cbfstool/Makefile | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
+index d5321f6959..b8424d7d87 100644
+--- a/util/cbfstool/Makefile
++++ b/util/cbfstool/Makefile
+@@ -26,7 +26,7 @@ ifittool: $(objutil)/cbfstool/ifittool
+ 
+ cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool
+ 
+-.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
++.PHONY: distclean clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
+ clean:
+ 	$(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h
+ 	$(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj)
+@@ -55,6 +55,8 @@ install: all
+ 	$(INSTALL) ifittool $(DESTDIR)$(BINDIR)
+ 	$(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR)
+ 
++distclean: clean
++
+ ifneq ($(V),1)
+ .SILENT:
+ endif
+-- 
+2.40.1
+

resources/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch

@@ -0,0 +1,37 @@
+From 4b4b2bdc2cedb3e219c6f90809e5684441b1dafa Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 04:54:19 +0100
+Subject: [PATCH 1/1] crossgcc: patch binutils 2.32 for newer hostcc
+
+tested on debian sid as of 9 July 2023
+
+implicit string declaration
+
+easy peasy
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/patches/binutils-2.32_stringfix.patch | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+ create mode 100644 util/crossgcc/patches/binutils-2.32_stringfix.patch
+
+diff --git a/util/crossgcc/patches/binutils-2.32_stringfix.patch b/util/crossgcc/patches/binutils-2.32_stringfix.patch
+new file mode 100644
+index 0000000000..de27a2752a
+--- /dev/null
++++ b/util/crossgcc/patches/binutils-2.32_stringfix.patch
+@@ -0,0 +1,11 @@
++diff -u binutils-2.32/gold/errors.h binutils-2.32.patched/gold/errors.h
++--- binutils-2.32/gold/errors.h
+++++ binutils-2.32.patched/gold/errors.h
++@@ -24,6 +24,7 @@
++ #define GOLD_ERRORS_H
++
++ #include <cstdarg>
+++#include <string>
++
++ #include "gold-threads.h"
++
+-- 
+2.40.1
+

resources/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch

@@ -0,0 +1,108 @@
+From 373dd351e374f391c9e2048e5f3e535267a04719 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 19:37:39 +0100
+Subject: [PATCH 1/1] fix crossgcc/acpica build on newer hostcc
+
+Changes made to acpica/iasl:
+
+remove superfluous YYSTYPE declaration
+
+make LuxBuffer variables static, to avoid warnings
+treated as errors about multiple definitions
+
+AcpiGbl_DbOpt_NoRegionSupport - remove this definition
+in source/tools/acpiexec/aemain.c because it's already
+re-defined by acpiexec. otherwise the linker complains
+about multiple definitions
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ .../acpica-unix2-20190703_mitigategcc.patch   | 76 +++++++++++++++++++
+ 1 file changed, 76 insertions(+)
+ create mode 100644 util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
+
+diff --git a/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
+new file mode 100644
+index 0000000000..8de47245bd
+--- /dev/null
++++ b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
+@@ -0,0 +1,76 @@
++From 66b927d923183ff62c9a757fafdeca9d1ac3fa87 Mon Sep 17 00:00:00 2001
++From: Leah Rowe <leah@libreboot.org>
++Date: Sun, 9 Jul 2023 18:58:11 +0100
++Subject: [PATCH 1/1] fix building on newer hostcc (debian sid tested)
++
++remove superfluous YYSTYPE declaration
++
++make LuxBuffer variables static, to avoid warnings
++treated as errors about multiple definitions
++
++AcpiGbl_DbOpt_NoRegionSupport - remove this definition
++in source/tools/acpiexec/aemain.c because it's already
++re-defined by acpiexec. otherwise the linker complains
++about multiple definitions
++
++Signed-off-by: Leah Rowe <leah@libreboot.org>
++---
++ source/compiler/aslcompiler.l  | 1 -
++ source/compiler/dtparser.l     | 2 +-
++ source/compiler/prparser.l     | 2 +-
++ source/tools/acpiexec/aemain.c | 1 -
++ 4 files changed, 2 insertions(+), 4 deletions(-)
++
++diff --git a/source/compiler/aslcompiler.l b/source/compiler/aslcompiler.l
++index 1949b32..a24f028 100644
++--- a/source/compiler/aslcompiler.l
+++++ b/source/compiler/aslcompiler.l
++@@ -48,7 +48,6 @@
++ 
++ #include <stdlib.h>
++ #include <string.h>
++-YYSTYPE AslCompilerlval;
++ 
++ /*
++  * Generation:  Use the following command line:
++diff --git a/source/compiler/dtparser.l b/source/compiler/dtparser.l
++index 6517e52..d35181c 100644
++--- a/source/compiler/dtparser.l
+++++ b/source/compiler/dtparser.l
++@@ -100,7 +100,7 @@ NewLine         [\n]
++ /*
++  * Local support functions
++  */
++-YY_BUFFER_STATE         LexBuffer;
+++static YY_BUFFER_STATE         LexBuffer;
++ 
++ /******************************************************************************
++  *
++diff --git a/source/compiler/prparser.l b/source/compiler/prparser.l
++index bcdef14..5a1b848 100644
++--- a/source/compiler/prparser.l
+++++ b/source/compiler/prparser.l
++@@ -116,7 +116,7 @@ Identifier      [a-zA-Z][0-9a-zA-Z]*
++ /*
++  * Local support functions
++  */
++-YY_BUFFER_STATE         LexBuffer;
+++static YY_BUFFER_STATE         LexBuffer;
++ 
++ 
++ /******************************************************************************
++diff --git a/source/tools/acpiexec/aemain.c b/source/tools/acpiexec/aemain.c
++index 58640dd..cd0add6 100644
++--- a/source/tools/acpiexec/aemain.c
+++++ b/source/tools/acpiexec/aemain.c
++@@ -84,7 +84,6 @@ BOOLEAN                     AcpiGbl_VerboseHandlers = FALSE;
++ UINT8                       AcpiGbl_RegionFillValue = 0;
++ BOOLEAN                     AcpiGbl_IgnoreErrors = FALSE;
++ BOOLEAN                     AcpiGbl_AbortLoopOnTimeout = FALSE;
++-BOOLEAN                     AcpiGbl_DbOpt_NoRegionSupport = FALSE;
++ UINT8                       AcpiGbl_UseHwReducedFadt = FALSE;
++ BOOLEAN                     AcpiGbl_DoInterfaceTests = FALSE;
++ BOOLEAN                     AcpiGbl_LoadTestTables = FALSE;
++-- 
++2.40.1
++
+-- 
+2.40.1
+

resources/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch

@@ -0,0 +1,38 @@
+From ba94a3f27a26d181291b5908bdd627be375eb606 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 16 Jul 2023 00:44:22 +0100
+Subject: [PATCH 1/1] coreboot/fam15h: use new upstream for acpica
+
+the original upstream died
+
+i decided to host it myself, on libreboot rsync,
+for use by mirrors.
+
+this is also useful for GNU Boot, when downloading
+acpica on coreboot 4.11_branch, for fam15h boards
+
+this change is not necessary on other coreboot trees,
+which adhere to new coreboot policy (newer coreboot
+pulls acpica from github, which is fairly reliable)
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index b75b90a877..e3efa722f1 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -73,7 +73,7 @@ MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
+ GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
+ BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
+ GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
+-IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
++IASL_ARCHIVE="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
+ PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
+ EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
+ # CLANG toolchain archive locations
+-- 
+2.40.1
+

resources/coreboot/g43t-am3/board.cfg

@@ -4,3 +4,5 @@ arch="x86_64"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
+microcode_required="n"
+blobs_required="n"

resources/coreboot/g43t-am3/config/libgfxinit_txtmode

@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -51,30 +60,25 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
 # CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
@@ -106,23 +110,24 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Acer"
+# CONFIG_BOARD_ACER_VN7_572G is not set
 CONFIG_BOARD_ACER_G43T_AM3=y
 CONFIG_CBFS_SIZE=0x200000
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_MAX_CPUS=4
-# CONFIG_VBOOT is not set
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_POST_IO=y
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_POST_DEVICE=y
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -145,10 +150,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 CONFIG_PCIEXP_CLK_PM=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -180,30 +187,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_RAMBASE=0xe00000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x1000
+CONFIG_STACK_SIZE=0x2000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_AZALIA_MAX_CODECS=4
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_UART_PCI_ADDR=0x0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
 
 #
 # CPU
@@ -213,7 +219,6 @@ CONFIG_CPU_INTEL_MODEL_1067X=y
 CONFIG_CPU_INTEL_MODEL_F3X=y
 CONFIG_CPU_INTEL_MODEL_F4X=y
 CONFIG_SOCKET_SPECIFIC_OPTIONS=y
-CONFIG_SSE2=y
 CONFIG_CPU_INTEL_SOCKET_LGA775=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -226,6 +231,7 @@ CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
 # CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
@@ -233,12 +239,12 @@ CONFIG_SETUP_XIP_CACHE=y
 CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-CONFIG_CPU_INFO_V2=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
 CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -249,13 +255,11 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 #
 # Northbridge
 #
-CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
 CONFIG_NORTHBRIDGE_INTEL_X4X=y
 
 #
 # Southbridge
 #
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -273,10 +277,10 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
 # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
 
 #
 # Super I/O
@@ -306,17 +310,16 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
-CONFIG_RAMTOP=0x1000000
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_HPET_ADDRESS=0xfed00000
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # end of Chipset
 
 #
@@ -328,6 +331,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
 CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
@@ -346,16 +350,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
 # end of Devices
 
 #
@@ -386,8 +400,12 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -397,6 +415,7 @@ CONFIG_GFX_GMA_GENERATION="G45"
 CONFIG_GFX_GMA_PCH="No_PCH"
 CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
 CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -408,6 +427,12 @@ CONFIG_VGA=y
 # Security
 #
 
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
 #
 # Verified Boot (vboot)
 #
@@ -451,6 +476,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -461,6 +487,8 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
@@ -487,28 +515,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -533,12 +539,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
 # end of Debugging
 
 CONFIG_RAMSTAGE_ADA=y
@@ -546,6 +550,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
 CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

resources/coreboot/g43t-am3_16mb/board.cfg

@@ -5,3 +5,5 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
+microcode_required="n"
+blobs_required="n"

resources/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode

@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -51,30 +60,25 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
 # CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
@@ -106,23 +110,24 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Acer"
+# CONFIG_BOARD_ACER_VN7_572G is not set
 CONFIG_BOARD_ACER_G43T_AM3=y
 CONFIG_CBFS_SIZE=0x1000000
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_MAX_CPUS=4
-# CONFIG_VBOOT is not set
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_POST_IO=y
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_POST_DEVICE=y
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -145,10 +150,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 CONFIG_PCIEXP_CLK_PM=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -180,30 +187,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_RAMBASE=0xe00000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x1000
+CONFIG_STACK_SIZE=0x2000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_AZALIA_MAX_CODECS=4
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_UART_PCI_ADDR=0x0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
 
 #
 # CPU
@@ -213,7 +219,6 @@ CONFIG_CPU_INTEL_MODEL_1067X=y
 CONFIG_CPU_INTEL_MODEL_F3X=y
 CONFIG_CPU_INTEL_MODEL_F4X=y
 CONFIG_SOCKET_SPECIFIC_OPTIONS=y
-CONFIG_SSE2=y
 CONFIG_CPU_INTEL_SOCKET_LGA775=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -226,6 +231,7 @@ CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
 # CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
@@ -233,12 +239,12 @@ CONFIG_SETUP_XIP_CACHE=y
 CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-CONFIG_CPU_INFO_V2=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
 CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -249,13 +255,11 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 #
 # Northbridge
 #
-CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
 CONFIG_NORTHBRIDGE_INTEL_X4X=y
 
 #
 # Southbridge
 #
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -273,10 +277,10 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
 # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
 
 #
 # Super I/O
@@ -306,17 +310,16 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
-CONFIG_RAMTOP=0x1000000
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_HPET_ADDRESS=0xfed00000
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # end of Chipset
 
 #
@@ -328,6 +331,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
 CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
@@ -346,16 +350,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
 # end of Devices
 
 #
@@ -386,8 +400,12 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -397,6 +415,7 @@ CONFIG_GFX_GMA_GENERATION="G45"
 CONFIG_GFX_GMA_PCH="No_PCH"
 CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
 CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -408,6 +427,12 @@ CONFIG_VGA=y
 # Security
 #
 
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
 #
 # Verified Boot (vboot)
 #
@@ -451,6 +476,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -461,6 +487,8 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
@@ -487,28 +515,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -533,12 +539,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
 # end of Debugging
 
 CONFIG_RAMSTAGE_ADA=y
@@ -546,6 +550,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
 CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

resources/coreboot/ga-g41m-es2l/board.cfg

@@ -5,3 +5,5 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 grub_scan_disk="ata"
+microcode_required="n"
+blobs_required="n"

resources/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode

@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
 # CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 CONFIG_VENDOR_GIGABYTE=y
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_GIGABYTE=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
@@ -107,21 +111,21 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="GIGABYTE"
 CONFIG_CBFS_SIZE=0x00100000
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_MAX_CPUS=4
-# CONFIG_VBOOT is not set
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GIGABYTE"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_POST_IO=y
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_POST_DEVICE=y
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -142,6 +146,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GIGABYTE_GA_D510UD is not set
 CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
 # CONFIG_BOARD_GIGABYTE_GA_H61M_S2PV is not set
+# CONFIG_BOARD_GIGABYTE_GA_H61M_DS2 is not set
 # CONFIG_BOARD_GIGABYTE_GA_H61M_DS2V is not set
 # CONFIG_BOARD_GIGABYTE_GA_H61MA_D3V is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -152,10 +157,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_DEBUG_SMI is not set
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -187,30 +194,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_RAMBASE=0xe00000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_STACK_SIZE=0x1000
+CONFIG_STACK_SIZE=0x2000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_AZALIA_MAX_CODECS=3
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_UART_PCI_ADDR=0x0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -223,7 +229,6 @@ CONFIG_CPU_INTEL_MODEL_1067X=y
 CONFIG_CPU_INTEL_MODEL_F3X=y
 CONFIG_CPU_INTEL_MODEL_F4X=y
 CONFIG_SOCKET_SPECIFIC_OPTIONS=y
-CONFIG_SSE2=y
 CONFIG_CPU_INTEL_SOCKET_LGA775=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -236,6 +241,7 @@ CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
 # CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
@@ -243,12 +249,12 @@ CONFIG_SETUP_XIP_CACHE=y
 CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-CONFIG_CPU_INFO_V2=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
 CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -259,13 +265,11 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 #
 # Northbridge
 #
-CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
 CONFIG_NORTHBRIDGE_INTEL_X4X=y
 
 #
 # Southbridge
 #
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -284,10 +288,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
 CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
 
 #
 # Super I/O
@@ -312,17 +316,16 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
-CONFIG_RAMTOP=0x1000000
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_HPET_ADDRESS=0xfed00000
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # end of Chipset
 
 #
@@ -334,6 +337,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
 CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
@@ -352,16 +356,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
 # end of Devices
 
 #
@@ -393,7 +407,11 @@ CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -403,6 +421,7 @@ CONFIG_GFX_GMA_GENERATION="G45"
 CONFIG_GFX_GMA_PCH="No_PCH"
 CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
 CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -414,6 +433,12 @@ CONFIG_VGA=y
 # Security
 #
 
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
 #
 # Verified Boot (vboot)
 #
@@ -458,6 +483,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -468,6 +494,8 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
@@ -494,28 +522,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -540,12 +546,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
 # end of Debugging
 
 CONFIG_RAMSTAGE_ADA=y
@@ -553,6 +557,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
 CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

resources/coreboot/gru_bob/board.cfg

@@ -2,3 +2,5 @@ cbtree="cros"
 romtype="normal"
 arch="AArch64"
 payload_uboot="y"
+blobs_required="n"
+microcode_required="n"

resources/coreboot/gru_kevin/board.cfg

@@ -2,3 +2,5 @@ cbtree="cros"
 romtype="normal"
 arch="AArch64"
 payload_uboot="y"
+blobs_required="n"
+microcode_required="n"

resources/coreboot/kcma-d8-rdimm_16mb/board.cfg

@@ -1,8 +1,8 @@
-cbtree="default"
-romtype="normal"
+cbtree="fam15h_rdimm"
+romtype="d8d16sas"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
+crossgcc_ada="n"

resources/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode

@@ -0,0 +1,676 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+# CONFIG_USE_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_NO_RELOCATABLE_RAMSTAGE=y
+# CONFIG_RELOCATABLE_RAMSTAGE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_ADI is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_ADVANSUS is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+CONFIG_VENDOR_ASUS=y
+# CONFIG_VENDOR_AVALUE is not set
+# CONFIG_VENDOR_BAP is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_ELMEX is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ESD is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IEI is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SCALEWAY is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TYAN is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="asus/kcma-d8"
+CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
+CONFIG_MAX_CPUS=16
+CONFIG_CBFS_SIZE=0x1000000
+CONFIG_MAINBOARD_VENDOR="ASUS"
+CONFIG_APIC_ID_OFFSET=0x0
+CONFIG_HW_MEM_HOLE_SIZEK=0x100000
+CONFIG_MAX_PHYSICAL_CPUS=2
+CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
+CONFIG_HT_CHAIN_UNITID_BASE=0x0
+CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_DIMM_SPD_SIZE=256
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
+CONFIG_DEVICETREE="devicetree.cb"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+# CONFIG_BOARD_ASUS_AM1I_A is not set
+# CONFIG_BOARD_ASUS_F2A85_M is not set
+# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
+# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
+# CONFIG_BOARD_ASUS_H61M_CS is not set
+CONFIG_BOARD_ASUS_KCMA_D8=y
+# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
+# CONFIG_BOARD_ASUS_KGPE_D16 is not set
+# CONFIG_BOARD_ASUS_M4A78_EM is not set
+# CONFIG_BOARD_ASUS_M4A785M is not set
+# CONFIG_BOARD_ASUS_M4A785TM is not set
+# CONFIG_BOARD_ASUS_M5A88_V is not set
+# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
+# CONFIG_BOARD_ASUS_P2B_D is not set
+# CONFIG_BOARD_ASUS_P2B_DS is not set
+# CONFIG_BOARD_ASUS_P2B_F is not set
+# CONFIG_BOARD_ASUS_P2B_LS is not set
+# CONFIG_BOARD_ASUS_P2B is not set
+# CONFIG_BOARD_ASUS_P3B_F is not set
+# CONFIG_BOARD_ASUS_P5GC_MX is not set
+# CONFIG_BOARD_ASUS_P5QC is not set
+# CONFIG_BOARD_ASUS_P5Q_PRO is not set
+# CONFIG_BOARD_ASUS_P5QL_PRO is not set
+# CONFIG_BOARD_ASUS_P5QL_EM is not set
+# CONFIG_BOARD_ASUS_P5QPL_AM is not set
+# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
+# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
+# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
+# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
+CONFIG_POST_IO=y
+CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c"
+CONFIG_DCACHE_RAM_BASE=0xc2000
+CONFIG_DCACHE_RAM_SIZE=0x1e000
+CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
+CONFIG_MAX_REBOOT_CNT=10
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_FMDFILE=""
+# CONFIG_VBOOT is not set
+CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
+CONFIG_POST_DEVICE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DIMM_MAX=4
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_USBDEBUG is not set
+CONFIG_MAINBOARD_VERSION="1.0"
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_NO_POST is not set
+CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
+CONFIG_HEAP_SIZE=0xc0000
+# CONFIG_CONSOLE_POST is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_BOARD_ROMSIZE_KB_2048=y
+# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x1000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# CONFIG_SYSTEM_TYPE_LAPTOP is not set
+# CONFIG_SYSTEM_TYPE_TABLET is not set
+# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
+# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
+# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_CPU_ADDR_BITS=48
+CONFIG_MMCONF_BUS_NUMBER=256
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
+# CONFIG_SOC_CAVIUM_CN81XX is not set
+CONFIG_ARCH_ARMV8_EXTENSION=0
+CONFIG_STACK_SIZE=0x1000
+# CONFIG_SOC_CAVIUM_COMMON is not set
+# CONFIG_SOC_INTEL_GLK is not set
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_HPET_MIN_TICKS=0x14
+CONFIG_UART_PCI_ADDR=0x0
+# CONFIG_SOC_MEDIATEK_MT8173 is not set
+# CONFIG_SOC_MEDIATEK_MT8183 is not set
+# CONFIG_SOC_NVIDIA_TEGRA124 is not set
+# CONFIG_SOC_NVIDIA_TEGRA210 is not set
+# CONFIG_SOC_QUALCOMM_COMMON is not set
+# CONFIG_SOC_QC_IPQ40XX is not set
+# CONFIG_SOC_QC_IPQ806X is not set
+# CONFIG_SOC_QUALCOMM_QCS405 is not set
+# CONFIG_SOC_QUALCOMM_SC7180 is not set
+# CONFIG_SOC_QUALCOMM_SDM845 is not set
+# CONFIG_SOC_ROCKCHIP_RK3288 is not set
+# CONFIG_SOC_ROCKCHIP_RK3399 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
+# CONFIG_SOC_UCB_RISCV is not set
+
+#
+# CPU
+#
+CONFIG_CPU_SOCKET_TYPE=0x14
+# CONFIG_EXT_RT_TBL_SUPPORT is not set
+CONFIG_CBB=0x0
+CONFIG_CDB=0x18
+CONFIG_XIP_ROM_SIZE=0x80000
+CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y
+CONFIG_CPU_AMD_MODEL_10XXX=y
+CONFIG_USE_LARGE_DCACHE=y
+CONFIG_NUM_IPI_STARTS=1
+CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
+CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
+CONFIG_DCACHE_AP_STACK_SIZE=0x500
+CONFIG_SET_FIDVID=y
+CONFIG_LIFT_BSP_APIC_ID=y
+CONFIG_SET_FIDVID_DEBUG=y
+CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
+# CONFIG_SET_FIDVID_CORE0_ONLY is not set
+CONFIG_SET_FIDVID_CORE_RANGE=0
+CONFIG_UDELAY_LAPIC_FIXED_FSB=200
+# CONFIG_CPU_AMD_AGESA is not set
+# CONFIG_CPU_AMD_PI is not set
+# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
+CONFIG_SSE2=y
+# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
+# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
+# CONFIG_CPU_TI_AM335X is not set
+CONFIG_PARALLEL_CPU_INIT=y
+# CONFIG_PARALLEL_MP is not set
+CONFIG_UDELAY_LAPIC=y
+# CONFIG_LAPIC_MONOTONIC_TIMER is not set
+# CONFIG_UDELAY_TSC is not set
+CONFIG_TSC_SYNC_LFENCE=y
+# CONFIG_TSC_SYNC_MFENCE is not set
+# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
+CONFIG_LOGICAL_CPUS=y
+# CONFIG_HAVE_SMI_HANDLER is not set
+# CONFIG_NO_SMM is not set
+# CONFIG_SMM_ASEG is not set
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
+CONFIG_SMM_STUB_STACK_SIZE=0x400
+# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
+# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
+CONFIG_X86_AMD_FIXED_MTRRS=y
+# CONFIG_X86_AMD_INIT_SIPI is not set
+# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
+# CONFIG_SOC_SETS_MSRS is not set
+CONFIG_CAR_GLOBAL_MIGRATION=y
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+# CONFIG_USES_MICROCODE_HEADER_FILES is not set
+# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+CONFIG_CPU_MICROCODE_CBFS_NONE=y
+
+#
+# Northbridge
+#
+# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
+CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
+CONFIG_AGP_APERTURE_SIZE=0x4000000
+CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
+# CONFIG_HT_CHAIN_DISTRIBUTE is not set
+# CONFIG_DIMM_DDR2 is not set
+CONFIG_DIMM_DDR3=y
+CONFIG_DIMM_REGISTERED=y
+CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
+# CONFIG_SVI_HIGH_FREQ is not set
+
+#
+# HyperTransport setup
+#
+# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
+CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
+# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
+CONFIG_LIMIT_HT_UP_WIDTH_16=y
+# CONFIG_NORTHBRIDGE_AMD_PI is not set
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
+CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
+# CONFIG_AMD_SB_CIMX is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
+CONFIG_SOUTHBRIDGE_AMD_SB700=y
+CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
+CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
+# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
+CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
+CONFIG_SOUTHBRIDGE_AMD_SR5650=y
+CONFIG_EXT_CONF_SUPPORT=y
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
+# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
+# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
+
+#
+# Super I/O
+#
+# CONFIG_SUPERIO_ASPEED_AST2400 is not set
+# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
+# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
+# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
+CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_WINBOND_W83667HG_A=y
+
+#
+# Embedded Controllers
+#
+# CONFIG_EC_GOOGLE_WILCO is not set
+# CONFIG_CAVIUM_BDK is not set
+# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
+# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
+# CONFIG_UEFI_2_4_BINDING is not set
+# CONFIG_UDK_2015_BINDING is not set
+# CONFIG_UDK_2017_BINDING is not set
+# CONFIG_USE_SIEMENS_HWILIB is not set
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+# CONFIG_ARCH_POSTCAR_X86_32 is not set
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
+# CONFIG_ARCH_VERSTAGE_X86_64 is not set
+# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
+# CONFIG_ARCH_POSTCAR_X86_64 is not set
+# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
+# CONFIG_USE_MARCH_586 is not set
+# CONFIG_AP_IN_SIPI_WAIT is not set
+# CONFIG_SIPI_VECTOR_IN_ROM is not set
+CONFIG_RAMBASE=0xe00000
+CONFIG_RAMTOP=0x1000000
+# CONFIG_CBMEM_TOP_BACKUP is not set
+CONFIG_PC80_SYSTEM=y
+# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
+# CONFIG_HPET_ADDRESS_OVERRIDE is not set
+CONFIG_HPET_ADDRESS=0xfed00000
+CONFIG_ID_SECTION_OFFSET=0x80
+# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
+# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
+CONFIG_ACPI_HAVE_PCAT_8259=y
+# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
+# CONFIG_IDT_IN_EVERY_STAGE is not set
+# CONFIG_PIRQ_ROUTE is not set
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
+# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_SMBUS_HAS_AUX_CHANNELS=y
+CONFIG_PCI=y
+# CONFIG_NO_MMCONF_SUPPORT is not set
+CONFIG_MMCONF_SUPPORT=y
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+# CONFIG_EARLY_PCI_BRIDGE is not set
+# CONFIG_SOFTWARE_I2C is not set
+
+#
+# Generic Drivers
+#
+# CONFIG_DRIVERS_AS3722_RTC is not set
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
+# CONFIG_GIC is not set
+# CONFIG_IPMI_KCS is not set
+# CONFIG_DRIVERS_LENOVO_WACOM is not set
+# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
+# CONFIG_RT8168_SET_LED_MODE is not set
+# CONFIG_SMMSTORE_IN_CBFS is not set
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_SDCARD is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
+# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
+# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+# CONFIG_NO_UART_ON_SUPERIO is not set
+# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
+# CONFIG_UART_OVERRIDE_REFCLK is not set
+# CONFIG_DRIVERS_UART_8250MEM is not set
+# CONFIG_DRIVERS_UART_8250MEM_32 is not set
+# CONFIG_HAVE_UART_SPECIAL is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_DRIVERS_UART_PL011 is not set
+# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_WIFI is not set
+# CONFIG_DRIVERS_AMD_PI is not set
+CONFIG_DRIVERS_ASPEED_AST2050=y
+CONFIG_DRIVERS_ASPEED_AST_COMMON=y
+# CONFIG_DRIVERS_I2C_MAX98373 is not set
+# CONFIG_DRIVERS_I2C_MAX98927 is not set
+# CONFIG_DRIVERS_I2C_PCA9538 is not set
+# CONFIG_DRIVERS_I2C_PCF8523 is not set
+# CONFIG_DRIVERS_I2C_PTN3460 is not set
+# CONFIG_DRIVERS_I2C_RT1011 is not set
+# CONFIG_DRIVERS_I2C_RT5663 is not set
+# CONFIG_DRIVERS_I2C_RTD2132 is not set
+# CONFIG_DRIVERS_I2C_RX6110SA is not set
+# CONFIG_DRIVERS_I2C_SX9310 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
+CONFIG_DRIVERS_I2C_W83795=y
+# CONFIG_PLATFORM_USES_FSP1_0 is not set
+# CONFIG_PLATFORM_USES_FSP2_0 is not set
+# CONFIG_PLATFORM_USES_FSP2_1 is not set
+# CONFIG_INTEL_DDI is not set
+# CONFIG_INTEL_EDID is not set
+# CONFIG_INTEL_INT15 is not set
+# CONFIG_INTEL_GMA_ACPI is not set
+# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
+# CONFIG_INTEL_GMA_SWSMISCI is not set
+# CONFIG_DRIVER_INTEL_I210 is not set
+# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
+# CONFIG_HAVE_INTEL_PTT is not set
+# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
+# CONFIG_DRIVER_MAXIM_MAX77686 is not set
+# CONFIG_DRIVER_PARADE_PS8625 is not set
+# CONFIG_DRIVER_PARADE_PS8640 is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_LPC_TPM is not set
+# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
+CONFIG_VGA=y
+# CONFIG_DRIVERS_RICOH_RCE822 is not set
+# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
+# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
+# CONFIG_DRIVERS_SIL_3114 is not set
+# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
+# CONFIG_DRIVER_TI_TPS65090 is not set
+# CONFIG_DRIVERS_TI_TPS65913 is not set
+# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
+# CONFIG_DRIVERS_USB_ACPI is not set
+# CONFIG_COMMONLIB_STORAGE is not set
+
+#
+# Security
+#
+
+#
+# Verified Boot (vboot)
+#
+
+#
+# Trusted Platform Module
+#
+CONFIG_USER_NO_TPM=y
+
+#
+# Memory initialization
+#
+# CONFIG_STM is not set
+# CONFIG_ACPI_SATA_GENERATOR is not set
+# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
+# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
+# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
+# CONFIG_RTC is not set
+
+#
+# Console
+#
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
+# CONFIG_HWBASE_DEBUG_CB is not set
+CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
+CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
+CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
+# CONFIG_NO_MONOTONIC_TIMER is not set
+CONFIG_HAVE_MONOTONIC_TIMER=y
+# CONFIG_TIMER_QUEUE is not set
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_PCI_IO_CFG_EXT=y
+CONFIG_IOAPIC=y
+# CONFIG_USE_WATCHDOG_ON_BOOT is not set
+# CONFIG_GFXUMA is not set
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+# CONFIG_COMMON_FADT is not set
+# CONFIG_ACPI_NHLT is not set
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# CONFIG_PAYLOAD_ELF is not set
+# CONFIG_PAYLOAD_BAYOU is not set
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_LINUXBOOT is not set
+# CONFIG_PAYLOAD_SEABIOS is not set
+# CONFIG_PAYLOAD_UBOOT is not set
+# CONFIG_PAYLOAD_YABITS is not set
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+CONFIG_PAYLOAD_OPTIONS=""
+# CONFIG_PXE is not set
+# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
+CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
+
+#
+# Secondary Payloads
+#
+# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
+# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
+# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
+# CONFIG_TINT_SECONDARY_PAYLOAD is not set
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+CONFIG_HAVE_DEBUG_CAR=y
+# CONFIG_DEBUG_CAR is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_TRACE is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_HAVE_EM100_SUPPORT is not set
+CONFIG_ENABLE_APIC_EXT_ID=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
+# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
+# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
+# CONFIG_REG_SCRIPT is not set
+# CONFIG_NO_XIP_EARLY_STAGES is not set
+# CONFIG_EARLY_CBMEM_LIST is not set
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_NO_STAGE_CACHE=y
+CONFIG_BOOTBLOCK_CUSTOM=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

resources/coreboot/kcma-d8-rdimm_2mb/board.cfg

@@ -1,8 +1,8 @@
-cbtree="default"
-romtype="t440p"
+cbtree="fam15h_rdimm"
+romtype="d8d16sas"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
+crossgcc_ada="n"

resources/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode

@@ -0,0 +1,676 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+# CONFIG_USE_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_NO_RELOCATABLE_RAMSTAGE=y
+# CONFIG_RELOCATABLE_RAMSTAGE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_ADI is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_ADVANSUS is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+CONFIG_VENDOR_ASUS=y
+# CONFIG_VENDOR_AVALUE is not set
+# CONFIG_VENDOR_BAP is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_ELMEX is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ESD is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IEI is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SCALEWAY is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TYAN is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="asus/kcma-d8"
+CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
+CONFIG_MAX_CPUS=16
+CONFIG_CBFS_SIZE=0x200000
+CONFIG_MAINBOARD_VENDOR="ASUS"
+CONFIG_APIC_ID_OFFSET=0x0
+CONFIG_HW_MEM_HOLE_SIZEK=0x100000
+CONFIG_MAX_PHYSICAL_CPUS=2
+CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
+CONFIG_HT_CHAIN_UNITID_BASE=0x0
+CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_DIMM_SPD_SIZE=256
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
+CONFIG_DEVICETREE="devicetree.cb"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+# CONFIG_BOARD_ASUS_AM1I_A is not set
+# CONFIG_BOARD_ASUS_F2A85_M is not set
+# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
+# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
+# CONFIG_BOARD_ASUS_H61M_CS is not set
+CONFIG_BOARD_ASUS_KCMA_D8=y
+# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
+# CONFIG_BOARD_ASUS_KGPE_D16 is not set
+# CONFIG_BOARD_ASUS_M4A78_EM is not set
+# CONFIG_BOARD_ASUS_M4A785M is not set
+# CONFIG_BOARD_ASUS_M4A785TM is not set
+# CONFIG_BOARD_ASUS_M5A88_V is not set
+# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
+# CONFIG_BOARD_ASUS_P2B_D is not set
+# CONFIG_BOARD_ASUS_P2B_DS is not set
+# CONFIG_BOARD_ASUS_P2B_F is not set
+# CONFIG_BOARD_ASUS_P2B_LS is not set
+# CONFIG_BOARD_ASUS_P2B is not set
+# CONFIG_BOARD_ASUS_P3B_F is not set
+# CONFIG_BOARD_ASUS_P5GC_MX is not set
+# CONFIG_BOARD_ASUS_P5QC is not set
+# CONFIG_BOARD_ASUS_P5Q_PRO is not set
+# CONFIG_BOARD_ASUS_P5QL_PRO is not set
+# CONFIG_BOARD_ASUS_P5QL_EM is not set
+# CONFIG_BOARD_ASUS_P5QPL_AM is not set
+# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
+# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
+# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
+# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
+CONFIG_POST_IO=y
+CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c"
+CONFIG_DCACHE_RAM_BASE=0xc2000
+CONFIG_DCACHE_RAM_SIZE=0x1e000
+CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
+CONFIG_MAX_REBOOT_CNT=10
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_FMDFILE=""
+# CONFIG_VBOOT is not set
+CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
+CONFIG_POST_DEVICE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DIMM_MAX=4
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_USBDEBUG is not set
+CONFIG_MAINBOARD_VERSION="1.0"
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_NO_POST is not set
+CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
+CONFIG_HEAP_SIZE=0xc0000
+# CONFIG_CONSOLE_POST is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_BOARD_ROMSIZE_KB_2048=y
+# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_2048=y
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=2048
+CONFIG_ROM_SIZE=0x200000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# CONFIG_SYSTEM_TYPE_LAPTOP is not set
+# CONFIG_SYSTEM_TYPE_TABLET is not set
+# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
+# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
+# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_CPU_ADDR_BITS=48
+CONFIG_MMCONF_BUS_NUMBER=256
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
+# CONFIG_SOC_CAVIUM_CN81XX is not set
+CONFIG_ARCH_ARMV8_EXTENSION=0
+CONFIG_STACK_SIZE=0x1000
+# CONFIG_SOC_CAVIUM_COMMON is not set
+# CONFIG_SOC_INTEL_GLK is not set
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_HPET_MIN_TICKS=0x14
+CONFIG_UART_PCI_ADDR=0x0
+# CONFIG_SOC_MEDIATEK_MT8173 is not set
+# CONFIG_SOC_MEDIATEK_MT8183 is not set
+# CONFIG_SOC_NVIDIA_TEGRA124 is not set
+# CONFIG_SOC_NVIDIA_TEGRA210 is not set
+# CONFIG_SOC_QUALCOMM_COMMON is not set
+# CONFIG_SOC_QC_IPQ40XX is not set
+# CONFIG_SOC_QC_IPQ806X is not set
+# CONFIG_SOC_QUALCOMM_QCS405 is not set
+# CONFIG_SOC_QUALCOMM_SC7180 is not set
+# CONFIG_SOC_QUALCOMM_SDM845 is not set
+# CONFIG_SOC_ROCKCHIP_RK3288 is not set
+# CONFIG_SOC_ROCKCHIP_RK3399 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
+# CONFIG_SOC_UCB_RISCV is not set
+
+#
+# CPU
+#
+CONFIG_CPU_SOCKET_TYPE=0x14
+# CONFIG_EXT_RT_TBL_SUPPORT is not set
+CONFIG_CBB=0x0
+CONFIG_CDB=0x18
+CONFIG_XIP_ROM_SIZE=0x80000
+CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y
+CONFIG_CPU_AMD_MODEL_10XXX=y
+CONFIG_USE_LARGE_DCACHE=y
+CONFIG_NUM_IPI_STARTS=1
+CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
+CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
+CONFIG_DCACHE_AP_STACK_SIZE=0x500
+CONFIG_SET_FIDVID=y
+CONFIG_LIFT_BSP_APIC_ID=y
+CONFIG_SET_FIDVID_DEBUG=y
+CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
+# CONFIG_SET_FIDVID_CORE0_ONLY is not set
+CONFIG_SET_FIDVID_CORE_RANGE=0
+CONFIG_UDELAY_LAPIC_FIXED_FSB=200
+# CONFIG_CPU_AMD_AGESA is not set
+# CONFIG_CPU_AMD_PI is not set
+# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
+CONFIG_SSE2=y
+# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
+# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
+# CONFIG_CPU_TI_AM335X is not set
+CONFIG_PARALLEL_CPU_INIT=y
+# CONFIG_PARALLEL_MP is not set
+CONFIG_UDELAY_LAPIC=y
+# CONFIG_LAPIC_MONOTONIC_TIMER is not set
+# CONFIG_UDELAY_TSC is not set
+CONFIG_TSC_SYNC_LFENCE=y
+# CONFIG_TSC_SYNC_MFENCE is not set
+# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
+CONFIG_LOGICAL_CPUS=y
+# CONFIG_HAVE_SMI_HANDLER is not set
+# CONFIG_NO_SMM is not set
+# CONFIG_SMM_ASEG is not set
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
+CONFIG_SMM_STUB_STACK_SIZE=0x400
+# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
+# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
+CONFIG_X86_AMD_FIXED_MTRRS=y
+# CONFIG_X86_AMD_INIT_SIPI is not set
+# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
+# CONFIG_SOC_SETS_MSRS is not set
+CONFIG_CAR_GLOBAL_MIGRATION=y
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+# CONFIG_USES_MICROCODE_HEADER_FILES is not set
+# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+CONFIG_CPU_MICROCODE_CBFS_NONE=y
+
+#
+# Northbridge
+#
+# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
+CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
+CONFIG_AGP_APERTURE_SIZE=0x4000000
+CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
+# CONFIG_HT_CHAIN_DISTRIBUTE is not set
+# CONFIG_DIMM_DDR2 is not set
+CONFIG_DIMM_DDR3=y
+CONFIG_DIMM_REGISTERED=y
+CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
+# CONFIG_SVI_HIGH_FREQ is not set
+
+#
+# HyperTransport setup
+#
+# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
+CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
+# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
+CONFIG_LIMIT_HT_UP_WIDTH_16=y
+# CONFIG_NORTHBRIDGE_AMD_PI is not set
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
+CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
+# CONFIG_AMD_SB_CIMX is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
+CONFIG_SOUTHBRIDGE_AMD_SB700=y
+CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
+CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
+# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
+CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
+CONFIG_SOUTHBRIDGE_AMD_SR5650=y
+CONFIG_EXT_CONF_SUPPORT=y
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
+# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
+# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
+
+#
+# Super I/O
+#
+# CONFIG_SUPERIO_ASPEED_AST2400 is not set
+# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
+# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
+# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
+CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_WINBOND_W83667HG_A=y
+
+#
+# Embedded Controllers
+#
+# CONFIG_EC_GOOGLE_WILCO is not set
+# CONFIG_CAVIUM_BDK is not set
+# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
+# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
+# CONFIG_UEFI_2_4_BINDING is not set
+# CONFIG_UDK_2015_BINDING is not set
+# CONFIG_UDK_2017_BINDING is not set
+# CONFIG_USE_SIEMENS_HWILIB is not set
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+# CONFIG_ARCH_POSTCAR_X86_32 is not set
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
+# CONFIG_ARCH_VERSTAGE_X86_64 is not set
+# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
+# CONFIG_ARCH_POSTCAR_X86_64 is not set
+# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
+# CONFIG_USE_MARCH_586 is not set
+# CONFIG_AP_IN_SIPI_WAIT is not set
+# CONFIG_SIPI_VECTOR_IN_ROM is not set
+CONFIG_RAMBASE=0xe00000
+CONFIG_RAMTOP=0x1000000
+# CONFIG_CBMEM_TOP_BACKUP is not set
+CONFIG_PC80_SYSTEM=y
+# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
+# CONFIG_HPET_ADDRESS_OVERRIDE is not set
+CONFIG_HPET_ADDRESS=0xfed00000
+CONFIG_ID_SECTION_OFFSET=0x80
+# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
+# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
+CONFIG_ACPI_HAVE_PCAT_8259=y
+# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
+# CONFIG_IDT_IN_EVERY_STAGE is not set
+# CONFIG_PIRQ_ROUTE is not set
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
+# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_SMBUS_HAS_AUX_CHANNELS=y
+CONFIG_PCI=y
+# CONFIG_NO_MMCONF_SUPPORT is not set
+CONFIG_MMCONF_SUPPORT=y
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+# CONFIG_EARLY_PCI_BRIDGE is not set
+# CONFIG_SOFTWARE_I2C is not set
+
+#
+# Generic Drivers
+#
+# CONFIG_DRIVERS_AS3722_RTC is not set
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
+# CONFIG_GIC is not set
+# CONFIG_IPMI_KCS is not set
+# CONFIG_DRIVERS_LENOVO_WACOM is not set
+# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
+# CONFIG_RT8168_SET_LED_MODE is not set
+# CONFIG_SMMSTORE_IN_CBFS is not set
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_SDCARD is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
+# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
+# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+# CONFIG_NO_UART_ON_SUPERIO is not set
+# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
+# CONFIG_UART_OVERRIDE_REFCLK is not set
+# CONFIG_DRIVERS_UART_8250MEM is not set
+# CONFIG_DRIVERS_UART_8250MEM_32 is not set
+# CONFIG_HAVE_UART_SPECIAL is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_DRIVERS_UART_PL011 is not set
+# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_WIFI is not set
+# CONFIG_DRIVERS_AMD_PI is not set
+CONFIG_DRIVERS_ASPEED_AST2050=y
+CONFIG_DRIVERS_ASPEED_AST_COMMON=y
+# CONFIG_DRIVERS_I2C_MAX98373 is not set
+# CONFIG_DRIVERS_I2C_MAX98927 is not set
+# CONFIG_DRIVERS_I2C_PCA9538 is not set
+# CONFIG_DRIVERS_I2C_PCF8523 is not set
+# CONFIG_DRIVERS_I2C_PTN3460 is not set
+# CONFIG_DRIVERS_I2C_RT1011 is not set
+# CONFIG_DRIVERS_I2C_RT5663 is not set
+# CONFIG_DRIVERS_I2C_RTD2132 is not set
+# CONFIG_DRIVERS_I2C_RX6110SA is not set
+# CONFIG_DRIVERS_I2C_SX9310 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
+CONFIG_DRIVERS_I2C_W83795=y
+# CONFIG_PLATFORM_USES_FSP1_0 is not set
+# CONFIG_PLATFORM_USES_FSP2_0 is not set
+# CONFIG_PLATFORM_USES_FSP2_1 is not set
+# CONFIG_INTEL_DDI is not set
+# CONFIG_INTEL_EDID is not set
+# CONFIG_INTEL_INT15 is not set
+# CONFIG_INTEL_GMA_ACPI is not set
+# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
+# CONFIG_INTEL_GMA_SWSMISCI is not set
+# CONFIG_DRIVER_INTEL_I210 is not set
+# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
+# CONFIG_HAVE_INTEL_PTT is not set
+# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
+# CONFIG_DRIVER_MAXIM_MAX77686 is not set
+# CONFIG_DRIVER_PARADE_PS8625 is not set
+# CONFIG_DRIVER_PARADE_PS8640 is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_LPC_TPM is not set
+# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
+CONFIG_VGA=y
+# CONFIG_DRIVERS_RICOH_RCE822 is not set
+# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
+# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
+# CONFIG_DRIVERS_SIL_3114 is not set
+# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
+# CONFIG_DRIVER_TI_TPS65090 is not set
+# CONFIG_DRIVERS_TI_TPS65913 is not set
+# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
+# CONFIG_DRIVERS_USB_ACPI is not set
+# CONFIG_COMMONLIB_STORAGE is not set
+
+#
+# Security
+#
+
+#
+# Verified Boot (vboot)
+#
+
+#
+# Trusted Platform Module
+#
+CONFIG_USER_NO_TPM=y
+
+#
+# Memory initialization
+#
+# CONFIG_STM is not set
+# CONFIG_ACPI_SATA_GENERATOR is not set
+# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
+# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
+# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
+# CONFIG_RTC is not set
+
+#
+# Console
+#
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
+# CONFIG_HWBASE_DEBUG_CB is not set
+CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
+CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
+CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
+# CONFIG_NO_MONOTONIC_TIMER is not set
+CONFIG_HAVE_MONOTONIC_TIMER=y
+# CONFIG_TIMER_QUEUE is not set
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_PCI_IO_CFG_EXT=y
+CONFIG_IOAPIC=y
+# CONFIG_USE_WATCHDOG_ON_BOOT is not set
+# CONFIG_GFXUMA is not set
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+# CONFIG_COMMON_FADT is not set
+# CONFIG_ACPI_NHLT is not set
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# CONFIG_PAYLOAD_ELF is not set
+# CONFIG_PAYLOAD_BAYOU is not set
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_LINUXBOOT is not set
+# CONFIG_PAYLOAD_SEABIOS is not set
+# CONFIG_PAYLOAD_UBOOT is not set
+# CONFIG_PAYLOAD_YABITS is not set
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+CONFIG_PAYLOAD_OPTIONS=""
+# CONFIG_PXE is not set
+# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
+CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
+
+#
+# Secondary Payloads
+#
+# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
+# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
+# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
+# CONFIG_TINT_SECONDARY_PAYLOAD is not set
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+CONFIG_HAVE_DEBUG_CAR=y
+# CONFIG_DEBUG_CAR is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_TRACE is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_HAVE_EM100_SUPPORT is not set
+CONFIG_ENABLE_APIC_EXT_ID=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
+# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
+# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
+# CONFIG_REG_SCRIPT is not set
+# CONFIG_NO_XIP_EARLY_STAGES is not set
+# CONFIG_EARLY_CBMEM_LIST is not set
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_NO_STAGE_CACHE=y
+CONFIG_BOOTBLOCK_CUSTOM=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

resources/coreboot/kcma-d8-udimm_16mb/board.cfg

@@ -1,8 +1,8 @@
-cbtree="default"
-romtype="normal"
+cbtree="fam15h_udimm"
+romtype="d8d16sas"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
+crossgcc_ada="n"

resources/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode

@@ -0,0 +1,676 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+# CONFIG_USE_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_NO_RELOCATABLE_RAMSTAGE=y
+# CONFIG_RELOCATABLE_RAMSTAGE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_ADI is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_ADVANSUS is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+CONFIG_VENDOR_ASUS=y
+# CONFIG_VENDOR_AVALUE is not set
+# CONFIG_VENDOR_BAP is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_ELMEX is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ESD is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IEI is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SCALEWAY is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TYAN is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="asus/kcma-d8"
+CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
+CONFIG_MAX_CPUS=16
+CONFIG_CBFS_SIZE=0x1000000
+CONFIG_MAINBOARD_VENDOR="ASUS"
+CONFIG_APIC_ID_OFFSET=0x0
+CONFIG_HW_MEM_HOLE_SIZEK=0x100000
+CONFIG_MAX_PHYSICAL_CPUS=2
+CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
+CONFIG_HT_CHAIN_UNITID_BASE=0x0
+CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_DIMM_SPD_SIZE=256
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
+CONFIG_DEVICETREE="devicetree.cb"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+# CONFIG_BOARD_ASUS_AM1I_A is not set
+# CONFIG_BOARD_ASUS_F2A85_M is not set
+# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
+# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
+# CONFIG_BOARD_ASUS_H61M_CS is not set
+CONFIG_BOARD_ASUS_KCMA_D8=y
+# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
+# CONFIG_BOARD_ASUS_KGPE_D16 is not set
+# CONFIG_BOARD_ASUS_M4A78_EM is not set
+# CONFIG_BOARD_ASUS_M4A785M is not set
+# CONFIG_BOARD_ASUS_M4A785TM is not set
+# CONFIG_BOARD_ASUS_M5A88_V is not set
+# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
+# CONFIG_BOARD_ASUS_P2B_D is not set
+# CONFIG_BOARD_ASUS_P2B_DS is not set
+# CONFIG_BOARD_ASUS_P2B_F is not set
+# CONFIG_BOARD_ASUS_P2B_LS is not set
+# CONFIG_BOARD_ASUS_P2B is not set
+# CONFIG_BOARD_ASUS_P3B_F is not set
+# CONFIG_BOARD_ASUS_P5GC_MX is not set
+# CONFIG_BOARD_ASUS_P5QC is not set
+# CONFIG_BOARD_ASUS_P5Q_PRO is not set
+# CONFIG_BOARD_ASUS_P5QL_PRO is not set
+# CONFIG_BOARD_ASUS_P5QL_EM is not set
+# CONFIG_BOARD_ASUS_P5QPL_AM is not set
+# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
+# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
+# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
+# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
+CONFIG_POST_IO=y
+CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c"
+CONFIG_DCACHE_RAM_BASE=0xc2000
+CONFIG_DCACHE_RAM_SIZE=0x1e000
+CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
+CONFIG_MAX_REBOOT_CNT=10
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_FMDFILE=""
+# CONFIG_VBOOT is not set
+CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
+CONFIG_POST_DEVICE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DIMM_MAX=4
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_USBDEBUG is not set
+CONFIG_MAINBOARD_VERSION="1.0"
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_NO_POST is not set
+CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
+CONFIG_HEAP_SIZE=0xc0000
+# CONFIG_CONSOLE_POST is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_BOARD_ROMSIZE_KB_2048=y
+# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x1000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# CONFIG_SYSTEM_TYPE_LAPTOP is not set
+# CONFIG_SYSTEM_TYPE_TABLET is not set
+# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
+# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
+# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_CPU_ADDR_BITS=48
+CONFIG_MMCONF_BUS_NUMBER=256
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
+# CONFIG_SOC_CAVIUM_CN81XX is not set
+CONFIG_ARCH_ARMV8_EXTENSION=0
+CONFIG_STACK_SIZE=0x1000
+# CONFIG_SOC_CAVIUM_COMMON is not set
+# CONFIG_SOC_INTEL_GLK is not set
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_HPET_MIN_TICKS=0x14
+CONFIG_UART_PCI_ADDR=0x0
+# CONFIG_SOC_MEDIATEK_MT8173 is not set
+# CONFIG_SOC_MEDIATEK_MT8183 is not set
+# CONFIG_SOC_NVIDIA_TEGRA124 is not set
+# CONFIG_SOC_NVIDIA_TEGRA210 is not set
+# CONFIG_SOC_QUALCOMM_COMMON is not set
+# CONFIG_SOC_QC_IPQ40XX is not set
+# CONFIG_SOC_QC_IPQ806X is not set
+# CONFIG_SOC_QUALCOMM_QCS405 is not set
+# CONFIG_SOC_QUALCOMM_SC7180 is not set
+# CONFIG_SOC_QUALCOMM_SDM845 is not set
+# CONFIG_SOC_ROCKCHIP_RK3288 is not set
+# CONFIG_SOC_ROCKCHIP_RK3399 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
+# CONFIG_SOC_UCB_RISCV is not set
+
+#
+# CPU
+#
+CONFIG_CPU_SOCKET_TYPE=0x14
+# CONFIG_EXT_RT_TBL_SUPPORT is not set
+CONFIG_CBB=0x0
+CONFIG_CDB=0x18
+CONFIG_XIP_ROM_SIZE=0x80000
+CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y
+CONFIG_CPU_AMD_MODEL_10XXX=y
+CONFIG_USE_LARGE_DCACHE=y
+CONFIG_NUM_IPI_STARTS=1
+CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
+CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
+CONFIG_DCACHE_AP_STACK_SIZE=0x500
+CONFIG_SET_FIDVID=y
+CONFIG_LIFT_BSP_APIC_ID=y
+CONFIG_SET_FIDVID_DEBUG=y
+CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
+# CONFIG_SET_FIDVID_CORE0_ONLY is not set
+CONFIG_SET_FIDVID_CORE_RANGE=0
+CONFIG_UDELAY_LAPIC_FIXED_FSB=200
+# CONFIG_CPU_AMD_AGESA is not set
+# CONFIG_CPU_AMD_PI is not set
+# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
+CONFIG_SSE2=y
+# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
+# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
+# CONFIG_CPU_TI_AM335X is not set
+CONFIG_PARALLEL_CPU_INIT=y
+# CONFIG_PARALLEL_MP is not set
+CONFIG_UDELAY_LAPIC=y
+# CONFIG_LAPIC_MONOTONIC_TIMER is not set
+# CONFIG_UDELAY_TSC is not set
+CONFIG_TSC_SYNC_LFENCE=y
+# CONFIG_TSC_SYNC_MFENCE is not set
+# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
+CONFIG_LOGICAL_CPUS=y
+# CONFIG_HAVE_SMI_HANDLER is not set
+# CONFIG_NO_SMM is not set
+# CONFIG_SMM_ASEG is not set
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
+CONFIG_SMM_STUB_STACK_SIZE=0x400
+# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
+# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
+CONFIG_X86_AMD_FIXED_MTRRS=y
+# CONFIG_X86_AMD_INIT_SIPI is not set
+# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
+# CONFIG_SOC_SETS_MSRS is not set
+CONFIG_CAR_GLOBAL_MIGRATION=y
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+# CONFIG_USES_MICROCODE_HEADER_FILES is not set
+# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+CONFIG_CPU_MICROCODE_CBFS_NONE=y
+
+#
+# Northbridge
+#
+# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
+CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
+CONFIG_AGP_APERTURE_SIZE=0x4000000
+CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
+# CONFIG_HT_CHAIN_DISTRIBUTE is not set
+# CONFIG_DIMM_DDR2 is not set
+CONFIG_DIMM_DDR3=y
+CONFIG_DIMM_REGISTERED=y
+CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
+# CONFIG_SVI_HIGH_FREQ is not set
+
+#
+# HyperTransport setup
+#
+# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
+CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
+# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
+CONFIG_LIMIT_HT_UP_WIDTH_16=y
+# CONFIG_NORTHBRIDGE_AMD_PI is not set
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
+CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
+# CONFIG_AMD_SB_CIMX is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
+CONFIG_SOUTHBRIDGE_AMD_SB700=y
+CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
+CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
+# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
+CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
+CONFIG_SOUTHBRIDGE_AMD_SR5650=y
+CONFIG_EXT_CONF_SUPPORT=y
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
+# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
+# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
+
+#
+# Super I/O
+#
+# CONFIG_SUPERIO_ASPEED_AST2400 is not set
+# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
+# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
+# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
+CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_WINBOND_W83667HG_A=y
+
+#
+# Embedded Controllers
+#
+# CONFIG_EC_GOOGLE_WILCO is not set
+# CONFIG_CAVIUM_BDK is not set
+# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
+# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
+# CONFIG_UEFI_2_4_BINDING is not set
+# CONFIG_UDK_2015_BINDING is not set
+# CONFIG_UDK_2017_BINDING is not set
+# CONFIG_USE_SIEMENS_HWILIB is not set
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+# CONFIG_ARCH_POSTCAR_X86_32 is not set
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
+# CONFIG_ARCH_VERSTAGE_X86_64 is not set
+# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
+# CONFIG_ARCH_POSTCAR_X86_64 is not set
+# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
+# CONFIG_USE_MARCH_586 is not set
+# CONFIG_AP_IN_SIPI_WAIT is not set
+# CONFIG_SIPI_VECTOR_IN_ROM is not set
+CONFIG_RAMBASE=0xe00000
+CONFIG_RAMTOP=0x1000000
+# CONFIG_CBMEM_TOP_BACKUP is not set
+CONFIG_PC80_SYSTEM=y
+# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
+# CONFIG_HPET_ADDRESS_OVERRIDE is not set
+CONFIG_HPET_ADDRESS=0xfed00000
+CONFIG_ID_SECTION_OFFSET=0x80
+# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
+# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
+CONFIG_ACPI_HAVE_PCAT_8259=y
+# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
+# CONFIG_IDT_IN_EVERY_STAGE is not set
+# CONFIG_PIRQ_ROUTE is not set
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
+# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_SMBUS_HAS_AUX_CHANNELS=y
+CONFIG_PCI=y
+# CONFIG_NO_MMCONF_SUPPORT is not set
+CONFIG_MMCONF_SUPPORT=y
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+# CONFIG_EARLY_PCI_BRIDGE is not set
+# CONFIG_SOFTWARE_I2C is not set
+
+#
+# Generic Drivers
+#
+# CONFIG_DRIVERS_AS3722_RTC is not set
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
+# CONFIG_GIC is not set
+# CONFIG_IPMI_KCS is not set
+# CONFIG_DRIVERS_LENOVO_WACOM is not set
+# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
+# CONFIG_RT8168_SET_LED_MODE is not set
+# CONFIG_SMMSTORE_IN_CBFS is not set
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_SDCARD is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
+# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
+# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+# CONFIG_NO_UART_ON_SUPERIO is not set
+# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
+# CONFIG_UART_OVERRIDE_REFCLK is not set
+# CONFIG_DRIVERS_UART_8250MEM is not set
+# CONFIG_DRIVERS_UART_8250MEM_32 is not set
+# CONFIG_HAVE_UART_SPECIAL is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_DRIVERS_UART_PL011 is not set
+# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_WIFI is not set
+# CONFIG_DRIVERS_AMD_PI is not set
+CONFIG_DRIVERS_ASPEED_AST2050=y
+CONFIG_DRIVERS_ASPEED_AST_COMMON=y
+# CONFIG_DRIVERS_I2C_MAX98373 is not set
+# CONFIG_DRIVERS_I2C_MAX98927 is not set
+# CONFIG_DRIVERS_I2C_PCA9538 is not set
+# CONFIG_DRIVERS_I2C_PCF8523 is not set
+# CONFIG_DRIVERS_I2C_PTN3460 is not set
+# CONFIG_DRIVERS_I2C_RT1011 is not set
+# CONFIG_DRIVERS_I2C_RT5663 is not set
+# CONFIG_DRIVERS_I2C_RTD2132 is not set
+# CONFIG_DRIVERS_I2C_RX6110SA is not set
+# CONFIG_DRIVERS_I2C_SX9310 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
+CONFIG_DRIVERS_I2C_W83795=y
+# CONFIG_PLATFORM_USES_FSP1_0 is not set
+# CONFIG_PLATFORM_USES_FSP2_0 is not set
+# CONFIG_PLATFORM_USES_FSP2_1 is not set
+# CONFIG_INTEL_DDI is not set
+# CONFIG_INTEL_EDID is not set
+# CONFIG_INTEL_INT15 is not set
+# CONFIG_INTEL_GMA_ACPI is not set
+# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
+# CONFIG_INTEL_GMA_SWSMISCI is not set
+# CONFIG_DRIVER_INTEL_I210 is not set
+# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
+# CONFIG_HAVE_INTEL_PTT is not set
+# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
+# CONFIG_DRIVER_MAXIM_MAX77686 is not set
+# CONFIG_DRIVER_PARADE_PS8625 is not set
+# CONFIG_DRIVER_PARADE_PS8640 is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_LPC_TPM is not set
+# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
+CONFIG_VGA=y
+# CONFIG_DRIVERS_RICOH_RCE822 is not set
+# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
+# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
+# CONFIG_DRIVERS_SIL_3114 is not set
+# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
+# CONFIG_DRIVER_TI_TPS65090 is not set
+# CONFIG_DRIVERS_TI_TPS65913 is not set
+# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
+# CONFIG_DRIVERS_USB_ACPI is not set
+# CONFIG_COMMONLIB_STORAGE is not set
+
+#
+# Security
+#
+
+#
+# Verified Boot (vboot)
+#
+
+#
+# Trusted Platform Module
+#
+CONFIG_USER_NO_TPM=y
+
+#
+# Memory initialization
+#
+# CONFIG_STM is not set
+# CONFIG_ACPI_SATA_GENERATOR is not set
+# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
+# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
+# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
+# CONFIG_RTC is not set
+
+#
+# Console
+#
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
+# CONFIG_HWBASE_DEBUG_CB is not set
+CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
+CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
+CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
+# CONFIG_NO_MONOTONIC_TIMER is not set
+CONFIG_HAVE_MONOTONIC_TIMER=y
+# CONFIG_TIMER_QUEUE is not set
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_PCI_IO_CFG_EXT=y
+CONFIG_IOAPIC=y
+# CONFIG_USE_WATCHDOG_ON_BOOT is not set
+# CONFIG_GFXUMA is not set
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+# CONFIG_COMMON_FADT is not set
+# CONFIG_ACPI_NHLT is not set
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# CONFIG_PAYLOAD_ELF is not set
+# CONFIG_PAYLOAD_BAYOU is not set
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_LINUXBOOT is not set
+# CONFIG_PAYLOAD_SEABIOS is not set
+# CONFIG_PAYLOAD_UBOOT is not set
+# CONFIG_PAYLOAD_YABITS is not set
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+CONFIG_PAYLOAD_OPTIONS=""
+# CONFIG_PXE is not set
+# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
+CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
+
+#
+# Secondary Payloads
+#
+# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
+# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
+# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
+# CONFIG_TINT_SECONDARY_PAYLOAD is not set
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+CONFIG_HAVE_DEBUG_CAR=y
+# CONFIG_DEBUG_CAR is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_TRACE is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_HAVE_EM100_SUPPORT is not set
+CONFIG_ENABLE_APIC_EXT_ID=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
+# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
+# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
+# CONFIG_REG_SCRIPT is not set
+# CONFIG_NO_XIP_EARLY_STAGES is not set
+# CONFIG_EARLY_CBMEM_LIST is not set
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_NO_STAGE_CACHE=y
+CONFIG_BOOTBLOCK_CUSTOM=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y