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Author SHA1 Message Date
Leah Rowe e1df640578 uboot: delete blobs, based on blobs.list file
and with that, censored-libreboot is now complete, ready
for a first release :)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-10 01:52:45 +01:00
Leah Rowe 9202ffa85a uboot: add blobs.list file under resources/
(i'll actually add deblobbing logic in the next revision)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-10 01:44:09 +01:00
Leah Rowe b5afcdaa04 rename project to censored-libreboot
it was called c-libreboot

make it clear what c means

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-10 00:54:03 +01:00
Leah Rowe fb30ec87ed coreboot/default: update blobs.list
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-10 00:53:24 +01:00
Leah Rowe d3d0288bd0 coreboot/cros: update blobs.list
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-10 00:46:27 +01:00
Leah Rowe f6a3190a4e coreboot/fam15h: update kfsn4-dre configs
i overlooked these in the previous revision

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 22:36:32 +01:00
Leah Rowe 3f8a243d84 coreboot/fam15h: update configs for 4.11_branch
The configs were made for 4.11, and several new changes
were required for 4.11_branch. Without these changes, the
builds are not automated because coreboot's build system
asks for user input on certain configuration.

This patch makes everything smooth as silk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 22:27:49 +01:00
Leah Rowe cb4a1ec4d1 coreboot/fam15h: use 4.11_branch (fixes build)
This fixes build errors on KGPE-D16.

I can now build them on the latest Debian Sid,
as of 9 July 2023.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 22:01:06 +01:00
Leah Rowe 1ab8514882 coreboot/fam15h: fix acpica build on newer hostcc
Changes made to acpica/iasl in crossgcc, for
coreboot trees fam15h_udimm and fam15h_rdimm:

remove superfluous YYSTYPE declaration

make LuxBuffer variables static, to avoid warnings
treated as errors about multiple definitions

AcpiGbl_DbOpt_NoRegionSupport - remove this definition
in source/tools/acpiexec/aemain.c because it's already
re-defined by acpiexec. otherwise the linker complains
about multiple definitions

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 19:42:42 +01:00
Leah Rowe b55cc19f41 coreboot: AMD Fam10/15: don't build GCC-GNAT
do this with board.cfg option:

crossgcc_ada="n"

add this environmental variable when building
crossgcc, if crossgcc_ada="n":

BUILD_LANGUAGES=c

This avoids building the GNAT/Ada compiler in GCC.
Coreboot 4.11 is only used for some AGESA boards
that don't need Ada (their video init is the old
style, written in C, it's not libgfxinit)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 11:20:56 +01:00
Leah Rowe b7d22a9c36 coreboot/fam15h: patch binutils 2.32 for new gcc
tested on debian sid, as of 9 july 2023

implicit string declaration

easy stuff. now binutils 2.32 compiles. coreboot 4.11
uses this older binutils version.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 04:57:36 +01:00
Leah Rowe 41757a3b25 coreboot/fam15h: support distclean on cbfstool
lbmk uses distclean on cbfstool, which newer cbfstool
supports, but this old version (in coreboot 4.11) does
not. fix that.

it just runs make-clean

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 04:16:11 +01:00
Leah Rowe 77d9d94997 grub: flip the bootsplash background 180 degrees
c-libreboot, and GNU Boot, is a 180 U-turn versus
current libreboot policy, as seen here:

https://libreboot.org/news/policy.html

Therefore, rotate the bootsplash pic 180 degrees, for
comical effect.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 03:39:27 +01:00
Leah Rowe 947eb446f9 coreboot/fam15h: re-add kgpe-d16 and kcma-d8
also kfsn4-dre

this is still based on the old coreboot 4.11 version.

i have on todo to adapt dasharo coreboot for use in the master
branch of lbmk, for mainline libreboot releases.

since i'm doing c-libreboot for the GNU project, namely GNU Boot,
and since GNU Boot has dre/d8/d16 in their tree, re-add it here
for them.

i literally just copied this from them, who in turn copied it from
libreboot in an older revision anyway.

but there is one fix:

src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse.c

^ this blob wasn't being deleted by gnuboot, nor by libreboot
in the older revision that it forked from. an oversight. i decided
to audit the deblobbing and found this one was overlooked, out of
about 900 files picked up by deblob-check.

so this re-addition of dre/d8/d16 support is actually even better
deblobbed than gnuboot, or old-libreboot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-09 03:18:43 +01:00
Leah Rowe 0f09c0d72b download/coreboot: re-add book-burning support
see:

https://en.wikipedia.org/wiki/Book_burning

i'll actually update blobs.list for each coreboot rev
in a subsequent commit. this logic was taken from an
old libreboot revision, which uses different coreboot
revisions. as i write this, i'm running deblob-check
from linux-libre deblob scripts.

my process is: i just check each file and decide whether
it's a blob, or like, test data. in some cases it flags
other false positives, like... a C source file that has
a bunch of magic numbers in it for things (not a blob)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-08 23:45:57 +01:00
Leah Rowe 2bbb4c839a remove blobutil and boards/utils needing/for blobs
delete all blobs. TODO: actually deblob coreboot/uboot
when downloading. i'll that in a little while, in an
upcoming commit.

yes.

purge it all, in fsf style. censor what the fsf doesn't like.

so that they can feel good about having less, because
ideological purity is better than helping more people
use coreboot, yes?

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-08 22:09:58 +01:00
Leah Rowe 6bc619db90 rename project to c-libreboot (c = censored)
because that's what fsdg policy is: censorship

fsf will censor any existence of less-than-pure hardware
from coreboot, despite the fact that coreboot provides
more freedom for the user than fully proprietary firmware,
even in cases where blobs are needed. i criticise that here:

https://libreboot.org/news/policy.html

FSF's fork of libreboot, formerly libreboot.at and now
named GNU Boot*, is still based on old lbmk from october
2022, they haven't written *any* code since December 2022
when they supposedly first started working on the fork

i'm doing a gnuboot for them, purely for fun, called
c-libreboot. c-libreboot is essentially the same as old
libreboot, prior to the osboot merge, but i'm including
all the new things such as dell latitude e6400 or gru
chromebooks, all of which are suitable under the old
libreboot policy and, by extension, GNU Boot policy

*URL: https://savannah.gnu.org/projects/gnuboot/
(it actually is a GNU project, though the FSF has
not yet announced it officially, as I write this)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-08 21:00:05 +01:00
Leah Rowe cc30a1c6fa coreboot: never add microcode update to ROM image
this way, default psdg libreboot roms that enable microcode
can be used in fsdg libreboot, unmodified.

these configs enable microcode, but this change to the
coreboot build system avoids adding them regardless of
configuration

this saves hours of work that would otherwise be required,
to reconfigure all of the coreboot images, and will allow
gnuboot to use the same configs as libreboot

fsf makes such a fuss over this, when it's really quite
simple.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-08 20:47:40 +01:00
Leah Rowe f34e07ae27 build/boot/roms: fix coreboot-version in releases
This error was observed, in the coreboot build system:

In file included from src/lib/version.c:4:
build/build.h:10:32: error: 'libreboot' undeclared here (not in a function)
   10 | #define COREBOOT_MAJOR_VERSION libreboot-20230625
      |                                ^~~~~~~~~
src/lib/version.c:35:46: note: in expansion of macro 'COREBOOT_MAJOR_VERSION'
   35 | const unsigned int coreboot_major_revision = COREBOOT_MAJOR_VERSION;
      |                                              ^~~~~~~~~~~~~~~~~~~~~~

This happened on the 20230625 *release archive*, when a user tried to
build for W541 MRC on an Arch Linux container.

This change fixes the error. I never got the error on my end when
build testing the release archives, but this will prevent the error.
Fix it by only inserting libreboot version string YYYYMMDD representing
the Libreboot version. (libreboot uses ISO dates as version numbers)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-07-08 00:27:53 +01:00
Leah Rowe 68d4710785 update .gitignore
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-25 14:17:29 +01:00
Leah Rowe 4efa545a46 build/release/src: clean spkmodem/e6400 utils
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-25 13:33:20 +01:00
Leah Rowe 2e85a63a0a build/roms_helper: reset d521fca7, backport fixes
I keep getting random linker issues when running:

./build boot roms all

I think the issue lies somewhere in here, from when
I did that massive audit. So I'm undoing the audit
which mostly re-factored the code style here.

These changes are being backported:
f338697b build/boot/roms: Support removing microcode
941fbcb run coreboot utils from own directory
f256ce98 build/boot/roms: say board name on stderr

I removed this change:
6d6bd5ee (the script now uses dedicated utils directory)

additionally:

cbutils is built much earlier on in the script, first
thing after initialising variables

the other changes not backported are all code style
changes, and I believe these are responsible.

if no other fixes occur to this fire before the next
libreboot release, then my hunch was right.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-25 12:21:48 +01:00
Leah Rowe 46e6a40c10 Revert "Revert "Add 4MB version of HP 8200 SFF""
This reverts commit 2099545078.

Wasn't this config's fault, the problem happens elsewhere too.

I'm going to revert build/boot/roms to an older version and backport
a few recent changes, to see if that fixes the problem. If it does,
then I know that the recent linker issues happen due to recent changes
in build/boot/roms

The linker errors typically appear in util/kconfig/ but can happen
elsewhere, seemingly random, which means I'm not handling distclean
properly. Something isn't getting cleaned properly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-25 11:44:22 +01:00
Leah Rowe f256ce9870 build/boot/roms: say board name on stderr
That way, I can more easily debug build issues with
specific boards, e.g.

./build boot roms all 2>lbmk.err.log

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-25 03:06:13 +01:00
Leah Rowe 2099545078 Revert "Add 4MB version of HP 8200 SFF"
This reverts commit 0f7a5386b9.

Random linker errors, must investigate after release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-25 03:02:07 +01:00
Leah Rowe 1deb5843eb build/roms: distclean coreboot before each build
don't clean it, distclean it

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-24 23:28:41 +01:00
Leah Rowe 941fbcbf1b run coreboot utils from own directory
this means coreboot can now be distcleaned safely,
before and after each build of a rom image

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-24 23:23:16 +01:00
Leah Rowe 4a49ea3599 build/cbutils: distclean before building
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-24 22:54:53 +01:00
Leah Rowe 55fc8fe0b0 build/cbutils: exit if utils dir doesn't exist
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-24 22:50:09 +01:00
Leah Rowe dd16a575e7 build/cbutils: tab indentation, not spaces
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-24 22:33:29 +01:00
Leah Rowe 494c4d8dfe build/cbutils: rename variable for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-24 22:32:53 +01:00
Leah Rowe 668a3ef450 blobs/sources: rename t440p to t440plibremrc
this fixes blobutil not downloading me.bin for
the target, which was renamed to t440plibremrc

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-24 22:28:52 +01:00
Leah Rowe da6d039666 Merge pull request 'losslessly compress pngs' (#85) from Riku_V/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/85
2023-06-22 15:33:09 +00:00
Riku Viitanen e7bfeb687b losslessly compress pngs
zopflipng is great!

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2023-06-22 18:24:18 +03:00
Leah Rowe 067be2baa1 Merge pull request 'u-boot: Increase EFI variable buffer size' (#83) from alpernebbi/lbmk:uboot-efivar-size into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/83
2023-06-22 14:26:27 +00:00
Leah Rowe 559e8de5de Merge pull request 'cros: Disable coreboot related BL31 features' (#84) from alpernebbi/lbmk:cros-disable-bl31-coreboot-makearg into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/84
2023-06-22 14:08:08 +00:00
Alper Nebi Yasak dd3a190436 cros: Disable coreboot related BL31 features
I don't know why, but removing this BL31 make argument lets gru-kevin
power off properly when shut down from Linux. Needs investigation.
Do it as a cros-only HACK patch so people don't have to hold the power
button after every shutdown.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2023-06-22 16:49:29 +03:00
Alper Nebi Yasak f0236acbc6 u-boot: Increase EFI variable buffer size
Debian's signed shim allocates too many EFI variables to fit in the EFI
variable memory buffer. Normally it would then try to continue booting
in non-secure-boot mode, but its error handling throws a synchronous
abort that reboots the board, making it impossible to boot into Debian
unless one manually loads GRUB instead of shim. Increase EFI variable
buffer size to avoid triggering the bug.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2023-06-22 16:17:40 +03:00
Leah Rowe a01d05a261 re-add gigabyte/ga-g41m-es2l
turns out it's just picky ram.

errant reports of "no boot" (users did not have debug
dongles) were likely "bad" ram

notes will be written on libreboot.org about this

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 21:09:16 +01:00
Leah Rowe 0fb7eab591 nuke boards: delete nyan* (for now)
not well-tested, and existing testing has revealed video
issues on some of them (or just no boot)

for now, retain only qemu and gru-* on arm

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 02:33:36 +01:00
Leah Rowe 1762d114d3 build/boot/roms_helper nicer indent on switch loop
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 02:06:51 +01:00
Leah Rowe 97c9f06c91 blobs/download: exit if no board configs found
fixes ./build boot roms all

in detect_firmware(), "set" is used to get values from
configs, to know if things like ME/MRC are needed

on some "board" configs under resources/coreboot/, no
actual coreboot configs are provided, because they are
used as a reference (coreboot revision, tree name etc)
for actual boards, with actual coreboot configs

when attempting to build for such a board, running "set"
on such non-existent files would cause a non-zero exit,
when we want zero. the non-zero exit then caused the
build/boot/roms command to fail, when running "all" if
it found, for example, resources/coreboot/cros/ which
has the above problem, in this context

work around it by verifying that coreboot configs exist
for the given target name, in the blobutil download script.
if no such configs exist, then exit zero (success)

doing so is correct, because the script is intended to
do just that, erroring only if it is detected that blobs
are needed for a given board, but other errors occur; if
no coreboot configs exist, then no roms will be built and,
therefore, no blobs are needed

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 01:53:12 +01:00
Leah Rowe 652f3ba379 build/boot/roms: remove wrong parentheses
will pass all args as a single arg, which is wrong

fix that

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 01:15:28 +01:00
Leah Rowe 794def924c build/boot/roms: nicer indent style on switch loop
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 01:09:11 +01:00
Leah Rowe 9510d749e1 lbmk: run ./.gitcheck clean on error
a glaring oversight on my part

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 01:07:06 +01:00
Leah Rowe 917f699cc7 lbmk: exit 1 if script failed
script is -e anyway, so this is redundant, but best
put it here anyway. it can only help. correct behaviour
is always to fail on error, except in certain cases that
would be handled on a case-by-case basis in each script
2023-06-20 01:04:11 +01:00
Leah Rowe a08b6ac8e2 build/boot/roms: only set firstoption if argc>0
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 00:56:44 +01:00
Leah Rowe 347f0899b7 update release files
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-20 00:51:41 +01:00
Leah Rowe 051f928fd2 Merge pull request 'Cache downloads based on checksum' (#81) from Riku_V/lbmk:dl_cache into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/81
2023-06-19 22:17:19 +00:00
Leah Rowe 938fc44637 board/t440p_12mb: rename to t440plibremrc_12mb
t440pmrc_12mb is the blob one.

t440p_12mb is the libre one, but this isn't clear.

rename accordingly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-19 11:17:19 +01:00
Leah Rowe f338697b96 build/boot/roms: Support removing microcode
From now on, the following rules are available for all
mainboards, in resources/coreboot/boardname/board.cfg:

* blobs_required="n" or "y"
* microcode_required="n" or "y"

The blobs setting, if set to "n", simply renames filename.rom to
filename_noblobs.rom.

The microcode setting, if set to "n", copies the ROM (with or
without _noblobs) to filename_nomicrocode.rom (if blobs="n",
it would be filename_noblobs_nomicrocode.rom).

Where "nomicrocode" is set, ROMs with microcode will still be
provided by lbmk and in relesase, but ROMs will also be provided
alongside it that lacks any microcode updates.

If the *original* ROM already lacks microcode updates, then the
original ROM will be *renamed* to include "nomicrocode" in the name.
This is done on images for ARM platforms, for instance, where
microcode is never used whatsoever.

Example filenames now generated:
seabios_e6400_4mb_libgfxinit_corebootfb_noblobs_nomicrocode.rom
seabios_e6400_4mb_libgfxinit_corebootfb_noblobs.rom
seabios_withgrub_hp8300usdt_16mb_libgfxinit_corebootfb_colemak_nomicrocode.rom
seabios_withgrub_hp8300usdt_16mb_libgfxinit_corebootfb_colemak.rom
uboot_payload_gru_kevin_libgfxinit_corebootfb_noblobs_nomicrocode.rom

A vocal minority of people were not happy with some of the changes
made in Libreboot last year, including on existing supported
hardware from before those changes were made. I did this before the
last release, out of respect:
https://libreboot.org/news/gm45microcode.html
(re-add mitigations for no-microcode setup on GM45)

This new change is done as an further, extended courtesy. Tested
and works fine. (testing using cbfstool-print)

Actual Libreboot policy about binary blobs is nuanced. See:
https://libreboot.org/news/policy.html (reduction policy) and:
https://libreboot.org/freedom-status.html (implementation)

Well, the status page talks about descriptor vs non-descriptor
on Intel platforms, and where me_cleaner is used (on platforms
that need Intel ME firmware), it regards the descriptored setups
to be blob-free if coreboot does not require binary blobs.

In this paradigm, microcode updates are not considered to be
binary blobs, because they aren't technically software, they're
more like config files that just turn certain features on or off
within the CPU.

However, for lbmk purposes, "noblobs" means that, after the ROM
is fully ready to flash on the chip, there will be no blobs in
it (except microcode). So for example, an X200 that does not
require ME firmware is considered blob-free under this paradigm,
even though Libreboot policy regards X230 as equally libre when
me_cleaner is used; in this setup, ROMs will not contain "blobfree"
in the filename, for X230 (as one example).

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-19 10:44:02 +01:00
Riku Viitanen 0f4f32cfc2 Cache downloads based on checksum
Since many boards use the same ME firmware, we could save
everyone's bandwidth and time by caching the update files.

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2023-06-17 18:15:55 +03:00
Leah Rowe 25474414cf Merge pull request 'Add HP 8300 USDT' (#80) from Riku_V/lbmk:hp8300usdt into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/80
2023-06-17 12:31:51 +00:00
Riku Viitanen bca23902f5 Add HP 8300 USDT
Still on Gerrit. ME downloader failed with HP update file, so let's just
use Lenovo's instead. Both contain identical ME8_5M_Production.bin files.

Tested and working:
* Native raminit with both DIMMs
* Libgfxinit textmode and framebuffer on both DisplayPorts and VGA
* External USB2 and USB3 ports: they all work
* USB 3.0 SuperSpeed (rear, 4 ports)
* Ethernet
* Mini-PCIe WLAN
* SATA: 2.5" SSD and optical drive bay
* SeaBIOS and GRUB (boot to linux)
* PS/2 keyboard and mouse
* S3 suspend and resume, wake using USB keyboard
* Headphone output, line out, internal speaker
* Wake on LAN
* Rebooting
* CMOS options & nvramcui

Untested:
* Line in, mic input
* MXM graphics card
* EHCI debug

Not working:
* Mini-PCIe USB: I couldn't get it working on vendor BIOS either, so
  maybe it just isn't present
* PS/2 keyboard wake from S3
* mSATA (I have no mSATA drives)
2023-06-17 10:01:24 +00:00
Leah Rowe 4f5c0b4a6b Merge pull request 'Add HP Elitebook 2570p' (#79) from Riku_V/lbmk:hp2570p into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/79
2023-06-16 20:16:10 +00:00
Riku Viitanen 08f5cb11b4 Add HP Elitebook 2570p
Tested with Johan Ehnberg (johan@molnix.com)

The following is tested and confirmed working:
- backlight control
- touchpad
- USB (external, smart card, fingerprint, bluetooth, webcam, WWAN)
- touchpad
- Wi-Fi
- 2,5" SATA
- USB 3.0
- SD card
- Memory: 2+2 (matched or unmatched), 8+2, 8+8
- internal flashing from libreboot
- SeaBIOS and GRUB payloads
- Boots Devuan and Ubuntu

Untested:
- ExpressCard
- DVD
- dock
- external displays
- eSATA
- trackpoint (not present on this aftermarket keyboard)
2023-06-16 22:08:29 +03:00
Leah Rowe c285dbd372 util/nvmutil: reduced indentation inside loop
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-14 10:56:11 +01:00
Leah Rowe b508245451 util/spkmodem-recv: rename function for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-14 08:43:54 +01:00
Leah Rowe 17cd0af9c1 util/spkmodem-recv: remove unnecessary error check
the loop in main() already checks EOF, and errno is
properly handled at the end of main()

we only need to call ferror(), to check error state

this fixes a bogus error message when pressing ctrl+D
to terminate the program, *which is the intended way
to terminate this program* (that, or EOF is reached
in any other another way)

do not treat intended behaviour as an error condition!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-13 22:52:12 +01:00
Leah Rowe a1758a7ab0 util/spkmodem-recv: say cc, not gcc, in comment
i've build-tested this code with clang and that also
works. in practise, a user is going to have clang or gcc

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-13 22:35:34 +01:00
Leah Rowe 2b5727310c util/spkmodem-recv: fix bad comment
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-13 22:34:31 +01:00
Leah Rowe bd8b8919f9 util/spkmodem-recv: remove unnecessary assignment
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-13 22:29:34 +01:00
Leah Rowe 5be3d67ced util/spkmodem-recv: simplify getopt handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-13 21:01:15 +01:00
Leah Rowe 5c5c1c64fd util/spkmodem-recv: cleaner ring buffer handling
make it more obvious that this *is* a ring buffer being
handled, and make it more obvious when checking a pulse
in the next frame

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-13 20:47:17 +01:00
Leah Rowe f257eb6f9d remove errant file
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-13 12:11:56 +01:00
Leah Rowe 2e38ddaa9b Revert "Remove most of Ferass's lbmk contributions"
This reverts commit a4ea286731.

The licensing audit has been abandoned. I will not be re-licensing
in bulk to MIT.

I can still use MIT license on new works, e.g. utilities, but there's
really no pressing need to re-license lbmk. It's just shell scripts,
and most of what it interacts with (coreboot, grub, seabios) is GPL
anyway.

So who cares?

Ferass's patch was removed due to refusal to re-license, but the
decision to re-license has been canceled.

I'm now aiming for a quick stable release.
2023-06-13 12:09:01 +01:00
Leah Rowe 81bf2293df Merge pull request 'resources/coreboot/default/patches: Add patch for E6400 SD card' (#78) from nic3-14159/lbmk:e6400-sd-card-patch into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/78
2023-06-13 01:09:03 +00:00
Nicholas Chin 4ecd289fa1 resources/coreboot/default/patches: Add patch for E6400 SD card
This fixes the PCI interrupt routing tables for the E6400 so that the SD
card works. It is already merged in upstream but libreboot has not yet
updated coreboot.
2023-06-12 18:50:47 -06:00
Leah Rowe d617135d38 Merge pull request 'lbmk: Fix regressions' (#77) from nic3-14159/lbmk:fix-lbmk into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/77
2023-06-12 23:39:38 +00:00
Nicholas Chin 0fade1b64c lbmk: Fix regressions
- A spurious semicolon caused the arguments to printf in die() to be
  executed instead of printed
- ${@} in die() needs to be in quotes or else printf prints each word on
  a separate line
- The number of arguments to main() does not include main itself so it
  should be comparing against 1 instead of 2 to determine if enough
  arguments were supplied.
2023-06-12 17:27:49 -06:00
Leah Rowe b52a7f4f86 util/spkmodem-recv: re-add full license header
i forked spkmodem-recv from coreboot, who forked it from
gnu grub. gnu grub's version has the full header, with
copyright declared as belonging to the fsf

coreboot made changes after forking it, and later replaced
the license declaration with an equivalent SPDX header, but
they also removed the FSF's copyright declaration, which by
itself does not void the declaration

anyway, i just feel better re-adding the full declaration.
make it so!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-12 23:37:58 +01:00
Leah Rowe 7ca9b98766 util/ich9gen: change default mac address
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-12 23:02:30 +01:00
Leah Rowe e75dafa475 Merge pull request 'Add 4MB version of HP 8200 SFF' (#72) from Riku_V/lbmk:hp8200sff_4mb into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/72
2023-06-10 11:26:07 +00:00
Leah Rowe e6d4aeb272 Merge pull request 'Update Git revision for bios_extract' (#74) from nic3-14159/lbmk:update_bios_extract into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/74
2023-06-10 11:09:24 +00:00
Nicholas Chin d059fefec5 Update Git revision for bios_extract
My patches are now merged in upstream so
just use that and drop the patch files.
2023-06-09 22:48:04 -06:00
Leah Rowe dee8f44b37 util/spkmodem-recv: fix regression
The last bit wasn't being handled, *and* ascii_bit
wasn't being reduced at all.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-08 12:35:36 +01:00
Leah Rowe f2822db9dd util/spkmodem-recv: make ringpos a global variable
there's no point passing it as argument to a
function. it's used across more than one function,
so make it global

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 15:38:36 +01:00
Leah Rowe 334bfedfd4 util/spkmodem-recv: simplify sample_cnt/char reset
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 02:05:36 +01:00
Leah Rowe 4a6b582777 util/spkmodem-recv: print stats in other function
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 01:57:20 +01:00
Leah Rowe 2652a1ddfa util/spkmodem-recv: only print unhandled err on -d
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 01:53:24 +01:00
Leah Rowe 3fb99a017d util/spkmodem-recv: make debug a runtime option
it's currently a build-time option

make it a runtime option instead, so that every
user can optionally make use of it, on all builds

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 01:37:06 +01:00
Leah Rowe 264a31b95d util/spkmodem-recv: always disable line buffering
thus, there's no need to handle flushing of stdout
whatsoever, and the code can be greatly simplified

ascii bits are still reset, when no input on stdin
is given

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 01:05:38 +01:00
Leah Rowe 118bb19ff8 util/spkmodem-recv: simplify stdout flush logic
when spkmodem-recv doesn't receive anything (via stdout)
after a few frames, it's assumed that the console is dead
and the buffered output is flushed

this logic is assumed superfluous when -u is set

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 00:46:41 +01:00
Leah Rowe af36cc7f93 util/spkmodem-recv: rename variables for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-05 00:34:44 +01:00
Leah Rowe f7fccb5963 util/spkmodem-recv: split print_char() up
the logic for *setting* a character, and the logic
for outputting it, ought to be separate. do that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 17:16:26 +01:00
Leah Rowe b40a30b11b util/spkmodem-recv: reduce indent in print_char()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 17:05:24 +01:00
Leah Rowe b21c1dd5e8 util/spkmodem-recv: squash a few code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 16:30:03 +01:00
Leah Rowe 3401f287b4 util/spkmodem-recv: bsd-style indent
my style was: 2 tabs. bsd-style, for extending a line, is
4 spaces. this style has grown on me, so let's do it here

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:42:01 +01:00
Leah Rowe 2a6ad97150 util/spkmodem-recv: order prototypes per function
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:38:03 +01:00
Leah Rowe 212ce3a8ac util/spkmodem-recv: warn on unhandled exit error
my style of C programming is this: always return errno
upon exit from the program, or from a thread.

handle errno in the calling/forking function.

returning errno at the end of main has this intention:
if an unhandled error occured, the program exits with
non-zero status.

a correctly written program should *never* return non-zero
at the end of main, and if it does, this indicates a bug
in the code (per my code style / philosophy).

so, warn the user with a message if this occurs. the
intention is that this message should never be printed.

do not use assert() for this. i don't believe in that.
such a test should always be present, for everyone.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:33:23 +01:00
Leah Rowe 9a6d290871 util/spkmodem-recv: another minor code cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:31:23 +01:00
Leah Rowe a61ab37b67 util/spkmodem-recv: always set errno on err()
This version of spkmodem uses err() to indicate an error,
and the value of errno is used as exit status at all times,
even when it is zero.

When calling err(), it is intended that errno always be
non-zero, so modify the code accordingly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:27:29 +01:00
Leah Rowe e8889fd107 util/spkmodem-recv: minor code cleanup
also be more thorough about errno value when calling
pledge. rename variable in a for loop for clarity.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:23:51 +01:00
Leah Rowe 3c2a287eea util/spkmodem-recv: handle sample errors correctly
when calling fread(), errno may be set to EOVEFLOW if
the range being read will cause an integer overflow

if end-of-file is reached, errno may not be set. when
calling this function, you must check errno or check
feof() - ferror() should also be checked, so this check
is added immediately afterwards in the code

ferror() does not set errno, so ERR() is used to set
errno to ECANCELED as program exit status

further separate reading of frames into a new function

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:19:53 +01:00
Leah Rowe 979db74ca5 util/spkmodem-recv: simplify pulse check
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-04 15:10:35 +01:00
Leah Rowe 94aa43d857 util/nvmutil: call unveil earlier, and harden
The mentality behind pledge and unveil is that you should
think ahead, so that large parts of code can run under
extremely tight restrictions.

The pledge calls have been adjusted accordingly, also.
Disallow all unveil calls after the gbe file and the
file /dev/urandom have been unveiled.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-03 21:03:21 +01:00
Leah Rowe db63fcffb5 util/nvmutil: hardening: reduce pledges earlier
also remove wpath if using the dump command

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-03 19:44:14 +01:00
Leah Rowe dbd6defe9a util/nvmutil: fix faulty arg check
in practise, no other condition would be met and the
program still worked. this is a pre-emptive fix.
2023-06-03 15:08:29 +01:00
Leah Rowe 270693fc92 util/nvmutil: cleanup: move logic out of main()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-03 13:44:04 +01:00
Leah Rowe 46a9eea0f6 util/nvmutil: major cleanup. simpler arg handling.
Also hardened the pledges.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-03 13:36:10 +01:00
Leah Rowe c9fdfce34e util/nvmutil: simplify writeGbeFile()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-02 11:52:49 +01:00
Leah Rowe bdccd7cb0c util/nvmutil: don't call writeGbeFile if O_RDONLY
This replaces a check in the function for O_RDONLY, and
fixes the bug where the "dump" command triggers such error.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 14:07:20 +01:00
Leah Rowe 99258a38ae util/nvmutil: code cleanup (pledge/unveil calls)
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 14:04:44 +01:00
Leah Rowe 69fa333e25 util/nvmutil: harden pledge/unveil calls (OpenBSD)
*Open* files at the start, then unveil. The same overall
behaviour is observed. In the case that invalid arguments
are given, simply opening a file does not cause much
performance impact (if any).

Restrict operations as early as possible in code.

Bonus:

writeGbeFile also hardened; if flags is O_RDONLY, it aborts.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 13:35:34 +01:00
Leah Rowe adf3aece6f util/nvmutil: fix faulty fd check
i screwed up in an earlier commit

this change fixes a bug where on rhex(), each
call would re-open /dev/urandom, resetting rfd

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 12:58:33 +01:00
Leah Rowe b49da12dad util/nvmutil: only swap/copy if checksum is valid
in practise, the file was never written unless the checksum
was valid, but in the same of sloccount reduction i made it
do the swap/copy before checking. while functionally ok, it
never sat right with me. this is one example of where sloc
count doesn't mean everything. code correctness is critical

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 12:21:55 +01:00
Leah Rowe 9aa34f1e20 util/nvmutil: use bsd-style indentation
the style was already quite similar, but extended lines in
bsd are indented by 4 spaces instead of a tab. this style
has grown on me, so i'm adopting it here

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 12:18:48 +01:00
Leah Rowe 18f39ab6fa util/nvmutil: clean up rhex()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 12:02:16 +01:00
Leah Rowe 4d91bcc2d7 util/nvmutil: check correct return value on close()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 11:14:49 +01:00
Leah Rowe c2c31677a3 util/nvmutil: massive code cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 11:11:15 +01:00
Leah Rowe f0846134b7 util/nvmutil: move includes to nvmutil.h
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 08:48:39 +01:00
Leah Rowe 2dabafe691 util/nvmutil: move xpledge/xunveil to nvmutil.h
They don't precisely *pertain* to nvmutil, but they are
useful helper functions for calling pledge/unveil in
OpenBSD. Ideally, the main file should only contain core
logic pertaining to the execution of *nvmutil*.

Put xpledge() and xunveil() in nvmutil.h.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 08:40:01 +01:00
Leah Rowe 9a3e651656 util/nvmutil: use SPDX license headers
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 08:31:08 +01:00
Leah Rowe 5d6af06a73 util/nvmutil: move non-functions to nvmutil.h
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 08:25:55 +01:00
Leah Rowe a2136933af util/nvmutil: use even more macros (code cleanup)
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 08:21:25 +01:00
Leah Rowe 5a9fac2a63 util/nvmutil: remove unnecessary parentheses 2023-06-01 07:40:40 +01:00
Leah Rowe 6885200c8b util/nvmutil: simplify setWord() with word() macro
There is nothing cooler than a macro.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 07:31:52 +01:00
Leah Rowe 7ab209d545 util/nvmutil: do xor swap in a macro
eventually, everything will be a macro!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 07:23:38 +01:00
Leah Rowe 293ca0fcbb util/nvmutil pledge,unveil: use correct err string 2023-06-01 07:05:48 +01:00
Leah Rowe a1df8fd154 util/nvmutil: ensure that errno is set on err()
When err() is called, it is intended that nvmutil will
always exit with non-zero status, but with errno as the
return value. Ensure that errno is *not* zero.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 07:04:23 +01:00
Leah Rowe 1f54860401 util/nvmutil: minor code cleanup
Make word() a macro, simplify err_if().

Could also make setWord() a macro if I forego certain
optimisations, but I'll leave it as-is.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-06-01 06:58:30 +01:00
Leah Rowe 8f1e6d792f util/nvmutil: simplified error handling in main
This change also reduces code indentation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-31 09:30:13 +01:00
Leah Rowe 78fc89352b util/nvmutil: Use unveil, and harden pledges
After /dev/urandom (for MAC address randomisation) and
the GbE file have been handled, unveil them. Unveil is
a system call provided by OpenBSD that, when called,
restricts access only to the files and/or directories
specified, each given specific permissions.

You can learn more about unveil here:

https://man.openbsd.org/unveil.2

An ifdef rule makes nvmutil only use unveil on OpenBSD,
because it's not available anywhere else. This is the same
as with the pledge() system call.

Where invalid arguments are given, and no action performed,
pledge promises are also reduced to just stdio, preventing
any writes to files, or reads from files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-31 08:53:08 +01:00
Leah Rowe c2cd191676 util/nvmutil: Harden pledge promises
After reading a file, remove rpath.

When removing rpath, also remove wpath if flags
are not to O_RDONLY (read-only disk operation).

When wpath is permitted, and a file was successfully
written, remove wpath.

In order to permit /dev/urandom access in rhex(),
I call it as a void just before re-calling pledge.

The rhex() function has been written in such a way
that /dev/urandom only needs to be read *once*.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-31 08:02:46 +01:00
Leah Rowe c759a7a095 util/nvmutil: Simplify use of pledge (on OpenBSD)
Define xpledge which calls pledge and handles errors.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-31 06:32:43 +01:00
Leah Rowe f37bd75925 util/nvmutil: Use correct pledge promise (OpenBSD)
I assumed wpath was all that's needed, but this simply
allows writes.

rpath must be specified alongside wpath, for reads.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-30 16:16:24 +01:00
Leah Rowe 83ecf26833 util/*: Properly detect OpenBSD for pledge() call
The utils that are pledged checked HAVE_PLEDGE which was
bogus. OpenBSD defines __OpenBSD__, which you can check
for in ifdef.

This change makes nvmutil and spkmodem-recv *actually*
use pledge, when the utils are compiled on OpenBSD.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-30 16:02:25 +01:00
Leah Rowe 8df2f8095e util/e6400-flash-unlock: clean up commented code
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-29 22:01:41 +01:00
Riku Viitanen 0f7a5386b9 Add 4MB version of HP 8200 SFF
This is useful for internally flashing Libreboot from OEM BIOS
since the top ~3MB is write-protected by vendor firmware.
2023-05-28 00:52:41 +03:00
Leah Rowe 06c92d4a4a blobutil: merge with main script
make blobutil a symlink. Example of command changes:

./blobutil download x220_8mb
is now:
./update blobs download x220_8mb

The old command still works, for compatibility.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-27 12:00:04 +01:00
Leah Rowe ff954c5b73 unify download/build scripts
move resources/scripts/download/ to:
resources/scripts/update/module/

This: ./download coreboot
Is now: ./update module coreboot

However, running "./download coreboot"
still works, via backwards compatibility.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-27 11:44:54 +01:00
Leah Rowe 092600d163 unify these scripts: build, modify and update
unify them, by turning them into symlinks pointing
to a generic script named lbmk

the script named lbmk is a fork of the script
named "build", which just checks argument 0 and adapts
accordingly

all of these core scripts had the exact same overall
logic, and they are thus compatible

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-27 10:54:50 +01:00
Leah Rowe 6344b19600 build/payload/seabios: reduced indentation
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-27 09:43:05 +01:00
Leah Rowe a4ea286731 Remove most of Ferass's lbmk contributions
The primary purpose of my intense auditing has
been to improve lbmk's coding style and fix bugs
but there is a secondary purpose: know precisely
who owns what, because I want to re-license as
much as possible of lbmk under *MIT*, instead of
the current GNU licensing. MIT is vastly superior,
because it grants *actual* freedom to the user,
permits *sublicensing* and it is vastly more
compatible with other GPL combinations; for
example, MIT license is compatible with GPL2-only
whereas lbmk's current mix of GPLv3-or-later and
GPLv3-only is legally incompatible with GPLv2-only.

Re-licensing under MIT will most likely result in
more contributions to Libreboot's build system in
the future, especially as it will attract a lot
more commercial interest. Contrary to the popular
arguments, copyleft is a liability to the free
software movement and results in less code being
written; in practise, permissively licensed code
gets more public contributions, including from
commercial entities, even if companies can
theoretically make something proprietary out of
it (in practise, anyone inclined can just use the
upstream and proprietary forks almost always die).

Copyleft propaganda is fundamentally flawed. See:
<https://unixsheikh.com/articles/the-problems-with-the-gpl.html>

Anyway, I've been doing a combination of:

* Seeking permission from other copyright holders,
  for re-licensing
* Deleting, or moving, other contributions; for
  example, splitting certain contributions into
  separate files so that originally modified files
  become unencumbered. This latter solution is a
  result of *code cleanup* arising from the audit.

For Ferass's contributions, I opted to seek
*permission*, and permission was denied. In full compliance
with this legal imperative, I'm acting accordingly; this
commit removes all of Ferass's changes that converted lbmk
to posix shell scripts, thus removing his copyright on the
affected files, bypassing his authority entirely. Therefore,
lbmk is largely now bash-dependent. In practise, nobody is
going to use anything other than a GNU system to build
Libreboot, because many projects that Libreboot makes use
of rely heavily on GNU; for example, coreboot's build
system makes heavy use of GNU-specific extensions in *GNU
Make*, and likely contains many bashisms. Of course,
Libreboot also compiles GNU GRUB.

I would much rather have MIT-licensed Bash scripts
than GPL-licensed posix SCL scripts.

This reverts the changes from Ferass El Hafidi,
for the following commits, with some exceptions:

* 7f5dfebf7d
* f787044642

Exception:

download/mrc not reverted, because that was
already a fork of an existing script under
coreboot's build system, and their script was
GPLv2. i cannot/will not re-license this file
(ergo,
7f5dfebf7d
change remains intact, on this file)

resources/scripts/build/boot/roms_helper, these changes
have been kept:
* 7e6691e9 - Add ARMv7 and AArch64 support
* dec2d720 - add myself in the build/roms_helper script
	(added 2021 copyright for the change below)
* b7405656 - Workaround for grub's slow boot
^ these changes will be re-factored, splitting them
  out of the file into a new file. This will be done in
  a future lbmk revision. (in some cases, it makes sense
  to keep a change but split it, allowing the main file to
  be re-licensed without the change in it)

This is part of a much larger series of
licensing audits. It's likely that lbmk will
be posix-compliant (in its shell scripts)
again some day, because I'm planning to rewrite
most of these scripts (the ones modified in this
patch), and many of them (e.g. individual download
scripts) are subject to future deletion in a planned
overhaul of the download logic for third party
projects.

In addition: these changes are being kept (no attempt
to re-license them will be made):

* cff081c6 - Fix grub's slow boot (1 year, 5 months ago) <Vitali64>
* 4c851889 - Add macbook*1 16mb configs (1 year, 6 months ago) <Vitali64>

Ferass's work that remains will be split into dedicated
files containing them, where feasible.

In the case of grub.cfg (for GNU GRUB), I don't care
because it's a script for an engine (GRUB shell) that's
under GPL anyway, so who really cares about MIT license.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-27 08:10:50 +01:00
Leah Rowe 2be1a8ea76 download/coreboot: fix error handling in subshell
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-24 07:45:07 +01:00
Leah Rowe d0171eeff3 download/coreboot: don't needlessly re-download 2023-05-24 07:16:51 +01:00
Leah Rowe c616930b71 download/coreboot: remove unnecessary bloat
it is not necessary to have help output

similarly, listing all boards in this script is
pointless. why not just run ls -1 on the directory?
2023-05-21 03:24:29 +01:00
Leah Rowe d1935c0590 build/clean/u-boot: remove unnecesssary check
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 21:48:12 +01:00
Leah Rowe 676efbb0df build/clean/u-boot: improved coding style
tabs for indentation

simplify some checks
2023-05-20 21:47:10 +01:00
Leah Rowe 06a92f61a8 build/clean/ich9utils: don't use subshell
this also fixes error handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 21:38:54 +01:00
Leah Rowe 43e2dfe2bf build/u-boot: top-down, split-function code style
main() on top

top-down order of logic

logic split into separate functions

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 21:33:37 +01:00
Leah Rowe a8f0721a6f build/payload/u-boot: 79 chars or less per line
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 20:48:19 +01:00
Leah Rowe 89ac1ea5a9 build/payload/u-boot: fix wrong attributions
only alper and ferass have ownership of this file,
but ferass only submitted to it in 2022, not 2021

fix this

i've removed myself from the file, for now

i never touched this file before, so it's
not right that my name be here

put alper's name at the top, because alper
was the person who created this file first

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 20:32:40 +01:00
Leah Rowe c973b95909 build/payload/grub: rename functions for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 20:16:10 +01:00
Leah Rowe 51e0e40123 build/payload/grub: remove unnecessary check
sed does the same job as cp, in this situation

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 20:08:40 +01:00
Leah Rowe 8e206be7c8 build/payload/grub: split logic into functions
main() on top

top-down logic

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 20:07:22 +01:00
Leah Rowe db7e81612a build/payload/grub: 79 chars or less per line
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 19:55:40 +01:00
Leah Rowe 92bd18c45a build/release/roms: minor cleanup
split actual purging of blobs to a function

rename functions for clarity
2023-05-20 19:45:08 +01:00
Leah Rowe ec3d1006b3 build/release/roms: handle argument properly
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 19:40:31 +01:00
Leah Rowe e0b9766087 build/release/roms: remove superfluous comments
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 19:36:51 +01:00
Leah Rowe 681538a20c build/release/roms: handle errors inside subshell
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 19:35:36 +01:00
Leah Rowe a9bd54423c build/release/roms: split logic into functions
main() on top

top-down logic

79 chars or less, per line

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 19:33:29 +01:00
Leah Rowe 2983309006 build/release/roms: use tabs for indentation
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 19:15:50 +01:00
Leah Rowe fff5fa53ff build/release/src: 79 chars or less per code line
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 19:03:04 +01:00
Leah Rowe 1cdf1c7cf0 build/release/src: handle errors in subshells
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:59:59 +01:00
Leah Rowe 16f878e882 build/release/src: split logic into functions
main() on top

top-down logic

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:52:33 +01:00
Leah Rowe 4e2ee58ac5 build/ich9utils: simplify, fix error handling
errors weren't being handled inside a subshell

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:32:52 +01:00
Leah Rowe 93ec91e862 build/memtest86plus: use tabs for indentation
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:28:58 +01:00
Leah Rowe 4b80f250fb build/clean/crossgcc: better code style
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:28:17 +01:00
Leah Rowe 187d5fa418 build/descriptors: simplify and fix error handling
main() on top

some parts of the script weren't erroring properly

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:26:09 +01:00
Leah Rowe a05be16998 build/grub: fix inconsistent indentation
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:13:44 +01:00
Leah Rowe 02919c47ce build/grub: implement error handling
it uses a subshell, so errors weren't observed

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:10:41 +01:00
Leah Rowe 5bab3bbc33 build/grub: introduce main(), split it up
easier to read

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:06:15 +01:00
Leah Rowe 277e1df0af build/cbutils: remove unnecessary directory check
it will already fail if the coreboot download did.

if the coreboot download succeeds, the directory exists.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:01:02 +01:00
Leah Rowe ed9eb4624c build/cbutils: rename function for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 18:00:31 +01:00
Leah Rowe b12dced470 build/cbutil: avoid frivilous use of subshells
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 17:57:15 +01:00
Leah Rowe 355a45b435 build/cbutils: top-down coding style, main on top
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 17:53:03 +01:00
Leah Rowe 9f58d4e481 build/cbutils: 79 chars or less per line
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 16:13:02 +01:00
Leah Rowe 691f266441 build/cbutils: use tabs for indendation
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-20 16:12:25 +01:00
Leah Rowe 3cbcfce9d1 gitclone: add my copyright for recent changes
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 13:19:38 +01:00
Leah Rowe 01a2ab3756 use env in shell scripts
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 13:17:28 +01:00
Leah Rowe 1e8f2cc170 gitclone: only rm the old directory at the end
this way, it will only be deleted after the
new git clone and patching worked successfully

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 13:03:28 +01:00
Leah Rowe 3da8d20cd6 gitclone: stricter error handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 13:01:12 +01:00
Leah Rowe e804849486 gitclone: minor cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 12:56:42 +01:00
Leah Rowe fd2ca12e9e gitclone: split logic out of main()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 12:55:34 +01:00
Leah Rowe 08ad9eb15f download/coreboot: minor cleanup 2023-05-18 12:37:55 +01:00
Leah Rowe 8d9570b6f7 gitclone: cleaner coding style
main() on top

top-down logic

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 12:34:47 +01:00
Leah Rowe 4ac0bc8d3e blobutil/download: minor code cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 11:41:56 +01:00
Leah Rowe 9fb489ac3e modify: clean up duplicated code
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 11:24:08 +01:00
Leah Rowe f7f3aef17e modify: cleaner coding style
main() on top

top-down logic

reduced indentation

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 11:14:49 +01:00
Leah Rowe 34df727c98 build: cleaner coding style
main() on top

top-down logic

reduced indentation

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 10:49:47 +01:00
Leah Rowe 1a062bb628 build: reduce code to less than 80 chars per line
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 10:21:54 +01:00
Leah Rowe a212a5bec8 blobutil: exit 1 if a called script fails
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 10:11:32 +01:00
Leah Rowe e62215718c blobutil: cleaner coding style
reduced indentation

main() on top

top-down logic

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 10:09:57 +01:00
Leah Rowe c08e3258cb .gitcheck: exit 1 if unsupported argument given
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:55:40 +01:00
Leah Rowe c51225577b .gitcheck: use subshells where appropriate
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:49:26 +01:00
Leah Rowe dd8fb524df .gitcheck: re-add redirection to /dev/null
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:47:44 +01:00
Leah Rowe 82c4d7b280 .gitcheck clean: clean coreboot directories too
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:44:11 +01:00
Leah Rowe 0f3c3ca600 .gitcheck: reduce indentation level for loop
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:42:06 +01:00
Leah Rowe ecd7f1d11e .gitcheck: move logic out of main()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:41:00 +01:00
Leah Rowe 829bc02bf2 .gitcheck: *actually* check coreboot directories 2023-05-18 09:38:20 +01:00
Leah Rowe 52bc07bc84 .gitcheck: improved coding style
main() on top

top-down order of logic

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:35:26 +01:00
Leah Rowe 83235fb96b .gitcheck: check argv when running gitcheck-clean
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:25:25 +01:00
Leah Rowe 6ce77652c6 .gitcheck: actually *run* gitcheck-clean
Run() is called, but without argument.

This patch fixes that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:23:23 +01:00
Leah Rowe 8782bff8ef download: code cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:18:42 +01:00
Leah Rowe a232f9c575 download: check for non-existent script in loop
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:16:50 +01:00
Leah Rowe b4f1804e48 download script: bugfix: gitcheck clean didn't run
the "placeholder" git credentials were not being
wiped, which sometimes overwrites the user's git
credentials permanently, when working on lbmk

(permanently, until manually reset by the user)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:12:27 +01:00
Leah Rowe 62c88dfb6e download script: improved coding style
introduce main()

cleaned up the if/else block

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-18 09:11:59 +01:00
Leah Rowe 5b59490928 util/spkmodem_recv: Use pledge but only on OpenBSD
It will only be used on OpenBSD. Other operating
systems will behave in the same way.

Pledge is feature specific to OpenBSD that
restricts system operations, for security:

https://man.openbsd.org/pledge.2

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 25241ae222 util/spkmodem_recv: Add -u flag (no line buffer)
printf outputs to stdout, which is line buffered
by default.

Adding a -u option to disable buffering.

Exit when a non-support flag is given, but adhere
to current behaviour when no flag is given.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 01fdfa3ab6 util/spkmodem_recv: Tidy up global variables
They do not need to be initialised zero, because
global variables are always zero by default,
unless set differently by the programmer.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 50b35939de util/spkmodem_recv: Make pulse variable global
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 14190de9e8 util/spkmodem_recv: Use parentheses on comparisons
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe c0f2bf3077 util/spkmodem_recv: Move global variable: pulse
It is only used by a single function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 5d03598b99 util/spkmodem_recv: Purge unused global: amplitude
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 63e43819b3 util/spkmodem_recv: Remove unused variable: pos
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe a0abcb9f53 util/spkmodem_recv: Re-order functions for clarity
print_char() is referenced last, so declare it last.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 93cc664254 util/spkmodem_recv: Handle output in new function
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 27866e65fb util/spkmodem_recv: Re-order prototypes
Put them in the same order as declared.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 8b851258e2 util/spkmodem_recv: Rename functions for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 6c1bf756d3 util/spkmodem_recv: Return errno in main
This is a good general practise, to catch errors.

Any errors found can then be handled in code.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe c23806e1f6 util/spkmodem_recv: Use correct printf specifier
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 0cc23b2363 util/spkmodem_recv: Add error handling
There was literally no error handling before.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 179323819b util/spkmodem_recv: Move logic out of main
Main should only be a skeletal structure.

Actual logic should always be handled externally.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 3d55429443 util/spkmodem_recv: Rename variable for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 697ae5e2ca util/spkmodem_recv: Remove use of static keyword
It is entirely superfluous in this program.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 2c12e70cfe util/spkmodem_recv: Rename variable for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 5b6f5cb06b util/spkmodem_recv: Remove space in function calls
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe abc5cfd38c util/spkmodem_recv: Say frame in English
Source code should be written in English.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe e286470432 util/spkmodem_recv: Top-down logic (main on top)
Add the appropriate prototype.

Top-down function order is easier to read.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 3722c1e67a util/spkmodem_recv: simplified pulse check
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 88683b767b util/spkmodem_recv: Define argc/argv in main
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 83b34e2f48 util/spkmodem_recv: Reduced indentation in loop
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 22633e0dc0 util/spkmodem_recv: Use tabs for indentation
The GNU indentation style is hard to read.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 9152d0f939 util/spkmodem_recv: Add clean to the Makefile
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe 754410f2af util/spkmodem_recv: Define CC in the Makefile
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe f2887e9b45 util/spkmodem_recv: Add strict CFLAGS
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:11:35 +01:00
Leah Rowe b496ead7b3 util/spkmodem_recv: Import from coreboot
Imported from util/spkmodem_recv at coreboot
revision:

e70bc423f9a2e1d13827f2703efe1f9c72549f20

This is a client for spkmodem, to allow serial
console via PC speaker.

I've decided to import it in lbmk, because I
heavily modified it. The patches will be
applied next.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-05-16 23:09:42 +01:00
Leah Rowe 52d87f5f08 download/coreboot: minor code cleanup
i'm pretty much finished now

there might be a few more changes later,
like stricter error handling, more verbose
error messages, etc

right now, it relies on -e to kill lbmk
on error, and uses the exit command

another planned change it to support
other upstreams besides coreboot.org,
such as the dasharo codebase

the latter is *why* i refactored this
download script, for asus kgped-d16
2023-05-15 05:01:48 +01:00
Leah Rowe 7bd206b9e7 download/coreboot: remove errant code
the build_error file is obsolete
2023-05-15 04:53:14 +01:00
Leah Rowe bd82d90faf download/coreboot: tidy up variable names 2023-05-15 04:44:47 +01:00
Leah Rowe 66d06afd6c download/coreboot: run extra.sh from cbtree
to my knowledge, this feature has never been used,
but lbmk permits resources/coreboot/boardname/extra.sh
to execute, as provided by the maintainer, with working
directory set to: coreboot/boardname

this could be used to extend lbmk in a number of ways

for example, it could be used to patch 3rdparty/

it could also be used to break coreboot in creative
and novel ways. hint hint.
2023-05-15 04:17:50 +01:00
Leah Rowe c4b0825c5e download/coreboot: avoid variable conflict
the "board" variable in prepare_new_coreboot_tree()
is also declared in fetch_coreboot_trees

for the one in prepare_new_coreboot_tree, it's passed
as an argument to the function, so give it a new name

i learned that some shells have a global scope, when
using variables of the same name between functions
2023-05-15 04:14:50 +01:00
Leah Rowe 0e1e9c1773 download/coreboot: fix downloads without argument
this should download all trees:

	./download coreboot

without this patch, it doesn't

with this patch, it works

i overlooked this during earlier
refactoring. auditing revealed it.
2023-05-15 04:11:10 +01:00
Leah Rowe bea6735395 download/coreboot: much cleaner coding style
top-down order, and *still* rfc 3676 compliant

i finished simplifying the logic, and
i split everything into smaller functions

there is still more more polishing to do

final touches will be done in new revisions
2023-05-15 04:05:27 +01:00
Leah Rowe 2d69072a09 download/coreboot: clone upstream via ./gitclone
coreboot trees/patching is still handled
specifically by "./download coreboot"

command now available in lbmk:

./gitclone coreboot

this *only* creates the directory at:
coreboot/coreboot

this directory is never used in builds.
it is only used by download/coreboot to
create patched trees for each mainboard
2023-05-15 03:24:19 +01:00
Leah Rowe c17423e475 download/coreboot: simplify check 2023-05-15 02:51:15 +01:00
Leah Rowe 00cafd7022 download/coreboot: fix misnamed function 2023-05-15 02:39:29 +01:00
Leah Rowe 86512e84be download/coreboot: simplify small if statements 2023-05-15 02:38:22 +01:00
Leah Rowe d28584f3d0 download/coreboot: fetch config in new function 2023-05-15 02:30:14 +01:00
Leah Rowe 162f4bf5dd download/coreboot: use global variables
i'm going to move the config recursion check
into a separate function, and global variables
make it easier to handle
2023-05-15 02:17:39 +01:00
Leah Rowe 56b80c0a4c download/coreboot: rename function for clarity 2023-05-15 01:25:08 +01:00
Leah Rowe ee79d8ba95 download/coreboot: reduce indentation in loop 2023-05-15 01:21:20 +01:00
Leah Rowe f858baea93 download/coreboot allow downloading specific trees
this fixes a regression caused in previous (recent)
revisions. this script is a beast, and requires a
lot of taming, which is the purpose of my audit
2023-05-15 01:12:37 +01:00
Leah Rowe a33e5c67f3 download/coreboot: split config check to function 2023-05-15 01:07:32 +01:00
Leah Rowe 62038f1d03 download/coreboot: fix misnamed variable 2023-05-15 00:47:31 +01:00
Leah Rowe 342e846f28 download/coreboot: consistent function declaration 2023-05-15 00:44:26 +01:00
Leah Rowe c32ae5979f download/coreboot: rename function for clarity 2023-05-15 00:43:55 +01:00
Leah Rowe e47aaa8ff0 download/coreboot: prune errant comments 2023-05-15 00:42:36 +01:00
Leah Rowe 31d8fcd3fd download/coreboot: split main() 2023-05-15 00:40:54 +01:00
Leah Rowe 4c2cff5e7c download/coreboot functions: rename board variable 2023-05-15 00:27:08 +01:00
Leah Rowe 7a6f40fcbf download/coreboot: top-down re-ordering
main first

usage last
2023-05-15 00:22:54 +01:00
Leah Rowe fd8b8084ee download/coreboot: simplified for loops 2023-05-15 00:21:16 +01:00
Leah Rowe b24fbc74c3 download/coreboot: move initial logic to main() 2023-05-15 00:10:37 +01:00
Leah Rowe 2871db159d download/coreboot: RFC 2646 compliance
yes, i know 3676 supersedes 2646

i still say 2646

saying 2646 is still technically valid,
for my purposes
2023-05-15 00:03:56 +01:00
Leah Rowe 8b4c1c1652 download/coreboot: consistent tab indentation 2023-05-14 22:46:59 +01:00
Leah Rowe 1388cccbc7 build/seabios: cleaner coding style
top-down logic, main() on top

moved some hardcoded strings to variables
2023-05-14 21:33:19 +01:00
Leah Rowe ddad8f00c6 build/seabios: simplify. stricter error handling 2023-05-14 21:22:06 +01:00
Leah Rowe b74e407806 blobutil/download: cleaner coding style
consistent indentation, and 80-line character limit
(RFC 2646)

top-down order, a main() is introduced, split into
more functions

non-zero-status exit (with message) now, when a non-
defined target is provided, e.g. nonexistentboard_4mb

puffy!
2023-05-14 20:36:06 +01:00
Leah Rowe 557272fa39 download/mrc: stricter error handling
the cbfstool command within subshell now also
exits with non-zero status, if it fails (most
likely because extraction failed, for some reason,
of the coreboot rom image for running through it)
2023-05-14 14:44:00 +01:00
Leah Rowe 7b36ffc1e5 download/mrc: handle exit status within subshell
the previous code merely exited from the subshell,
but the intended behaviour is for the entire script
to halt execution, and exit with non-zero status.

this patch fixes that bug.
2023-05-14 14:34:54 +01:00
Leah Rowe 963b524722 download/mrc: use cleaner coding style
top-down order for all logic, and shorter code lines,
conforming to rfc 2646 (no more than 80 characters)

the 80-character rule is violated for variables containing
long strings, such as wayback machine urls (can't be helped)

a few bugs were discovered, which will be fixed in follow-up
revisions, such as:

* exit status not handled inside subshell
* in general, exit status should be handled
  more explicitly, rather than relying on -e
2023-05-14 14:29:06 +01:00
Leah Rowe d89585fb71 gitclone: check for invalid patch filename
where the asterisk is used, it can sometimes
literally try to patch with a file named "*",
which of course does not exist

this change fixes an lbmk error when running:

./download seabios

this was caused recently, because all patches
were seabios were removed (lbmk currently uses
stock seabios, without patching it)
2023-05-14 11:35:04 +01:00
Leah Rowe db3c1d9ccf download/grub: delete grub if gnulib cloning fails
for our purposes, grub and gnulib are one in the same

if one fails, both have failed

exit with non-zero status if gnulib fails

the script sets -e so it will fail if grub fails to
download, which is tried before gnulib, and if that
happens, the grub directory is not created
2023-05-14 11:21:56 +01:00
Leah Rowe d90dfb0a08 build/dependencies/*: RFC 2646 compliance 2023-05-14 10:33:35 +01:00
Leah Rowe 48bda9e051 update/coreboot: top-down coding style
also moved hardcoded strings into variables
2023-05-14 10:20:18 +01:00
Leah Rowe a35f0b650a blobutil/extract: minor code style cleanup 2023-05-14 09:57:34 +01:00
Leah Rowe 009bf3b67f blobutil/extract: split up extract_blobs() 2023-05-14 09:50:48 +01:00
Leah Rowe fd3936cc59 blobutil/extract: cleaner coding style
removed hardcoded strings, put them in variables

use easier to read lowercase for function names
2023-05-14 09:40:34 +01:00
Leah Rowe 1f8ad1e46a blobutil/extract: simplified main() 2023-05-14 09:24:31 +01:00
Leah Rowe 1ffb32b78f blobutil/extract: top-down logic 2023-05-14 09:19:44 +01:00
Leah Rowe 423e203399 blobutil/extract: RFC 2646 compliance (80 chars) 2023-05-14 09:09:14 +01:00
Leah Rowe 26dfda0c01 blobutil/inject: print script path on error 2023-05-14 08:54:58 +01:00
Leah Rowe 6289eeb55e blobutil/inject: fail if gbe.bin doesn't exist 2023-05-14 08:35:34 +01:00
Leah Rowe 54f8a45325 blobutil/inject: check that me.bin exists 2023-05-14 08:31:59 +01:00
Leah Rowe d34f381301 blobutil/inject: check me path 2023-05-14 08:30:21 +01:00
Leah Rowe 5da7554a3b blobutil/inject: remove errant debug message
i left this here by accident when testing something
during work on a prior revision
2023-05-14 08:27:39 +01:00
Leah Rowe 70e337afd0 blobutil/inject: use x86 top-aligned mrc offset
the old code was specifing an absolute offset for
insertion of mrc.bin - cbfstool interprets anything
above 0x80000000 as top-aligned memory address in
x86, and anything below as an obsolute offset in
the flash, like with the old number

where a top-aligned address is provided to cbfstool,
the absolute position is calculated for the flash,
and cbfstool inserts it in the correct rom location

the benefit of this change is that the absolute
offset is now calculated automatically, which means
that the code will be correct even if the flash
size changes. for example, if 16MB flash is used
whereas 12MB is currently the default an support
haswell hardware

coreboot does not provide anything readably like
Kconfig, for extracting this value. it's baked
into the source code of coreboot, so you have to
find it. the correct location is hardcoded for
each platform, and always the same on each platform,
regardless of mainboard
2023-05-14 08:16:12 +01:00
Leah Rowe 1742978858 remove errant code lines from last commit 2023-05-14 06:36:21 +01:00
Leah Rowe ee0b200fbe blobutil/inject: massively improved coding style
top-down function order, with specific functions for
each type of blob. startup logic moved into main(),
also split into smaller functions

"write one program that does one thing well"

blobutil is like that, and has this added philosophy:

"write one function that does one thing well"

during the course of this re-factoring, several bugs
and issues were found, that are pre-existing. these
will be corrected in follow-up revisions
2023-05-14 06:27:41 +01:00
Leah Rowe 75ad8b0d46 Merge pull request 'Remove warning for coreboot images build without a payload' (#65) from nic3-14159/lbmk:remove-no-payload-warning into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/65
2023-05-13 11:08:51 +00:00
Leah Rowe f2e3176708 modify/u-boot: cleaner coding style
similar to the previous revision
2023-05-13 04:22:34 +01:00
Leah Rowe 71cac86634 modify/coreboot: cleaner coding style
similar to the previous revision
2023-05-13 04:09:06 +01:00
Leah Rowe 174d3af7a6 modify/seabios: cleaner coding style
same as build/boot/roms
2023-05-13 03:51:58 +01:00
Leah Rowe c8dfc3ccaa build/build/roms: simplify mkCoreboot() arguments 2023-05-13 03:06:55 +01:00
Nicholas Chin fdc9e4448f Remove warning for coreboot images build without a payload
I added this in upstream to prevent people from accidentally flashing
roms without a payload resulting in a no boot situation, but in
libreboot lbmk handles the payload and thus this warning always comes
up. This has caused confusion and concern so just patch it out.
2023-05-12 20:06:36 -06:00
Leah Rowe d8a8a1c622 build/boot/roms: don't use subshells frivilously
use make -BC instead of cd
2023-05-13 02:52:42 +01:00
Leah Rowe 834be77c1d build/boot/roms: remove errant debug line
i added this in the last revision

it was put there to debug something that
i fixed before pushing
2023-05-13 02:36:09 +01:00
Leah Rowe 39c143989c build/boot/roms: simplify build_rom_images() 2023-05-13 02:32:44 +01:00
Leah Rowe 65dfdd56da build/boot/roms: use fast dd command for ich9m ifd
bs 12k and count 1, rather than bs 1 and count 12k
2023-05-13 01:38:59 +01:00
Leah Rowe 6a4ce66f6e build/boot/roms: don't run ich9gen twice 2023-05-13 01:34:29 +01:00
Leah Rowe 1e9ed989d3 build/boot/roms: simplify moverom() 2023-05-13 01:27:00 +01:00
Leah Rowe 5811e53e82 build/boot/roms: remove unused legacy code
this cuttype is no longer used

lbmk creates truncated me setups now, on ifd platforms
2023-05-13 01:07:53 +01:00
Leah Rowe 3bd82b7679 build/boot/roms: reduced code indentation 2023-05-13 00:13:54 +01:00
Leah Rowe 9eee0fb483 build/boot/roms: split main() to topdown functions
the logic can now more or less be read chronologically
2023-05-12 23:09:39 +01:00
Leah Rowe bceb5f2eb4 build/roms_helper: move logic into main()
logic will be split from main into smaller
functions, in follow-up commits
2023-05-12 16:55:45 +01:00
Leah Rowe df611f9bc1 remove ga-g41m-es2l board for now
users reported it doesn't boot in recent releases, with the
february 2023 coreboot revision update

i have one in the lab, i'll just re-test it and fix whatever's
wrong for a future release
2023-05-12 05:10:08 +01:00
Leah Rowe 3da0ee4f73 remove python3 patches
python 3 is default now, in all the distros

specifically calling "python3" often doesn't work anymore

python2 is obsolete

let python2 die
2023-05-11 10:21:48 +01:00
Leah Rowe 6290f999e2 build/boot/roms_helper: further cleanup
consolidated some for loops

removed errant code
2023-05-10 20:23:18 +01:00
Leah Rowe 722c844ea7 build/boot/roms: top-down function order 2023-05-10 05:39:11 +01:00
Leah Rowe 5f44556f47 build/roms: general code style cleanup 2023-05-10 05:09:10 +01:00
Leah Rowe d521fca7ef build/roms: fix faulty keymap list expansion 2023-05-10 04:40:48 +01:00
Leah Rowe 67a607b88c build/boot/roms*: RFC 2646 compliance
No more than 80 characters per line.
2023-05-10 02:48:34 +01:00
Nicholas Chin 79939f2f1c Add devicetree patch for E6400 with Nvidia GPU 2023-05-09 20:41:55 +01:00
Leah Rowe 3f1ee01507 seabios: do normal config, disable oprom in vgarom
previously, "normal" initmode relied on the vgarom-based
seabios config, which enables option roms, but then lbmk
would insert pci-optionrom-exec 0 for vgarom, and 2 for normal

in libreboot, coreboot roms with "vgarom" in the filename do
pci option rom execution from coreboot, and "normal" roms
do execution from seabios(where seabios is the only payload
provided on normal setups)

this is because payloads like grub can also be used, on vgarom
setups, where coreboot must handle oprom execution
2023-05-09 20:40:12 +01:00
Leah Rowe 450f19bd79 Merge pull request 'hp9470m: fix board name in smbios' (#57) from Riku_V/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/57
2023-05-09 19:36:26 +00:00
Riku Viitanen 15ad5a00d1 hp9470m: fix board name in smbios 2023-05-09 21:39:18 +03:00
Leah Rowe ee46c04295 update the makefile
the makefile is a meme, but it should still be
properly maintained
2023-05-07 03:56:48 +01:00
Leah Rowe 5a197b4ff1 blobutil: support downloading E6400 VGA ROM
For Nvidia GPU models of Dell Latitude E6400
2023-05-06 22:23:27 +01:00
Leah Rowe 0729d6e600 Merge pull request 'Add patches for bios_extract' (#49) from nic3-14159/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/49
2023-05-06 21:23:08 +00:00
Nicholas Chin 2e64f63975 Add patches for bios_extract
This updates the dell_inspiron_1100.py script from Python 2 to 3 for
better compatibility (some distros have dropped Python 2), and adds
special handling so that it works with the Latitude E6400 BIOS.

These have also been sent upstream, so these patches can be dropped
once they are merged:
https://review.coreboot.org/c/bios_extract/+/74975/
https://review.coreboot.org/c/bios_extract/+/74976/
https://review.coreboot.org/c/bios_extract/+/74977/
2023-05-06 12:23:32 -06:00
Leah Rowe f5150f26a8 remove e6400_8mb and e6400_16mb (keep e6400_4mb)
nobody will bother to upgrade the flash on those machines

not much point maintaining the 8/16mb versions

might aswell do just the _4mb version
2023-05-06 18:27:31 +01:00
Leah Rowe 6d0ff02864 Import new util: bios_extract 2023-05-06 17:15:14 +01:00
Leah Rowe f820e3049a add e6400_flash_unlock binary to .gitignore
only src should be in git
2023-05-06 07:23:45 +01:00
Leah Rowe a52c99524d Merge pull request 'Add fedora 38 other unifont dependencies' (#45) from MrArthegor/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/45
2023-05-05 04:23:28 +00:00
Arthegor bc85118c51 add fedora 38 unifont dependencies 2023-05-04 12:15:47 +02:00
Leah Rowe f49eccee72 util/e6400-flash-unlock: do void on ec_fdo_command
the return value was never used
2023-04-30 14:07:02 +01:00
Leah Rowe 6588be675f don't force console mode in grub
the deleted patch (in this commit) was written to fix an
issue theoretically; it hasn't been fully tested, and some
people have reported strange issues since this patch was
merged - there is no proof that this patch causes them, but
removing this patch is the correct thing to do regardless
2023-04-24 13:14:23 +01:00
Leah Rowe 20192c0848 build/release/src: update blobutil target dirs 2023-04-23 06:42:43 +01:00
Leah Rowe 0c0d8fe89d build/release roms: scrub kbc1126 ec firmware 2023-04-23 06:11:09 +01:00
Leah Rowe 826d3685a1 blobutil/inject: fix bad removal pattern 2023-04-23 05:55:16 +01:00
Leah Rowe 46ec14afa8 blobutil/inject: handle HP KBC1126 EC firmware 2023-04-23 05:52:16 +01:00
Leah Rowe 3462afdbcf Merge pull request 'parabola specific dependencies install script' (#13) from Riku_V/lbmk:parabola into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/13
2023-04-22 12:33:28 +00:00
Leah Rowe db120ff55b Merge pull request 'Add HP EliteBook Folio 9470m' (#23) from Riku_V/lbmk:hp9470m into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/23
2023-04-22 11:37:13 +00:00
Riku Viitanen 6ff0284a51 Add HP EliteBook Folio 9470m 2023-04-22 04:04:37 +03:00
Riku Viitanen 5657c7d05b Add HP EliteBook 2560p 2023-04-21 20:32:46 +01:00
Leah Rowe 560642c585 chmod +x on blobutil/download script
i downloaded this file from git manually at some point,
when rebasing changes (i think it was the ec ones)

the logic in the file is correct but i forgot to mark
it executable

without this commit, lbmk fails utterly, on all the newer
intel boards
2023-04-20 22:24:11 +01:00
Leah Rowe eaf273a207 Merge branch 'blobutil_kbc1126_ec' 2023-04-20 20:52:37 +01:00
Leah Rowe 82e0274846 Merge pull request 'Undo GRUB fixes for E6400' (#20) from nic3-14159/lbmk:revert-e6400-grub-fix into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/20
2023-04-20 18:57:46 +00:00
Nicholas Chin 967992cc96 Re-disable GRUB payload for E6400
This reverts commit fe2b72035f.

The GRUB patch to fix the E6400 broke other systems and has been
reverted. As a result, GRUB needs to be disabled again on the E6400
until a better fix has been created.
2023-04-20 12:15:18 -06:00
Nicholas Chin f4e8b7efaa Revert "Fix GRUB handling of the E6400 keyboard"
This reverts commit 1497ae0451.

The blanket GRUB patch seems to break PS/2 keyboard handling across
other platforms, so revert it.
2023-04-20 12:13:54 -06:00
Leah Rowe 2906f1c100 Merge pull request 'Fix E6400 keyboard handling in GRUB' (#19) from nic3-14159/lbmk:fix-ps2-grub into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/19
2023-04-20 05:27:14 +00:00
Nicholas Chin fe2b72035f Revert "dell/e6400: disable grub payload"
This reverts commit 7bc4dc32ac.

The E6400 keyboard should work in GRUB now so we can reenable it.
2023-04-19 22:25:46 -06:00
Nicholas Chin 1497ae0451 Fix GRUB handling of the E6400 keyboard
This introduces a patch to grub which disables the coreboot
specific handling, allowing PS/2 keyboards to be handled the
same as i386-pc.  However this alone breaks the keyboard in
Linux, requiring coreboot to perform PS/2 initialization.

I think GRUB may be restoring the original configuration of
the PS/2 controller once it exits, and if coreboot doesn't
initialize the controller then it's restored to the default
state which Linux doesn't seem to like. I think the emulated
keyboard interface provided by the EC on the E6400 behaves
in a non-standard way that is incompatible with the old
coreboot specific handling.
2023-04-19 22:15:06 -06:00
Nicholas Chin eb32e49327 util/e6400-flash-unlock: restore README
when nicholas added this, he removed the README because it's
going on libreboot.org instead. however, i merged a WIP version
of his page for now because i want to get the e6400 going in
libreboot sooner. so, temp-readding this README. will just
link to this on codeberg or something, from the lb docs

NOTE: I didn't write this README, hence author field set
in the commit. Nicholas wrote it, but I (Leah Rowe) am just
adding it. so, git author set to nicholas, not me
2023-04-19 18:40:04 +01:00
Leah Rowe 7bc4dc32ac dell/e6400: disable grub payload
ps/2 internal keyboard faulty in grub target
i386-coreboot, according to nic3-14159

normal i386-pc grub (bios grub) is fine,
booted from seabios

it is being investigated
2023-04-19 17:27:14 +01:00
Leah Rowe 80705c8cd0 Merge pull request 'Add configs for the Latitude E6400' (#16) from nic3-14159/lbmk:e6400-port into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/16
2023-04-19 16:22:38 +00:00
Leah Rowe 9b6458f082 Merge pull request 'Add E6400 flash unlock utility' (#17) from nic3-14159/lbmk:e6400-flash-unlock into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/17
2023-04-19 15:05:41 +00:00
Nicholas Chin a11f2d2e5e Add E6400 flash unlock utility
Adding it to lbmk for now as it is not yet in coreboot. If it is merged
into coreboot we can just reference the one there. The original README
will be incorporated into a new page on lbwww, so README.md just points
to a placeholder URL that should match the new page.
2023-04-19 00:31:33 -06:00
Nicholas Chin d8222c0175 Add configs for the Latitude E6400
Tested the 4MiB ROMs but not the 8 or 16 MiB ones. This uses the same
board.cfg as the GM45 ThinkPads with an IFD+GBE from ich9gen.

Known issues:
- The internal keyboard does not work properly in GRUB. It seems like
  the keyboard controller is outputing set 1 (XT) scancodes, but GRUB
  is interpreting them as set 2 (AT) scancodes. This may also have
  something to do with scancode translation. However, the keyboard works
  fine in SeaBIOS and Linux. USB keyboards also work properly.
- The subsystem IDs in the GBE region are hardcoded for a Thinkpad in
  ich9gen, though this doesn't seem to cause issues in Linux. The vendor
  IFD and GBE region do have some differences from the generated
  binaries, though they do not appear to be critical.
2023-04-19 00:04:53 -06:00
Leah Rowe bd4ea9a028 gm45: re-add mitigations for no-microcode setup
libreboot will still include microcode updates
by default, but mitigations against broken speedstep
and reboot (when microcode updates are excluded) were
removed following the merge with osboot

this patch restores those mitigations; the patch
reverts coreboot to older smrr code (which works fine, it
isn't critical to use the new behaviour) and disables peci
(pointless feature)

i'll probably re-tool this later to apply the changes
conditionally to whether ucode is present

this is not a change in policy. policy says:
include cpu microcode updates by default

policy also says:
libreboot must be configurable

microcode removal via cbfstool remove -n, counts as
configuration, and in practise is not possible on
gm45 patches in current libreboot; this patch corrects
that problem, allowing the machines to work somewhat
well (same stability issues as before, like MCE errors
resulting in kernel panic on high CPU/memory usage,
but i digress)

happy... hacking
2023-04-17 17:10:37 +01:00
Riku Viitanen 930f30ac35 parabola specific dependencies install script 2023-04-16 17:41:26 +00:00
Leah Rowe 8fb54e801f util/nvmutil: sort includes alphabetically
small nitpick, but i try to use openbsd style
since i like that style. upon further reading
of their style guidelines today, it was revealed
to me that for includes, they:

* sort sys/ includes alphabetically, at the top
* after sys/ includes, have an empty line
* includes for networking-related headers below that
* empty space below networking headers if there
* after that, have the rest of the includes, sorted
  alphabetically

at least, that is my understanding. i have to admit,
it does look cleaner

not really that critical but why not do it?
2023-04-15 21:18:12 +01:00
Leah Rowe 7e01771395 set grub.cfg timeout to 30s 2023-04-15 12:18:32 +01:00
Leah Rowe b9ee4e79c3 blobutil: support fetching KBC1126 EC (HP laptops)
This is useful for e.g. HP EliteBook 2560p.

In coreboot config, enable e.g. (for lbmk blobutil):

CONFIG_KBC1126_FW1="../../ec/hp2560p/ec.bin.fw1"
CONFIG_KBC1126_FW2="../../ec/hp2560p/ec.bin.fw2"

In resources/blobs/sources you would have these entries:

EC_url
EC_url_bkup
EC_hash
2023-04-15 00:11:23 +01:00
Leah Rowe 0229463f7b Merge pull request 'Port to HP Compaq 8200 Elite SFF' (#8) from Riku_V/lbmk:hp8200sff into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/8
2023-04-14 22:03:40 +00:00
Riku Viitanen 41f094d131 Port to HP Compaq 8200 Elite SFF 2023-04-14 22:42:19 +03:00
Leah Rowe 668de6d81f blobutil: support extracting ME from full ROMs
In cases where the vendor update file contains a full
ROM image encompassing IFD+GbE+ME+BIOS, blobutil was
saving the *entire* ROM containing those, as me.bin.
For example, if it's an 8MB ROM, blobutil would create
a me.bin file that is actually the whole ROM containing:

* Vendor IFD region
* Vendor GbE(if it has one)
* Vendor ME region
* Vendor BIOS region

This fix tries with -M and -O first. In this combination,
me_cleaner shall extract me.bin (neutered) and save it.

If that fails, then the normal method with just -O is
tried, which by this logic would always be a lone ME
image if it succeeds.

I tested downloading ME images on existing boards with
this, and it didn't break them, and this fixes the bug.

This is done for HP 8200 SFF which Riku_V is adding to
lbmk. I'm on IRC with Riku_V as I write this commit
message! Super hot hotfix patch.
2023-04-14 01:41:07 +01:00
Leah Rowe 9df1a1774f build/release/src: include gitclone in release 2023-04-13 17:47:47 +01:00
Leah Rowe 903fa59056 util/nvmutil: don't display errant whitespace
At the end of each line is an errant space.

Fix that.
2023-04-11 00:46:45 +01:00
Leah Rowe 65d7e7c1dd blob/download: don't use bad character in printf
This fixes errors when running that script.
2023-04-10 06:50:33 +01:00
Leah Rowe 62cf993904 remove daisy and peach boards (todo: re-add)
bl1 bootloader blobs needed, and lbmk doesn't currently
auto-download these for insertion, so their presence in
the build system is problematic because people might build
these and think they work - they don't, due to the lack of
those bl1 blobs

notes about this are included in lbwww, on the compatibility
list. these can be re-added and tested later, when lbmk handles
those bl1 bootloader blobs
2023-04-09 20:57:08 +01:00
Leah Rowe e80b24e906 remove veyron boards temporarily (will re-add)
u-boot is known broken on these, last revision
known working is 2021.01

can bisect and find the fix. i'm putting this on
the issue tracker (new one on codeberg)
2023-04-09 19:52:26 +01:00
shmalebx9 257ca17b34 inject blobs into release archive and check their hash 2023-04-09 13:22:08 +01:00
shmalebx9 4719d733ef hash roms with blobs before stripping them 2023-04-09 13:21:56 +01:00
Leah Rowe 49356c3dd7 update to codeberg links in the readme 2023-04-08 20:45:03 +01:00
Leah Rowe eb9d063040 add ich9utils back to utils
don't download it. keep it in lbmk.

libreboot moved to codeberg for git hosting,
and i didn't want to keep lugging around an
extra git repo just for one tiny project.
2023-04-08 18:36:50 +01:00
Leah Rowe 58e12063c7 util/nvmutil: even crazier code size reduction 2023-04-07 14:55:04 +01:00
Leah Rowe 2ae9ff5446 util/nvmutil: yet more code size optimisation 2023-04-07 14:11:19 +01:00
Leah Rowe bae37e30ea util/nvmutil: more code size optimisations 2023-04-07 13:43:37 +01:00
Leah Rowe 7755f0e0c7 util/nvmutil: minor code size optimisation
not just sloccount, but compiled binary size as
tested with tcc on an x86_64 host
2023-04-07 03:35:47 +01:00
Leah Rowe 34eeca1f03 util/nvmutil: fix possible regression
i went too hard on the sloc reductions

a check inside a for loop could cause
incomplete reading of gbe images

revert that
2023-04-07 02:08:06 +01:00
Leah Rowe 01e2ed3034 util/nvmutil: minor code cleanup
also removed some unnecessary checks

fixed the check of pwrite's return value
(it should check for -1)
2023-04-06 22:19:45 +01:00
Leah Rowe 2044bf32d3 util/nvmutil: remove unnecessary else statement 2023-04-06 20:57:00 +01:00
Leah Rowe 2356f89f27 util/nvmutil: less annoying comments
added a few that were more useful

deleted a few obnoxious ones
2023-04-06 20:48:28 +01:00
Leah Rowe 8771551162 util/nvmutil: remove duplicated logic
the byteswap() function is used for big endian host
compatibility, but it can also be used to swap words
in the stored mac address
2023-04-06 20:22:58 +01:00
Leah Rowe 9372ae3ddc util/nvmutil: one more comment 2023-04-06 19:41:53 +01:00
Leah Rowe d3ad50dcb4 util/nvmutil: add useful code comments 2023-04-06 19:30:20 +01:00
Leah Rowe 7c403fcd9b util/nvmutil: remove unnecessary debug messages
these were put in when i was testing the feature to
limit read/written bytes in loading/saving of files
2023-04-06 19:06:07 +01:00
Leah Rowe 1fb5f7c6e0 util/nvmutil: serious re-factoring, part 2
the code is smaller
2023-04-06 18:38:05 +01:00
Leah Rowe a0bc61f9de util/nvmutil: consolidated error message 2023-04-06 00:56:17 +01:00
Leah Rowe 0d98d73870 util/nvmutil: serious re-factoring (speed boost!)
word/setWord no longer mitigates endianness. instead,
all bytes are swapped after reading and before writing the
file, and only if the host is big endian

this improves performance on little endian hosts, which is
most machines, and the code is much simpler, so it's more
robust and less likely to break

mac address endianness made more clear in code, including
with a comment that explains it

(the nvm section contains little endian words, *except* the
mac address whose words are stored big endian)
2023-04-06 00:42:14 +01:00
Leah Rowe b0fa54ac41 util/nvmutil: fix faulty zeroes-mac-address check
it was resetting the total for each nibble. absolute
epic fail on my part.

fixed now.
2023-04-05 21:53:12 +01:00
Leah Rowe 0c79a9a82e util/nvmutil: minor code cleanup 2023-04-05 21:51:06 +01:00
Leah Rowe 8e5a8145b2 util/nvmutil: move mac address parsing to function 2023-04-05 21:33:39 +01:00
Leah Rowe 92132e8e18 remove d945gclf_16mb
i overlooked this one. the normal one was removed,
due to boot issues with the board. i need to look
at this board before re-adding it to libreboot
2023-04-01 21:37:48 +01:00
Leah Rowe 9f76c9225c readme 2023-04-01 18:19:53 +01:00
Leah Rowe df534acd24 blobutil: replace fake tabs with tabs
always use tabs
2023-04-01 17:59:09 +01:00
Leah Rowe 96275d52f5 build/dependencies: add p7zip (for blobutil lzma) 2023-04-01 17:27:35 +01:00
Leah Rowe 424df36766 update .gitignore
yeah and don't hardcode me.bin. just don't show any me.bin in git
2023-04-01 17:14:07 +01:00
Leah Rowe a2686bf4f4 blobutil: don't hardcode paths 2023-04-01 17:12:19 +01:00
Leah Rowe 688e508175 blobutil/download: don't hardcode me.bin paths
Bruteforce it. Some executables are just using inno
archival but some are simple LZMA. This patch handles
both of them, and also the event where you have LZMA
compressed files (even LZMA compressed files within
LZMA compressed archives) within any inno/lzma compressed
executable.

It recursively scans inside a vendor update, to find
a me.bin files for neutering with me_cleaner.

This is in preparation for two new ports in Libreboot:

* HP EliteBook 8560w
* Apple MacBook Air 4,2 (2011)

This script can literally be used with multiple vendors now.
It is no longer specific just to Lenovo. I originally did
this and other recent commits to the file, as one big
commit, but I decided to split it all up into small commits.
2023-04-01 13:47:01 +01:00
Leah Rowe ed47c91453 blobutil/download: split into small functions
This patch makes it easier to determine which part does what.
2023-04-01 13:06:35 +01:00
Leah Rowe b10bfacf67 blobutil/download: make more logic top-down
Basically, I really like OpenBSD coding style, and I want to
replicate this, somewhat, in shell scripts.
2023-04-01 11:27:56 +01:00
Leah Rowe 1c2f9b54c6 blobutil/download: move main logic to the top
Top-down order is easier to read, for greater understanding.

What's moved is initialisation. The glue that calls Build_deps
and Download_needed still need to be at the bottom.
2023-04-01 11:20:12 +01:00
Leah Rowe 14b5947ed9 blobutil/download: move Build_deps to the top
It's called first, so declare it first!
2023-04-01 11:13:04 +01:00
Leah Rowe 7f3c0ca81e improved a comment 2023-04-01 11:11:31 +01:00
Leah Rowe af29f112ab blobutil: rename variables to make more sense
for example, files being downloaded have nothing to do
with the ME; they are merely compressed, and contain many
files in addition to it
2023-04-01 03:36:41 +01:00
Leah Rowe 883967160c build/boot/roms: bugfix: unitialised variable
When using e.g. -p grub in build/boot/roms, it will
error out. This patch fixes that.

E.g.

./build boot roms t440pmrc_12mb -p grub

Seldom used feature and it was overlooked. Most people
won't use the option that triggered the error.
2023-03-25 16:43:46 +00:00
Leah Rowe da6bf57a3f blobs/inject: use correct offset for haswell mrc 2023-03-24 07:10:44 +00:00
Leah Rowe bd4a954ff4 remove board: d945gclf
these boards are almost impossible to find, and have always been
buggy, it doesn't look like there will be any viable testing or
development on it

it's currently broken in master, on coreboot. if someone wants to
fix and re-add to lbmk, they can do that

use older libreboot releases to flash this board, if you wish

(i *am* adding te the issue tracker, a note about this commit,
with a view to re-adding it one day)
2023-03-22 10:41:31 +00:00
Leah Rowe 1ba8adbd85 Merge branch 'master' of andreas-hartmann/lbmk into master 2023-03-21 20:31:05 +00:00
andreas-hartmann 5ce9a2ab36 Added copyright line. 2023-03-20 16:21:34 +00:00
andreas-hartmann 5431e6c61a Added missing dependencies for Arch. 2023-03-20 16:15:26 +00:00
Leah Rowe 07b6bb3dbd build/release: handle nvmutil 2023-03-19 01:13:48 +00:00
Leah Rowe 653810b834 fix bug: me not being downloaded on some boards
rename board configs, and add to sources file the
t530/w530 boards

in some situations, the files weren't being downloaded
2023-03-19 00:36:34 +00:00
Leah Rowe 2bb63d8559 new board: lenovo/w530 2023-03-19 00:23:29 +00:00
Leah Rowe 896e90654f new board: lenovo/t530 2023-03-19 00:17:25 +00:00
Leah Rowe cffa567929 haswell (lenovo t440p/w541): fix S3 suspend/resume
MRC caches in a certain way, that Heads was able to work
around in their build system, for this board.

I've adapted the relevant config differences, from their project
as of heads revision 96440b928acb06de5b925ea12014c9c280b23165

The downside is that CBFS now has to be 8MB in size. The upside
is that the machine also boots much faster

See:

    https://github.com/osresearch/heads/pull/1282/commits/f0792117efa177ded19878f652c5a28e8cc62a71

    https://github.com/osresearch/heads/pull/1282#issuecomment-1400634600

I have not adapted their IFD changes, versus Libreboot, because theirs
simply has a different version string, and uses different read/write
permission bits for regions as defined in the IFD.

This affects:

    t440p_12mb_mrc

    w541_12mb_mrc

S3 suspend/resume still broken on these targets which use the libre
MRC init (replacement code by Angel Pons, recently merged in lbmk):

    t440p_12mb

    w541_12mb

With clever use of FMAP, the rest of the BIOS region might still be
used. However, for our purposes, 8MB CBFS will do just fine.

Heads's changes configure MRC so that caching is handled properly,
for when the machine returns from sleep. Setting CBFS to be any
higher will result in slower boot times, and broken S3 resume, due
to MRC cache misalignment (this is based on my understanding, reading
through the Heads project looking at their research on this).

At some point in the future, Angel's libre MRC code will probably
be finished, and merged, with more fine tuning possible to allow
bigger CBFS sizes.
2023-03-18 23:21:15 +00:00
Leah Rowe be3d7b7e69 haswell: re-add mrc.bin in separate board configs
libre mrc on haswell is quite buggy for now, but works in
a limited fashion

this patch re-adds the old configs, but as _mrc for example
t440p_12mb_mrc instead of t440p_12mb

and t440p_12mb (without _mrc) still uses the libre mrc code
2023-03-18 15:20:03 +00:00
Leah Rowe bdc39ffcc7 haswell: only use txtmod seabios configuration
i found that with libre mrc, usb was broken in grub

however, it worked nicely in seabios

for our purposes, doing seabios-only roms in text mode
is best for now

i'm going to re-add mrc.bin, but for t440p_12mb_mrc
and w541_12mb_mrc, as new config names. the regular
t440p_12mb and w541_12mb will continue to use libre
mrc, but the _mrc ones will use mrc.bin and retain the
grub payload in board.cfg
2023-03-18 12:15:35 +00:00
Leah Rowe df6b9e2840 remove t440p_12mb_cbfs4mb (retain t440_12mb) 2023-03-18 12:13:28 +00:00
Leah Rowe 04f1fe1751 remove x220_16mb (x220 with 16MB flash)
untested. removing.
2023-03-18 07:59:25 +00:00
Leah Rowe 548872ce8e haswell boards: use libre mrc.bin replacement
courtesy of Angel Pons from the coreboot project

this uses the following patch set from gerrit, as yet
unmerged (in coreboot master) on this date:

    https://review.coreboot.org/c/coreboot/+/64198/5

logic for downloading mrc blobs has been deleted from
lbmk, as this is now completely obsolete (for haswell
boards)

if other platforms are added later that need mrc.bin,
then logic will be re-added again for that
2023-03-18 00:55:10 +00:00
Leah Rowe a942bd6590 move download/gitmodule script to root directory
this fixes the build error:

Error: name not set
Usage: ./download gitmodule [name]

when running:

./download all

running "all" runs all scripts under downloads,
one of which was the gitmodule script itself, therefore
being run without argument
2023-03-17 23:13:20 +00:00
Leah Rowe 59540530bc nuke p2b_ls/p3b_f boards
they don't even boot in pcbox properly, and the real
hardware is not much to talk about

useless port

delete
2023-03-17 21:54:01 +00:00
Leah Rowe ebd9ec96c4 debian/ubuntu dependencies scripts: add gettext 2023-03-16 23:55:05 +00:00
Leah Rowe f9e20b8a1d util/nvmutil: optimise rhex() further
reduce the number of calls to read() by using
bit shifts. when rnum is zero, read again. in
most cases, a nibble will not be zero, so this
will usually result in about 13-15 of of 16
nibbles being used. this is in comparison to
8 nibbles being used before, which means that
the number of calls to read() are roughly
halved. at the same time, the extra amount of
logic is minimal (and probably less) when
compiled, outside of calls to read(), because
shifting is better optimised (on 64-bit machines,
the uint64_t will be shifted with just a single
instruction, if the compiler is decent), whereas
the alternative would be to always precisely use
exactly 16 nibbles by counting up to 16, which
would involve the use of an and mask and still
need a shift, plus...

you get the point. this is probably the most
efficient code ever written, for generating
random numbers between the value of 0 and 15
2023-03-06 21:30:33 +00:00
Leah Rowe f04855c29d fix flashrom download error 2023-03-06 11:44:54 +00:00
Leah Rowe e2945f02b7 payload/grub: force terminal_output to console 2023-03-05 21:25:35 +00:00
Leah Rowe 909d3b31db grub.cfg: set default timeout to 5 seconds 2023-03-05 19:14:24 +00:00
Leah Rowe 544737c864 scripts: build cbutils, not specific utils
some checks check for specific utils, which are
then used to indicate the existence of other utils,
which means that building them singularly, as is
currently done, may result in errors later if another
tool doesn't exist compiled yet

this is an obscure bug, fixed by this patch. more of a
workaround really. a dirty hack. when checking for any
of the coreboot utilities required, build all coreboot
utilities that are possibly required

the utilities are small enough that this does not add
much extra time to build, and in most cases, all of them
will be needed anyway
2023-03-05 14:00:06 +00:00
Leah Rowe 9398ad08db also fix data.vbt path for lenovo/w541
using the same method as the previous patch for t440p
2023-03-05 13:50:09 +00:00
Konstantinos Koukopoulos d2465e8291 Fix CONFIG_INTEL_GMA_VBT_FILE for the t440p_12mb config 2023-03-05 13:46:33 +00:00
Leah Rowe 0e34d199fb update debian dependencies (for sid) 2023-03-05 13:42:06 +00:00
Leah Rowe a5aa5bca77 ICH9M: default to 256MB VRAM, not 352MB
352MB VRAM causes stability issues, according to some reports

users can still set it to the higher level when building, if
they wish to
2023-03-04 23:58:17 +00:00
Leah Rowe 6421af5dcb bump seabios revision 2023-02-21 18:29:06 +00:00
Leah Rowe aba6307d13 bump grub revision 2023-02-21 07:39:07 +00:00
Leah Rowe 36982ab5f4 fix bad ifdtool patch from earlier commit 2023-02-19 23:21:37 +00:00
Leah Rowe 3857b4b65b build/dependencies/debian: add python3 dependency 2023-02-19 23:16:47 +00:00
Leah Rowe dac9ea86d3 build/boot/roms: fail when build cbutils fails 2023-02-19 23:16:01 +00:00
Leah Rowe 0d0f6cf3b8 coreboot: update revision of cbtree "default" 2023-02-19 19:24:01 +00:00
Leah Rowe dc1fedf920 Merge branch 'uboot-v2023.01' of alpernebbi/lbmk into master 2023-02-19 17:09:57 +00:00
Alper Nebi Yasak 7932d5fa95 u-boot: Disable environment storage
U-Boot can be configured via environment variables which can be saved to
various storage devices. This usually defaults to MMC or SPI depending
on where it boots from, but assumes the device's layout is controlled by
U-Boot.

We should store the environment in SPI flash, but we also need to
configure coreboot FMAPs to reserve the area U-Boot would use as its
environment storage. For now, disable environment storage by setting
ENV_IS_NOWHERE=y to avoid overwriting random regions of SPI or MMC if
someone tries to save the variables.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2023-02-14 00:58:08 +03:00
Alper Nebi Yasak 8d57468ee5 u-boot: Update to v2023.01
Set default U-Boot revision to v2023.01 and rebase patches on top of
that. Upstream kconfig status is a bit unstable, so updating configs
with `make oldconfig` would miss important upstream changes.

For each board, run `make savedefconfig` and `diffconfig -m` at the old
version to get a diff from upstream defconfigs. Fix those affected by
upstream changes, like SYS_TEXT_BASE being renamed to TEXT_BASE. Then
append those to the new version's defconfigs and run `make olddefconfig`
to get updated configs.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2023-02-14 00:58:08 +03:00
Leah Rowe 6b4a14ce4a util/nvmutil: tidy up variable declarations 2023-01-28 23:21:53 +00:00
Leah Rowe 031a0b553b util/nvmutil: setWord(): declare variables first 2023-01-28 22:40:01 +00:00
Leah Rowe 257eedca0c util/nvmutil: reset errno if any write attempted
the way nvmutil is designed, setWord() is only ever called
under non-error conditions. however, if one part is valid but
the other one isn't, and a command is run that touches both parts,
errno is non-zero write writeGbeFile is called

in situations where one part is valid, but the other isn't, AND the
writes to gbe (in memory) results in a non-change, writeGbeFile is
not called; in this situation, errno is not being reset, despite
non-error condition

this patch fixed the bug, resulting in zero status upon exit under
such conditions
2023-01-28 22:14:35 +00:00
Leah Rowe adc76e3814 util/nvmutil: do not write non-changes to disk 2023-01-28 21:26:36 +00:00
Leah Rowe 3e150bf303 util/nvmutil: cmd_swap(): write sequentually
the current code writes part 1 first, and part 0 next,
on the disk, due to the way the swap works.

with this change, swap still swaps the two parts of the file,
on disk, but writes the new file sequentially.

this change might speed up i/o on the file system, on HDDs.
on SSDs, this change likely makes no difference at all.
2023-01-28 20:30:34 +00:00
Leah Rowe 7e3a73558e util/nvmutil: don't use malloc() 2023-01-28 19:39:34 +00:00
Leah Rowe a924d43bdd util/nvmutil: fix clang build errors 2023-01-28 14:11:17 +00:00
Leah Rowe c822033bee util/nvmutil: simplify rhex()
don't use malloc(). instead, just load random bytes
into a uint64_t
2023-01-28 12:24:50 +00:00
Leah Rowe 0f4852450c util/nvmutil: use gbe[] in word() and setword()
this will make the code more flexible, if (when) i
add changes that allow multiple commands to be used
in a single run, on any given number of files
2023-01-27 20:13:15 +00:00
Leah Rowe b1186968e8 util/nvmutil: code cleanup 2023-01-27 19:52:11 +00:00
Leah Rowe 7a98649764 util/nvmutil: call pledge() earlier, in main() 2023-01-27 15:34:09 +00:00
Leah Rowe bb6fe263e7 util/nvmutil: remove unused #define 2023-01-27 15:28:50 +00:00
Leah Rowe 5a5a8662a6 util/nvmutil: optimised disk reads
only read the required number of bytes, per command
2023-01-27 15:09:34 +00:00
Leah Rowe 24d5645676 util/nvmutil: optimise cmd_swap()
On many Lenovo GbE regions (in factory firmware), part 0 is
invalid but part 1 is valid.

This change means part 1 is checked first. If part 1 is valid,
part 0 won't be checked at all (due to how most C compilers
optimise).

Most people are just going to extract the factory GbE file,
modify it and re-insert it into the ROM image, so this causes
a nice speedup.
2023-01-27 14:26:24 +00:00
Leah Rowe ef84329a81 util/nvmutil: optimise rhex() for speed
don't constantly open/close the file: /dev/urandom

only read 12 bytes at a time

because of this change, the readFromFile() function now only
handles gbe files
2023-01-27 14:18:46 +00:00
Leah Rowe 88a51531cf util/nvmutil: code cleanup in rhex() 2023-01-27 13:54:01 +00:00
Alexei Sorokin ac1cab288d x230edp_12mb: Correct the path to data.vbt 2023-01-26 23:57:13 +00:00
Leah Rowe afc80b89ec util/nvmutil: update copyright years 2023-01-17 12:48:14 +00:00
Leah Rowe 8242dca57b util/nvmutil: limit bytes written per command
Massive reduction in number of bytes written, if copy/swap
commands are not used.
2023-01-17 11:03:55 +00:00
Leah Rowe e398331b38 util/nvmutil: make writeGbeFile more readable 2023-01-17 10:52:45 +00:00
Leah Rowe 8dea350a62 util/nvmutil: only write parts that are modified
Old behaviour: always write both gbe sections.

New behaviour: only write back what was changed.
2023-01-17 10:23:21 +00:00
Leah Rowe d0fa08d58d blobs/inject: fix wrong nvmutil path for make 2023-01-10 03:48:46 +00:00
Leah Rowe e8072934f2 Merge branch 'veyron-uboot-dmreset' of alpernebbi/lbmk into master 2023-01-10 03:26:49 +00:00
Leah Rowe 6b10454271 Merge branch 'peach-uboot-usbehci' of alpernebbi/lbmk into master 2023-01-10 03:26:40 +00:00
Alper Nebi Yasak 80bf54b2a7 u-boot: Enable USB_EHCI_EXYNOS on peach boards
The USB 2.0 ports on Exynos boards need the relevant driver enabled by
USB_EHCI_EXYNOS. This is enabled by default depending on USB_EHCI_HCD.
It's already enabled on snow and spring, but apparently not on peach
boards, as discovered from other people's attempts to enable it [1][2].
Enable it also on the peach_pi and peach_pit.

[1] https://gitlab.com/exynos5-mainline/u-boot/-/commit/8f12e43dbfdebbd29f49c2cb8bf6e9b6ea7e70c9
[2] https://gitlab.com/exynos5-mainline/u-boot/-/commit/11cacf55ad720dfca8799561a38b1da4732a3018

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-31 21:34:01 +03:00
Alper Nebi Yasak e11650c3c7 u-boot: Enable DM_RESET for veyron boards
The display driver on the veyron boards needs reset drivers, more
specifically RESET_ROCKCHIP. This is enabled by default depending on
DM_RESET, which an upstream commit enables for veyron_jerry claiming it
fixes the display [1]. Enable it also in our configs, but for other
veyrons as well.

[1] https://lore.kernel.org/u-boot/20220928024046.2657593-1-sjg@chromium.org/

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-31 20:43:58 +03:00
Ferass 'Vitali64' EL HAFIDI 7f5dfebf7d Do not rely on bashisms and behaviour undefined by the POSIX specification. Part 2
Signed-off-by: Ferass 'Vitali64' EL HAFIDI <vitali64pmemail@protonmail.com>
2022-12-28 18:43:49 +00:00
Ferass 'Vitali64' EL HAFIDI f787044642 Do not rely on bashisms and behaviour undefined by the POSIX specification.
By making lbmk fully POSIX-compliant, it will be easier to port lbmk to
other systems implementing POSIX such as Alpine Linux and FreeBSD.

Signed-off-by: Ferass 'Vitali64' EL HAFIDI <vitali64pmemail@protonmail.com>
2022-12-27 15:50:41 +00:00
lbmkplaceholder d45b2e70dc util/nvmutil: use err() more consistently 2022-12-24 01:18:17 +00:00
Leah Rowe d726b16f5f util/nvmutil: more robust pointer handling
i didn't like the previous commits, they felt really hacky

running malloc and then changing the pointer directly just rubs
me the wrong way

fix that
2022-12-24 01:10:55 +00:00
lbmkplaceholder 448ee5105d util/nvmutil: optimise cmd_swap() further
don't do xor swap. we know gbe2 is always 4KB higher than
gbe in memory, so we can just set gbe2 to the value of gbe,
and OR the size in bytes of 4KB into gbe2

this is only a marginal speed boost, negligible even, but it's
done for the lulz
2022-12-23 10:42:19 +00:00
lbmkplaceholder effcb942ce util/nvmutil: greatly optimise cmd_copy()
similar to the last change by concept. we now write
individual 4KB blocks per part 0 and 1, at the end
of nvmutil, based on pointer values gbe and gbe2

instead of running memcpy, simply overwrite the pointer

this results in less I/O, thus more speed
2022-12-23 10:28:25 +00:00
lbmkplaceholder 6e5828e4a8 util/nvmutil: greatly optimise cmd_swap()
instead of XOR-swapping every byte, have pointers to the
two parts and *XOR swap the pointers*. at the end of the
program execution, when writing, pwrite the two parts into
the same file
2022-12-23 08:41:18 +00:00
lbmkplaceholder 7aafc62bf7 scripts/blobs/inject: fix bad cbfstool build check 2022-12-22 23:09:03 +00:00
lbmkplaceholder 6ebd178f28 util/nvmutil: simplified error handling in rhex() 2022-12-21 15:45:17 +00:00
lbmkplaceholder 04da953c71 util/nvmutil: return errno when calling err() 2022-12-21 15:31:02 +00:00
lbmkplaceholder 001878112a util/nvmutil: exit non-zero if close() fails 2022-12-21 15:28:15 +00:00
lbmkplaceholder c6bb4d25f3 build/release/src: don't delete .gitcheck 2022-12-14 10:46:06 +00:00
Leah Rowe 0fbf3325e1 correct a faulty if statement in build/release/src 2022-12-14 10:19:02 +00:00
lbmkplaceholder 3e266650c2 disable grub and memtest on 1MB ROM configs
due to upstream bloat, these no longer fit. it will have to be
fixed in the next libreboot release
2022-12-14 08:31:07 +00:00
lbmkplaceholder ab2cfb8639 util/nvmutil: only mask random unicast/local macs
Without this change, arbitrary MAC addresses will always be masked.

This change restores the intended behaviour.
2022-12-14 08:15:07 +00:00
lbmkplaceholder fea3e51ccd update the readme 2022-12-14 08:09:52 +00:00
lbmkplaceholder 664cdcfb36 fix ./build boot roms all 2022-12-14 06:46:41 +00:00
Leah Rowe 48c7318627 p2b_ls/p3b_f boards: Disable memtest payload
memtest can't fit in such tiny space alongside SeaBIOS
2022-12-11 06:29:39 +00:00
Leah Rowe 31111c645f build/boot roms: add exits for failing commands 2022-12-11 06:25:09 +00:00
Leah Rowe 4eba525bba p2b_ls/p3b_f boards: no payload and no vga init
The configs were enabling SeaBIOS payload, but this is to be
handled by lbmk, not coreboot.

Further, they were enabling VGA ROM execution in coreboot, but
this should be handled by SeaBIOS.

This board should not have a GRUB payload enabled either; this
will be checked and fixed if necessary in the next commit.
2022-12-11 06:20:34 +00:00
Leah Rowe c931b40e4b Merge branch 'master' of qeeg/lbmk into master 2022-12-11 06:09:06 +00:00
Leah Rowe 34a56281ac Merge branch 'cros-postmerge-fixes' of alpernebbi/lbmk into master 2022-12-11 05:30:23 +00:00
qeeg 6351a4a484 Add P2B-LS and P3B-F configs 2022-12-10 08:42:29 -06:00
Alper Nebi Yasak f079b83dd9 build/release/src: Include U-Boot sources in source archive
Add U-Boot to the source release script's modules list so that it is
included in source release tarballs. Don't include the unused upstream
source and .git directories.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 15:40:11 +03:00
Alper Nebi Yasak 70435784ec build/clean: Add helper script to clean U-Boot builds
Copy the resources/scripts/build/clean/crossgcc script and adapt it to
run "make distclean" on U-Boot build trees. Some build artifacts persist
after the run, so also run "git clean -fdx" if we can.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 15:39:33 +03:00
Alper Nebi Yasak 0bd4fdbe5b dependencies/debian: Install dependencies for U-Boot
U-Boot build dependencies are listed on their online documentation [1],
but the listed Debian packages also include test-only dependencies.
While installing dependencies, install the packages necessary to build
U-Boot, except for the test-only ones I could identify.

[1] https://u-boot.readthedocs.io/en/latest/build/gcc.html

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 3d5bd034c5 coreboot: Add qemu_arm64_12mb board
Add a build for QEMU AArch64 virtual machine using U-Boot as payload.
Coreboot config is based on the following defconfig:

    CONFIG_CBFS_SIZE=0x00c00000
    CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_COREBOOT_ROMSIZE_KB_12288=y
    CONFIG_UART_PCI_ADDR=0x0

The resulting ROM can be booted with a command line like:

    qemu-system-aarch64 \
        -machine virt,secure=on,virtualization=on \
        -cpu cortex-a53 -m 1G \
        -vga none -display none -serial stdio \
        -bios bin/qemu_arm64_12mb/uboot_*.rom

However, this is little more than a proof of concept because U-Boot
upstream is missing coreboot integration on non-x86 boards, which could
have been useful for e.g. a framebuffer.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak d14731beef u-boot: Add qemu_arm64_12mb board
Add a U-Boot payload build for the QEMU AArch64 virtual machine. The
config is same as upstream "qemu-arm64" defconfig, but SYS_TEXT_BASE is
set to 0x50000000 so that it doesn't conflict with coreboot. QEMU
auto-generates and passes a device-tree file to U-Boot at runtime,
there's no compile-time canonical version, so there's no need to set
REMAKE_ELF or OF_EMBED.

It's not immediately obvious if QEMU-specific drivers are available to
support display output, but most coreboot integration is unavailable
(depends on x86) and entire video subsystem is disabled in the U-Boot
upstream defconfig.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak b5a5801f7a coreboot: qemu_x86_12mb: Enable DRIVERS_UART_8250IO
U-Boot doesn't run on this board when this SuperIO serial driver is
disabled. Enable it.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 737573cee5 u-boot: Add qemu_x86_12mb build
Add a U-Boot build for the qemu_x86_12mb board. The config is a copy of
the upstream "coreboot" defconfig, but with OF_EMBED=y.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 1c62b003ad build/roms: Support using "u-boot" ELF file as U-Boot payload
U-Boot runtime configuration is done with a device-tree file, which is
built alongside the executable in the upstream build system, and must be
available to U-Boot at runtime.

This device-tree is normally not linked into the default "u-boot" ELF
file. So far we have been handling it by re-creating a "u-boot.elf" from
the raw binary parts by setting REMAKE_ELF, and using that as the
coreboot payload. Unfortunately, that fails to build for x86 boards,
more specificly the "coreboot" boards upstream.

It's also possible (but discouraged) to set OF_EMBED to embed the
device-tree file into the U-Boot itself, in which case we could use the
"u-boot" file as the payload on the "coreboot" boards. Add support for
using the "u-boot" file as the payload if "u-boot.elf" doesn't exist.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 6cabcec51d u-boot: Add video damage tracking patch series
Add a series posted to upstream mailing lists that makes the GRUB
text-mode console faster by implementing video damage tracking [1].
Refresh the config files to include its new VIDEO_DAMAGE Kconfig.

Patch 7/7 upstream has a tiny conflict with "Improve UEFI experience"
series we already have, but it's only in the diff context. No changes
other than fixing that.

[1] https://lore.kernel.org/u-boot/20220609225921.62462-1-agraf@csgraf.de/

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 38328b9394 u-boot: Set default revision to v2022.10
Set revision to the commit hash of the v2022.10 release, and run "make
olddefconfig" for all boards to refresh the configs.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak c798975de6 u-boot: Use a common tree
Merge all boards into a common "default" tree, currently for v2022.07.
This ends up applying the "Improve UEFI experience on DM_VIDEO" series
to everything, so refresh the configs for the new options.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 5b6bf2a826 build/roms: Don't rebuild crossgcc if it was already built
The roms_helper script skips building crossgcc-i386 if its target
directory exists. Skip it for other architectures as well.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak bee5054077 build/roms: Make coreboot crossgcc usable for payloads and modules
Add the coreboot-built cross-architecture toolchains to the PATH so that
modules and payloads can use them. When building for a foreign-arch
board, also export CROSS_COMPILE pointing to the appropriate prefix.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak a586356164 build/roms: Build 32-bit crossgcc for AArch64 as well
This re-applies commit a69855f7e4 ("Build 32-bit crossgcc for AArch64
as well") which was inexplicably reverted along with unrelated changes.
Mention in a comment that building crossgcc-arm is necessary for
AArch64.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 9fb4ecec62 build/roms: Don't build Memtest86+ when not specified by cmdline
When overriding which payloads will be built with the -p command line
argument, the roms_helper script builds the Memtest86+ payload before
checking if it should be disabled. Move the build command after the
command line override.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 4e3097b5e7 build/roms: Disable U-Boot when not in payloads specified by cmdline
When overriding which payloads will be built with the -p command line
argument, the roms_helper script doesn't disable the U-Boot payload.
Disable it in this case.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 584210bd1f download/u-boot: Change to download target before running extra.sh
The U-Boot download script does its work from the repository root
instead going into the newly created dirs, unlike the coreboot
counterpart. It should run the board-specific extra.sh files with the
downloaded paths as their working directory. Do so by a subshell.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-09 16:50:29 +03:00
Alper Nebi Yasak 2b761f2f8a download/u-boot: Re-add usage text for no-argument form
The no-argument form of the U-Boot download script prepare trees for all
boards when run with no arguments, like the corresponding script for
coreboot. The usage text for this case was removed without any changes
to the corresponding code, assume it was by mistake and add it back.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-09 16:50:29 +03:00
Alper Nebi Yasak 71cf7f9db1 download/u-boot: Remove support for deleting git folders
Removing the git dirs was part of deblobbing, which Libreboot no longer
cares about. The variable that triggers it is no more. Remove the dead
code.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-09 16:50:29 +03:00
Leah Rowe b495aa0987 util/nvmutil: consistent parentheses on comparison 2022-12-08 21:34:19 +00:00
Leah Rowe 17fa25e5af util/nvmutil file reads: skip reading if errno!=0
*This condition will probably never be met, but it is theoretically
possible that the code could still fail at this point. Catch all errors,
and exit, ruthlessly.
2022-12-08 21:29:36 +00:00
Leah Rowe 27876c6421 util/nvmutil: return error when fstat() is -1
Another oversight in my error handling.
2022-12-08 21:20:53 +00:00
Leah Rowe 960af2d6e8 util/nvmutil: rhex(): fail if errno not zero
The code was only checking whether all of the bytes were read,
but there are other errors that can be caught via errno.

Enforce strict errno handling, when generating random
numbers for command `setmac`.
2022-12-07 22:30:55 +00:00
Leah Rowe 3d01cf28d6 util/nvmutil: minor code formatting cleanup 2022-12-05 03:26:18 +00:00
Leah Rowe a7ea70c77a build/release/roms: delete ME/MRC firmware in ROMs 2022-12-05 02:21:28 +00:00
Leah Rowe 0c33438063 build/boot/roms: remove errant code 2022-12-05 00:40:58 +00:00
Leah Rowe 33bbb36dc4 remove errant detail from comment 2022-12-05 00:19:21 +00:00
Leah Rowe 5586947499 delete build/release/u-boot-libre
this is a hangover from pre-osboot-merge libreboot. the idea
was to distribute fsdg uboot archives

lbmk has uboot support, and releases will simply
include uboot in the main src archive like with everything else
2022-12-05 00:14:53 +00:00
Leah Rowe 137b5434d7 remove logic for avoiding nonredistributable blobs
the --nuke option in ifdtool will be used instead, to nuke
the ME regions in specific rom sets (and cbfstool will be
used to delete mrc.bin files from rom sets)

the new method being implemented is heavier on disk io, but
simplifies lbmk, and disk io could still be optimised in
the following ways:

* when copying roms from boards with ME in them, use
  ifdtool --nuke to get filename.rom.new, and *move* (not copy)
  filename.rom.new to the new destination (for use with tar)

* possibly modify ifdtool to make efficient use of mmap for
  disk i/o; it currently loads entire roms into an allocated
  buffer in memory
2022-12-05 00:10:07 +00:00
Leah Rowe 7679c8e0f0 coreboot/default: add --nuke flag to ifdtool
e.g.

./ifdtool --nuke me coreboot.rom

this will be used by rom release build scripts, to scrub
stuff like intel me from the rom
2022-12-04 23:47:29 +00:00
Leah Rowe a5e4416a14 util/nvmutil: remove errant line break 2022-12-03 12:43:13 +00:00
Leah Rowe c100dd1f81 util/nvmutil: missing paretheses on if statement 2022-12-03 12:30:13 +00:00
Leah Rowe 036d710776 util/nvmutil: don't initialise rbuf unless needed
previously, it was always initialised, but now it's only
initialised if '?' is used on a mac address character in
command `setmac`

this is done by simply moving mac address character
randomisation to a separate function
2022-12-03 12:28:20 +00:00
Leah Rowe 851892b464 util/nvmutil: rename variable in hextonum 2022-12-03 12:17:16 +00:00
Leah Rowe 0bf3f1ed61 util/nvmutil: don't reallocate memory in hextonum 2022-12-03 12:11:15 +00:00
Leah Rowe e5a46b464d util/nvmutil: dont report bad size if /dev/urandom 2022-12-03 12:00:25 +00:00
Leah Rowe ededa5ddda util/nvmutil: rename variables in hextonum 2022-12-03 11:58:07 +00:00
Leah Rowe e2e321fc20 util/nvmutil: use BUFSIZ for rmac size in hextonum
I will be using this function elsewhere, and in general
I want this to be usable for lots of programs.
2022-12-03 11:55:38 +00:00
Leah Rowe a6d0112d86 util/nvtutil: fix out of bounds error
the error would have never been triggered, because it never
went over 11, but if this code were to be copied elsewhere,
it would be problematic
2022-12-03 11:49:52 +00:00
Leah Rowe 04ced693e8 update the README 2022-12-02 21:38:10 +00:00
Leah Rowe 85937f3f4c util/nvmutil: reset errno on cmd_swap
If one of the checksums was valid, but the other was not,
errno would be set to E_CANCELED, but then the buffer would
be modified anyway; this is acceptable behaviour, and errno
would later be reset writing the GBE file, which is done
only on the condition that the buffer was modified, but
it's also a good idea to reset it here just in case.

This is not a bugfix, and no behavioural changes will be
observed by the user, but this may *prevent* a bug in the
future, so let's pre-fix that bug now.
2022-12-01 13:16:05 +00:00
Alexei Sorokin ec082429ab scripts: avoid relying on spaces from sha1sum output 2022-11-29 20:26:35 +00:00
Leah Rowe 7c5334ca0e Merge branch 'hide-mei' of XRevan86/lbmk into master 2022-11-29 19:45:24 +00:00
Alexei Sorokin 69eaca2c6d coreboot: hide MEI on neutered-ME targets 2022-11-29 13:57:54 +03:00
Leah Rowe cf0522203d Merge branch 'master' of Arsen/lbmk into master 2022-11-29 01:24:30 +00:00
Leah Rowe 0c5dfddd64 Merge branch 'x230edp' of XRevan86/lbmk into master 2022-11-29 00:11:00 +00:00
Arsen Arsenović a40ba4ad11 t430_12mb: Add, based on x230_12mb
These boards are near-identical, this appears to suffice.
2022-11-28 22:38:20 +01:00
Alexei Sorokin a33e842908 coreboot: add x230edp_12mb, remove x230fhd_12mb
New x230edp_12mb target uses the
https://review.coreboot.org/c/coreboot/+/28950 patchset to add an
X230_EDP target to the default coreboot branch.
Consequently the "fhd" coreboot branch is no longer needed and has
been safely removed.
2022-11-28 23:33:58 +03:00
Leah Rowe e8eee6dd8a util/nvmutil: mild refactoring 2022-11-27 09:43:47 +00:00
Leah Rowe 342e5abe5e util/nvmutil: improved errno handling in main 2022-11-27 09:36:18 +00:00
Leah Rowe d7465efbb0 util/nvmutil: put hextonum in its own function 2022-11-27 09:29:37 +00:00
Leah Rowe 9e5ff5e4e6 util/nvmutil: move ENOTDIR check to function 2022-11-27 09:01:57 +00:00
Leah Rowe ff88cb1ac3 util/nvmutil: further improved errno handling 2022-11-27 00:48:37 +00:00
Leah Rowe b81b51f98b util/nvmutil: remove errant code 2022-11-27 00:39:06 +00:00
Leah Rowe a94bac81f3 util/nvmutil: improved error handling 2022-11-27 00:27:07 +00:00
Leah Rowe 55a951a718 util/nvmutil: fix off by one bug 2022-11-26 23:50:04 +00:00
Leah Rowe 0108615f37 nvmutil copy/swap: actually set nvmPartModified 2022-11-26 23:48:01 +00:00
Leah Rowe 82300f4f1e util/nvmutil: move cmd copy to own function 2022-11-26 23:42:45 +00:00
Leah Rowe ddf3b76c83 util/nvmutil: move cmd swap to own function 2022-11-26 23:34:13 +00:00
Leah Rowe c2ed251ca6 util/nvmutil: move cmd brick to own function 2022-11-26 23:29:41 +00:00
Leah Rowe eaad16edad util/nvmutil: cmd setchecksum in own function 2022-11-26 23:25:23 +00:00
Leah Rowe cea1beeac5 util/nvmutil: split "dump" into smaller functions 2022-11-26 23:19:57 +00:00
Leah Rowe 59e4f560d6 Merge branch 'dev' of shmalebx9/lbmk into master 2022-11-26 21:22:06 +00:00
shmalebx9 99652baa96 fix injection script 2022-11-26 12:56:31 -07:00
shmalebx9 175b48a4e0 added more checks and optimised extraction script 2022-11-26 12:56:31 -07:00
Leah Rowe 0ae00e881e util/nvmutil: re-factor to reduce code indentation 2022-11-26 11:26:07 +00:00
Leah Rowe 0bbd4f1f26 util/nvmutil: write gbe files in a function
in any C program, main() should not contain detailed logic.

ideally, the main() function should only be a skeleton, showing
the overall logic flow of the program. split writing gbe files
into a separate function, to satisfy this criteria.
2022-11-26 11:03:04 +00:00
Leah Rowe b0f9f47e9a util/nvmutil: human-friendly exit messages, part 2 2022-11-26 10:35:10 +00:00
Leah Rowe e35a33d562 Merge branch 'qemu' of shmalebx9/lbmk into master 2022-11-24 19:10:29 +00:00
Leah Rowe e1bbdadc95 build/roms: remove seabios_grubfirst logic
the intended use-case scenario was one in which vga rom initialisation
would be used, on desktop configurations, but without coreboot itself
handling vga rom initialisation, instead leaving that task to seabios

it was assumed that grub, when running on the bare metal with
build option "--with-platform=coreboot" would be able to display
like this, but it is not so when tested

in such setups (add-on gpu with grub payload), it is necessary to
extract the video bios and insert it into the coreboot rom, having
coreboot handle such execution. this is beyond the scope of lbmk,
in context of automated building, because we cannot reliably predict
things such as PCI IDs

do away with this build option entirely, for it does not serve the
intended purpose. it will be necessary to run PC GRUB instead (build
option --with-platform=i386-pc). PC GRUB can still read from CBFS,
and you could provide it as a floppy image file inside CBFS for
SeaBIOS to execute. in this setup, GRUB would function as originally
intended by the seabios_withgrub option; such a configuration is
referred to as "SeaGRUB" by the libreboot project, and experimentation
was done with it in the past, to no avail

it's better to keep things simple, in the libreboot project. simpler
for users, that is
2022-11-22 22:45:18 +00:00
shmalebx9 b2c71747cd make gitcheck verify coreboot subdir 2022-11-20 19:42:31 -07:00
shmalebx9 1246c3adb9 add smort failures to blob download script 2022-11-20 14:32:25 -07:00
shmalebx9 da155b3d12 added x86 qemu board based on x230 coreboot config 2022-11-19 13:41:18 -07:00
Leah Rowe 7629dfb8af remove duplicate patch causing build error 2022-11-19 20:11:35 +00:00
Leah Rowe ca45a60ff2 bump grub revision to latest upstream
gnulib too

gnulib...
2022-11-19 16:54:16 +00:00
Leah Rowe c1c76a05f5 dependencies/arch: notice about unifont dependency 2022-11-19 15:31:25 +00:00
Leah Rowe 43196abc5d also fix crossgcc on cros/fhd coreboot trees 2022-11-19 14:56:54 +00:00
Leah Rowe f063190889 cros devices: use a common coreboot tree 2022-11-19 05:07:54 +00:00
Leah Rowe 24a866baea remove kfsn4-dre, kcma-d8 and kgpe-d16
buggy, buggy, buggy, buggy, buggy, buggy, buggy

full of bugs, these boards never worked properly. i got ripped
off with these.

now i'm ripping off the band aid

use dasharo if you want d16 stuff. i'm done with it.
2022-11-19 03:51:59 +00:00
Leah Rowe f5b4eb3f1e update gitignore 2022-11-19 03:49:24 +00:00
Leah Rowe 60793c552f fix gnat build issue on coreboot repositories
backported from newer coreboot revisions, see patch

coreboot/default/patches/0014-coreboot-default-fix-crossgcc-build.patch
2022-11-19 03:33:38 +00:00
Leah Rowe 6114c34988 add innoextract to federa dependency script 2022-11-19 03:29:40 +00:00
Leah Rowe 5ec5d0eae3 ditto others 2022-11-19 03:28:58 +00:00
Leah Rowe 551e845e56 ditto debian script 2022-11-19 03:28:33 +00:00
Leah Rowe f896bb8431 remove stupid flags from arch dependency script 2022-11-19 03:28:09 +00:00
Leah Rowe 5a01e98d3c build/dependencies/*: remove python2
python2 is eol and the only thing that needed it was build scripts
inside tianocore, back in osbmk days when tianocore was supported
in the (osboot) build system. nothing else requires it, so chuck it
2022-11-19 00:45:00 +00:00
Leah Rowe 6c12afa996 util/nvmutil: more human-friendly exit messages 2022-11-18 20:07:13 +00:00
Leah Rowe 501745630b fix part 1 checksum in t440p gbe.bin
i used "copy 0" in nvmutil to do this

the error people saw in nvmutil was benign. i'm literally
doing this just to prevent more errant user reports.
2022-11-18 19:42:26 +00:00
Leah Rowe a7b8d0cf0d update .gitignore 2022-11-17 12:08:06 +00:00
Leah Rowe b3b3642fe2 assimilate nvmutil 2022-11-17 12:07:09 +00:00
Leah Rowe 8740404e4e make background splash screen purple
to match the assimilated osboot, which had purple colours
2022-11-16 00:02:03 +00:00
Leah Rowe 3f12ef8530 bonerfix 2022-11-15 10:21:57 +00:00
Leah Rowe cf945dda0c blobs/inject: use nvmutil, not nvmutils 2022-11-14 10:26:46 +00:00
Leah Rowe 2589d367cc update the README 2022-11-14 10:11:54 +00:00
Leah Rowe 7af9953463 pragmatic system distribution guideline compliance
osboot is now part of libreboot, and will soon shut down.
libreboot now conforms to osboot policy.
2022-11-14 00:51:12 +00:00
Leah Rowe b5c25efed4 Merge branch 'u-boot-chromebooks' of alpernebbi/lbmk into master 2022-11-11 21:38:12 +00:00
Alper Nebi Yasak 61ac6c3f0b u-boot: Add peach pi chromebook configs
This adds U-Boot configuration for the Samsung Chromebook 2 13", also
known as "peach-pi" in the U-Boot upstream defconfigs. It uses the
shared tree for the "peach" baseboard. The config is almost the same as
upstream defconfig, but with REMAKE_ELF and POSITION_INDEPENDENT
enabled.

Untested since I don't have the peach pi chromebook. Note the there
doesn't seem to be any coreboot support for this chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:49:07 +03:00
Alper Nebi Yasak f848eb81e8 coreboot: Add peach pit chromebook configs
This adds coreboot configuration for the Samsung Chromebook 2 11", which
is based on the "google/peach_pit" mainboard in upstream coreboot. Also
adds a shared "peach" board directory to share with others having the
same baseboard.

The config is based on the following defconfig:

    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00400000
    CONFIG_UART_FOR_CONSOLE=3
    CONFIG_BOARD_GOOGLE_PEACH_PIT=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the peach pit chromebook. This also fails
without a non-free 3rdparty/blobs/cpu/samsung/exynos5420/bl1.bin blob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:48:37 +03:00
Alper Nebi Yasak e08e3da244 u-boot: Add peach pit chromebook configs
This adds U-Boot configuration for the Samsung Chromebook 2 11", also
known as "peach-pit" in the U-Boot upstream defconfigs. Also adds a
shared "peach" board directory to share with others having the same
baseboard. The config is almost the same as upstream defconfig, but with
REMAKE_ELF and POSITION_INDEPENDENT enabled.

Untested since I don't have the peach pit chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:48:37 +03:00
Alper Nebi Yasak 8584fcc1ea coreboot: Add spring chromebook configs
This adds coreboot configuration for the HP Chromebook 11 G1, which is
part of the "google/daisy" mainboard in upstream coreboot. It uses the
shared tree for the "daisy" baseboard.

The config is based on the following defconfig:

    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00400000
    CONFIG_UART_FOR_CONSOLE=3
    CONFIG_BOARD_GOOGLE_DAISY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_EC_GOOGLE_CHROMEEC_I2C_BUS=0x4
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the spring chromebook. This also fails
without a non-free 3rdparty/blobs/cpu/samsung/exynos5250/bl1.bin blob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:48:21 +03:00
Alper Nebi Yasak f9f5d5fcbd u-boot: Add spring chromebook configs
This adds U-Boot configuration for the HP Chromebook 11 G1, also known
as "spring" in the U-Boot upstream defconfigs. It uses the shared tree
for the "daisy" baseboard. The config is almost the same as upstream
defconfig, but with REMAKE_ELF and POSITION_INDEPENDENT enabled.

Untested since I don't have the spring chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:48:21 +03:00
Alper Nebi Yasak 2dcb7cab72 coreboot: Add snow chromebook configs
This adds coreboot configuration for the Samsung Chromebook - XE303,
which is based on the "google/daisy" mainboard in upstream coreboot.
Also adds a shared "daisy" board directory to share with others having
the same baseboard.

The config is based on the following defconfig:

    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00400000
    CONFIG_UART_FOR_CONSOLE=3
    CONFIG_BOARD_GOOGLE_DAISY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_EC_GOOGLE_CHROMEEC_I2C_BUS=0x4
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the snow chromebook. This also fails without
a non-free 3rdparty/blobs/cpu/samsung/exynos5250/bl1.bin blob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:47:45 +03:00
Alper Nebi Yasak be8bebaa38 u-boot: Add snow chromebook configs
This adds U-Boot configuration for the Samsung Chromebook - XE303, also
known as "snow" in the U-Boot upstream defconfigs. Also adds a shared
"daisy" board directory to share with others having the same baseboard.
The config is almost the same as upstream defconfig, but with REMAKE_ELF
and POSITION_INDEPENDENT enabled.

Untested since I don't have the snow chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:11:09 +03:00
Alper Nebi Yasak c97f8e5c62 coreboot: Add nyan blaze chromebook configs
This adds coreboot configuration for the HP Chromebook 14 G3, which is
based on the "google/nyan_blaze" mainboard in upstream coreboot. It uses
the shared tree for the "nyan" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=4
    CONFIG_BOARD_GOOGLE_NYAN_BLAZE=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_DRIVERS_AS3722_RTC_BUS=4
    CONFIG_DRIVERS_AS3722_RTC_ADDR=0x40
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the nyan blaze chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:53 +03:00
Alper Nebi Yasak 330f985da6 u-boot: Add nyan blaze chromebook configs
This adds U-Boot configuration for the HP Chromebook 14 G3, also known
as "nyan-blaze" but not in the U-Boot upstream defconfigs. Apparently
the "nyan-big" defconfig can also work for this version. It uses the
shared tree for the "nyan" baseboard. The config is almost the same as
upstream defconfig, but with REMAKE_ELF and POSITION_INDEPENDENT
enabled.

Untested since I don't have the nyan blaze chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:53 +03:00
Alper Nebi Yasak ddc695a296 coreboot: Add nyan big chromebook configs
This adds coreboot configuration for the Acer Chromebook 13 (CB5-311,
C810), which is based on the "google/nyan_big" mainboard in upstream
coreboot. Also adds a shared "nyan" board directory to share with
others having the same baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=4
    CONFIG_BOARD_GOOGLE_NYAN_BIG=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_DRIVERS_AS3722_RTC_BUS=4
    CONFIG_DRIVERS_AS3722_RTC_ADDR=0x40
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the nyan big chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:39 +03:00
Alper Nebi Yasak 0d696ee36f u-boot: Add nyan big chromebook configs
This adds U-Boot configuration for the Acer Chromebook 13 (CB5-311,
C810), also known as "nyan_big" in the U-Boot upstream defconfigs. Also
adds a shared "nyan" board directory to share with others having the
same baseboard. The config is almost the same as upstream defconfig, but
with REMAKE_ELF and POSITION_INDEPENDENT enabled.

Untested since I don't have the nyan big chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:39 +03:00
Alper Nebi Yasak 2e0f13d92a coreboot: Add veyron mickey chromebit configs
This adds coreboot configuration for the ASUS Chromebit CS10, which is
based on the "google/veyron_mickey" mainboard in upstream coreboot. It
uses the shared tree for the "veyron" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_MICKEY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the veyron mickey chromebit.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:30 +03:00
Alper Nebi Yasak 330c62ae10 u-boot: Add veyron mickey chromebit configs
This adds U-Boot configuration for the ASUS Chromebit CS10, also known
as "chromebit_mickey" in the U-Boot upstream defconfigs. It uses the
shared tree for the "veyron" baseboard. The config is almost the same as
upstream defconfig, but with REMAKE_ELF and POSITION_INDEPENDENT
enabled.

Untested since I don't have the veyron mickey chromebit.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:30 +03:00
Alper Nebi Yasak f84209ceeb coreboot: Add veyron jerry chromebook configs
This adds coreboot configuration for a few white-label chromebooks which
are based on the "google/veyron" mainboard in upstream coreboot. It uses
the shared tree for the "veyron" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_JERRY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have any of the veyron jerry chromebooks.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:21 +03:00
Alper Nebi Yasak fc7794a12c u-boot: Add veyron jerry chromebook configs
This adds U-Boot configuration for a few white-label chromebooks, known
as "chromebook_jerry" in the U-Boot upstream defconfigs. It uses the
shared tree for the "veyron" baseboard. The config is almost the same as
upstream defconfig, but with REMAKE_ELF and POSITION_INDEPENDENT
enabled.

Untested since I don't have any of the veyron jerry chromebooks.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:21 +03:00
Alper Nebi Yasak bbba94ed8f coreboot: Add veyron minnie chromebook configs
This adds coreboot configuration for the ASUS Chromebook Flip C100PA,
which is based on the "google/veyron" mainboard in upstream coreboot. It
uses the shared tree for the "veyron" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_MINNIE=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the veyron minnie chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:11 +03:00
Alper Nebi Yasak bc47f8cc25 u-boot: Add veyron minnie chromebook configs
This adds U-Boot configuration for the ASUS Chromebook Flip C100PA, also
known as "chromebook_minnie" in the U-Boot upstream defconfigs. It uses
the shared tree for the "veyron" baseboard. The config is almost the
same as upstream defconfig, but with REMAKE_ELF and POSITION_INDEPENDENT
enabled.

Untested since I don't have the veyron minnie chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:11 +03:00
Alper Nebi Yasak 2ed1111d83 coreboot: Add veyron speedy chromebook configs
This adds coreboot configuration for the ASUS Chromebook C201PA, which
is based on the "google/veyron" mainboard in upstream coreboot. Also
adds a shared "veyron" board directory to share with others having the
same baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the veyron speedy chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:57 +03:00
Alper Nebi Yasak fa5535660b u-boot: Add veyron speedy chromebook configs
This adds U-Boot configuration for the ASUS Chromebook C201PA, also
known as "chromebook_speedy" in the U-Boot upstream defconfigs. Also
adds a shared "veyron" board directory to share with others having the
same baseboard. The config is almost the same as upstream defconfig, but
with REMAKE_ELF and POSITION_INDEPENDENT enabled.

Untested since I don't have the veyron speedy chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:57 +03:00
Alper Nebi Yasak 0ae2398061 coreboot: Add bob chromebook configs
This adds coreboot configuration for the ASUS Chromebook Flip C101,
which is based on the "google/gru" mainboard in upstream coreboot. It
uses the shared tree for the "gru" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00800000
    CONFIG_BOARD_GOOGLE_BOB=y
    CONFIG_DRIVER_TPM_SPI_BUS=0x0
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
    CONFIG_PAYLOAD_FIT_SUPPORT=y

Untested since I don't have the bob chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:39 +03:00
Alper Nebi Yasak ff39bba2fa u-boot: Add bob chromebook configs
This adds U-Boot configuration for the ASUS Chromebook Flip C101,
also known as "chromebook_bob" in the U-Boot upstream defconfigs. It
uses the shared tree for the "gru" baseboard.

The config has the following diffconfig from kevin:

    # chromebook_bob instead of chromebook_kevin
     DEFAULT_DEVICE_TREE "rk3399-gru-kevin" -> "rk3399-gru-bob"
     DEFAULT_FDT_FILE "rockchip/rk3399-gru-kevin.dtb" -> "rockchip/rk3399-gru-bob.dtb"
     OF_LIST "rk3399-gru-kevin" -> "rk3399-gru-bob"
     SPL_OF_LIST "rk3399-gru-kevin" -> "rk3399-gru-bob"
     TARGET_CHROMEBOOK_BOB n -> y
     TARGET_CHROMEBOOK_KEVIN y -> n

    # Display resolution is 1280x800, and no need for the big font
     VIDEO_FONT_8X16 n -> y
     VIDEO_FONT_TER16X32 y -> n
     VIDEO_ROCKCHIP_MAX_XRES 2400 -> 1280
     VIDEO_ROCKCHIP_MAX_YRES 1600 -> 800

Untested since I don't have the bob chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:39 +03:00
Alper Nebi Yasak af46cbffe8 coreboot: Add kevin chromebook configs
This adds coreboot configuration for the Samsung Chromebook Plus (v1),
which is based on the "google/gru" mainboard in upstream coreboot. Also
adds a shared "gru" board directory to share with others having the same
baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00800000
    CONFIG_BOARD_GOOGLE_KEVIN=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
    CONFIG_PAYLOAD_FIT_SUPPORT=y

Most things work, but one significant problem is that the board can't power
off properly. It also happens with my manual U-Boot-only builds, but not
when I manually build coreboot with a U-Boot payload. Not sure why it is
happening here as well.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:18 +03:00
Alper Nebi Yasak 3865563551 u-boot: Add kevin chromebook configs
This adds U-Boot configuration for the Samsung Chromebook Plus (v1),
also known as "chromebook_kevin" in the U-Boot upstream defconfigs. Also
adds a shared "gru" board directory to share with others having the same
baseboard.

It uses v2022.07 with some quality-of-life patches. The first one is a
clock adjustment to match coreboot clocks for the video output, the
second one is a series about text cursor support and larger fonts. These
are because the display has a high resolution of 2400x1600 at 12.3".

The config has the following diffconfig from the upstream defconfig for
this board:

    # For chainloading from depthcharge like a payload (RW_LEGACY).
    # Not everything might be necessary, but didn't test without these.
     INIT_SP_RELATIVE n -> y
     LNX_KRNL_IMG_TEXT_OFFSET_BASE 0x00200000 -> 0x18000000
     POSITION_INDEPENDENT n -> y
     SYS_TEXT_BASE 0x00200000 -> 0x18000000
    +SYS_INIT_SP_BSS_OFFSET 524288

    # Higher speeds for eMMC
     MMC_HS200_SUPPORT n -> y
     MMC_HS400_ES_SUPPORT n -> y
     MMC_HS400_SUPPORT n -> y
     MMC_IO_VOLTAGE n -> y
     MMC_SDHCI_SDMA n -> y
     MMC_SPEED_MODE_SET n -> y
    +MMC_UHS_SUPPORT y

    # Build the u-boot.elf to use as a payload
     REMAKE_ELF n -> y

    # Slightly faster video output
     VIDEO_COPY n -> y

    # Larger fonts per the applied series
     VIDEO_FONT_8X16 y -> n
     VIDEO_FONT_TER16X32 n -> y

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-28 17:42:15 +03:00
Alper Nebi Yasak 6d6bd5eee0 build/roms: Rebuild cbutils module before starting coreboot build
In recent coreboot versions, running distclean started to erase the
cbfstool binary we built earlier in the util/cbfstool dir via the
cbutils build script call. The coreboot build puts it in a different
directory, and the roms build script can't find it when trying to add
payloads to the roms. This doesn't make the script fail (because set -e
is stupid like that), and the build appears to succeed if you don't look
close enough to see the "cbfsutil not found" error.

Build the coreboot utils we want at the places we want them after
calling distclean, so that we can actually use cbfsutil and avoid
silently-broken roms with newer coreboot versions.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-28 13:09:52 +03:00
Alper Nebi Yasak 61ede99832 build/roms: Support using U-Boot as a coreboot payload
This enables embedding U-Boot into the coreboot roms as the payload. For
now, the ELF file generated by enabling CONFIG_REMAKE_ELF is used, which
includes the U-Boot binary and the board-specific device-tree file. It
might be better to use the FIT payload support for U-Boot, but that was
reportedly broken and is not tested yet.

Coreboot boards can specify payload_uboot="y" in their board.cfg to
enable building a rom with U-Boot as the payload, which is built from
the U-Boot board with the same name. Boards can further specify a
uboot_config option, to choose which board-specific config file U-Boot
should be built with.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-28 13:09:52 +03:00
Alper Nebi Yasak a69855f7e4 build/roms: Build 32-bit crossgcc for AArch64 as well
The 32-bit ARM cross compiler toolchain is used to build parts of
arm-trusted-firmware needed by AArch64 boards, compile the toolchain for
those boards as well.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-28 13:09:52 +03:00
Alper Nebi Yasak 769f18f2f6 build/roms: Fix building for ARMv7 and AArch64 boards
The code that compiles coreboot crossgcc changes the working directory
to the coreboot directory, and the following code cannot find the lbmk
scripts that it needs to run. Compile ARMv7 and AArch64 cross compilers
in a subshell like in the x86 case so the rest of the script can work.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-28 13:09:52 +03:00
Alper Nebi Yasak 9bfbdb598d scripts: Add helpers to modify and update U-Boot configs
These are almost verbatim copies of coreboot versions, but using
'u-boot' instead of 'coreboot' and 'ub*' instead of 'cb*'.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-28 13:09:52 +03:00
Alper Nebi Yasak 1dc05e4066 build/payload: Add helper script to build U-Boot as payload
This enables building U-Boot for boards which have config files in
resources/u-boot, and copying built files that could be usable to make
coreboot payloads. Right now, there is no such board in this repo.

The most important file here is "u-boot.elf", which is a combination of
the U-Boot binary and the appropriate device-tree file for the board.
Building this needs CONFIG_REMAKE_ELF=y on the U-Boot part, and using
this with CONFIG_PAYLOAD_ELF=y on the coreboot build works fine.

Note that this isn't enough to make U-Boot-only releases, since
low-level prerequisites like arm-trusted-firmware aren't passed in to
the U-Boot build system. Coreboot builds its own copy of TF-A and sets
it up on the board, so using these U-Boot builds as payloads should
still work.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-28 13:09:52 +03:00
Alper Nebi Yasak cf29574165 download: Use shallow clones for big projects
Downloading coreboot and U-Boot takes quite the disk space and bandwith.
We don't need to download entire repos, only the revisions that we are
interested in.

Use the --depth=1 option to only download the files we need. Since the
initial clones may not have our target revision, always try to fetch it.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak ef39e05bb5 download: Allow keeping .git dirs with NODELETE=git
Keeping the git repositories is useful while development, e.g. to avoid
git cloning repositories over and over again while debugging download
scripts. Setting the NODELETE environment variable keeps the blobs and
the git repositories. Allow a slightly finer-tuned version of this where
we can keep only the git-related files by setting the variable to "git".

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 764a439a8c u-boot-libre: Add support for deblobbing U-Boot v2022.07
Add a 'v2022.07' pseudo-board for the U-Boot download script with the
default blobs list, and mark the version as supported in u-boot-libre
release script.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 270272eb61 download/u-boot: Remove .git folders as well
The coreboot download removes .git folders as they still contain the
removed blobs, remove those in the U-Boot version as well.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 820b8e706e download/u-boot: Support running extra commands from board dirs
Although it's unlikely, boards might want to run extra commands after
the board-specific U-Boot directories are prepared. Copy the existing
mechanism for that from the coreboot download script to the U-Boot one.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak eae6b35dab download/u-boot: Support applying patches from board dirs
Boards may need different sets of patches to be applied to their U-Boot
builds, copy the existing mechanism from the coreboot download script to
the U-Boot download script.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 454364ccb8 download/u-boot: Try to update submodules as in coreboot script
The coreboot download script tries to update submodules, since coreboot
does use git submodules to retrieve and compile the projects it depends
on. Although U-Boot doesn't use submodules, try to update them anyway to
match the coreboot download script.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 0aeb69b5ad download/u-boot: Use GitHub mirror as fallback
The coreboot download script uses GitHub as a fallback if the upstream
coreboot is unavailable, use a similar fallback for U-Boot as well.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 7b552bd299 download/u-boot: Support reading tree and revision from board.cfg
Boards may want to specify a board-specific U-Boot revision. At the very
least, pseudo-boards for u-boot-libre releases will need to specify their
U-Boot versions somehow.

Copy the existing mechanism from download/coreboot for specifying
build info with board.cfg files. Specify the commit hash for the
'v2021.07' pseudo-board, and 'master' as the default.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 8dd1a24504 download/u-boot: Prepare files per board instead of per revision
The U-Boot download script is designed to help with releasing
u-boot-libre and it can only prepare a generic U-Boot v2021.07 tree.
However, we will need to build board-specific versions of U-Boot to be
able to use it as a coreboot payload effectively.

As a first step toward that, make the download script prepare per-board
copies of U-Boot v2021.07. Then, add a 'v2021.07' pseudo-board for the
u-boot-libre release script to work on.

The u-boot-libre deblob script hash ends up chaning due to copying my
author attribution from the download script, update its hash.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak d8da9b51e2 .gitignore: Ignore u-boot directory
The "u-boot" directory and its contents are created at build-time,
ignore it in git.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-27 17:35:55 +03:00
Alper Nebi Yasak 22b1db6980 u-boot-libre: Set tar mtime to SOURCE_DATE_EPOCH or @0
The u-boot-libre tarball contents' mtimes are an unconventional value
due to timezone confusion. For reproducibility, timestamps like these
are usually set by a SOURCE_DATE_EPOCH which is respected by both
coreboot and U-Boot. Use it in the u-boot-libre release script as well,
and properly set the mtimes to the Unix epoch when it's not defined.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-25 21:38:05 +03:00
Alper Nebi Yasak 01f61263f8 u-boot-libre: Fix releasing blob list as deblob script
The u-boot-libre release script copies the blobs list into the release
as the deblob script, presumably due to a copy-paste error. Fix it to
correctly copy the generated deblob script.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-25 21:22:04 +03:00
Denis 'GNUtoo' Carikli 89a4c2c61f u-boot-libre: remove nonfree firmware in drivers/dma/MCD_tasks.c
This firmware lack corresponding source code.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
2022-08-25 21:09:01 +03:00
Alper Nebi Yasak f679fbd359 u-boot-libre: Fix reproducability issue due to timezone
The checksums in tests/u-boot-libre.sha512 do not match the tarballs
generated by this script when ran on a different timezone, e.g. UTC+3.
Explicitly specify a timezone for the tar command that makes the
tarballs match the checksums.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-25 21:08:54 +03:00
287 changed files with 36261 additions and 7173 deletions
+70 -19
View File
@@ -1,31 +1,82 @@
#!/usr/bin/env bash
#!/usr/bin/env sh
# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
# SPDX-License-Identifier: GPL-3.0-only
Set_placeholder(){
git config user.name || git config user.name 'osbmkplaceholder'
git config user.email || git config user.email 'placeholder@osbmkplaceholder.com'
git_name="lbmkplaceholder"
git_email="placeholder@lbmkplaceholder.com"
main()
{
if [ $# -gt 0 ]; then
if [ "${1}" = "clean" ]; then
clean > /dev/null 2> /dev/null
else
printf "%s: Unsupported argument\n" $0
exit 1
fi
else
set_placeholders > /dev/null 2> /dev/null
fi
}
Clean(){
if [ "$(git config user.name)" = "osbmkplaceholder" ]; then
set_placeholders()
{
set_git_credentials
# Check coreboot as well to prevent errors during building
if [ ! -d coreboot ]; then
return
fi
for x in coreboot/*; do
if [ ! -d "${x}" ]; then
continue
fi
(
cd "${x}"
set_git_credentials
)
done
}
set_git_credentials()
{
# Check if username and or email is set.
if ! git config user.name || git config user.email ; then
git config user.name \
|| git config user.name "${git_name}"
git config user.email \
|| git config user.email "${git_email}"
fi
}
clean()
{
unset_placeholders
if [ ! -d coreboot ]; then
return
fi
for x in coreboot/*; do
if [ ! -d "${x}" ]; then
continue
fi
(
cd "${x}"
unset_placeholders
)
done
}
unset_placeholders()
{
if [ "$(git config user.name)" = "${git_name}" ]; then
git config --unset user.name
fi
if [ "$(git config user.email)" = "placeholder@osbmkplaceholder.com" ]; then
if [ "$(git config user.email)" = "${git_email}" ]; then
git config --unset user.email
fi
}
Run(){
if [ "${1}" = "clean" ]; then
Clean
else
# Check if username and or email is set.
if ! git config user.name || git config user.email ; then
Set_placeholder
fi
fi
}
Run >/dev/null
main $@
+13 -1
View File
@@ -1,6 +1,16 @@
*~
*.o
/lbmk.err.log
/cbutils/
/pciroms/
/util/e6400-flash-unlock/e6400_flash_unlock
/util/ich9utils/*.bin
/util/ich9utils/demefactory
/util/ich9utils/ich9deblob
/util/ich9utils/ich9show
/util/ich9utils/ich9gen
/TODO
/ich9utils/
/bios_extract/
/tmp/
/payload/
/me_cleaner/
@@ -21,6 +31,7 @@
/grub/
/memtest86plus/
/seabios/
/u-boot/
/bin/
/release/
/descriptors/
@@ -28,3 +39,4 @@
/push
/version
/versiondate
/util/nvmutil/nvm
+22 -10
View File
@@ -1,10 +1,13 @@
#
# Makefile for compatibility purposes
# You can use this, but it's recommended to run build system commands directly
# Makefile for meme purposes
# You can use this, but it just runs lbmk commands.
#
# See docs/maintain/ and docs/git/ for information about the build system
# See docs/maintain/ and docs/git/ for information about the build system:
# https://libreboot.org/docs/maintain/
# https://libreboot.org/docs/build/
#
# Copyright (C) 2020, 2021 Leah Rowe <info@minifree.org>
# Copyright (C) 2020, 2021, 2023 Leah Rowe <info@minifree.org>
# Copyright (C) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -20,10 +23,13 @@
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
.PHONY: all check download modules ich9m-descriptors payloads roms release \
clean crossgcc-clean install-dependencies-ubuntu \
install-dependencies-debian install-dependencies-arch \
install-dependencies-void
.POSIX:
#.PHONY: all check download modules ich9m-descriptors payloads roms release \
# clean crossgcc-clean install-dependencies-ubuntu \
# install-dependencies-debian install-dependencies-arch \
# install-dependencies-void install-dependencies-fedora38 \
# install-dependencies-parabola
all: roms
@@ -55,6 +61,8 @@ clean:
./build clean grub
./build clean memtest86plus
./build clean rom_images
./build clean u-boot
./build clean bios_extract
crossgcc-clean:
./build clean crossgcc
@@ -70,5 +78,9 @@ install-dependencies-arch:
install-dependencies-void:
./build dependencies void
check:
./tests/u-boot-libre
install-dependencies-fedora38:
./build dependencies fedora38
install-dependencies-parabola:
./build dependencies parabola
+77 -106
View File
@@ -1,109 +1,85 @@
Free your BIOS today! GNU GPL style
===================================
Libreboot
=========
Find libreboot documentation at <https://libreboot.org/>
Libreboot is
[freedom-respecting](https://www.gnu.org/philosophy/free-sw.html)
*boot firmware* that initializes the hardware (e.g.
memory controller, CPU, peripherals) in your computer so that software can run.
Libreboot then starts a bootloader to load your operating system. It replaces the
proprietary BIOS/UEFI firmware typically found on a computer. Libreboot is
compatible with specific computer models that use the Intel/AMD x86
architecture. Libreboot works well with GNU+Linux and BSD
operating systems. User support is available
at [\#libreboot](https://webchat.freenode.net/?channels=libreboot) on Freenode
IRC.
Libreboot is a *Free Software* project, but can be considered Open Source.
[The GNU website](https://www.gnu.org/philosophy/open-source-misses-the-point.en.html)
teaches why you should call it Free Software instead; alternatively, you may
call it libre software.
Libreboot uses [coreboot](https://www.coreboot.org/) for hardware initialization.
However, *coreboot* is notoriously difficult to compile and install for most
non-technical users. There are many complicated configuration steps required,
and coreboot by itself is useless; coreboot only handles basic hardware
initialization, and then jumps to a separate *payload* program. The payload
program can be anything, for example a Linux kernel, bootloader (such as
GNU GRUB), UEFI implementation (such as Tianocore) or BIOS implementation
(such as SeaBIOS). While not quite as complicated as building a GNU+Linux
distribution from scratch, it may aswell be as far as most non-technical users
are concerned.
Libreboot solves this problem in a novel way:
Libreboot is a *coreboot distribution* much like Debian is a *GNU+Linux
distribution*. Libreboot provides an *automated build system* that downloads,
patches (where necessary) and compiles coreboot, GNU GRUB, various payloads and
all other software components needed to build a complete, working *ROM image*
that you can install to replace your current BIOS/UEFI firmware, much like a
GNU+Linux distribution (e.g. Debian) provides an ISO image that you can use to
replace your current operating system (e.g. Windows).
Information about who works on Libreboot, and who runs the project, can be
found on the [who page](https://libreboot.org/who.html) page.
The `libreboot` project provides
[libre](https://libreboot.org/freedom-status.html) *boot
firmware* that initializes the hardware (e.g. memory controller, CPU,
peripherals) on specific Intel/AMD x86 and ARM targets, which
then starts a bootloader for your operating system. Linux/BSD are
well-supported. It replaces proprietary BIOS/UEFI firmware. Help is available
via [\#libreboot IRC](https://web.libera.chat/#libreboot)
on [Libera](https://libera.chat/) IRC.
Why use Libreboot?
==================
[Free software](https://www.gnu.org/philosophy/free-sw.html) is important for
the same reason that education is important.
All children and adults alike should be entitled to a good education.
Knowledge begs to be free! In the context of computing, this means that the
source code should be fully available to study, and use in whatever way you
see fit. In the context of computer hardware, this means that
[Right to Repair](https://yewtu.be/watch?v=Npd_xDuNi9k)
should be universal, with full access to documents such as the schematics and
boardview files.
Why should you use *libreboot*?
----------------------------
**[The four freedoms are paramount!](https://www.gnu.org/philosophy/free-sw.html)**
Libreboot gives you freedoms that you otherwise can't get with most other
boot firmware. It's extremely powerful and configurable for many use cases.
You have rights. The right to privacy, freedom of thought, freedom
of speech and the right to read. In the context of computing, that means anyone
can use [free software](https://www.gnu.org/philosophy/free-sw.html). Simply
speaking, free software is software that is under the direct sovereignty of the
user and, more importantly, the collective that is the *community*. Libreboot
is dedicated to the Free Software community, with the aim of making free software
at a *low level* more accessible to non-technical people.
You have rights. The right to privacy, freedom of thought, freedom of speech
and the right to read. In this context, Libreboot gives you these rights.
Your freedom matters.
[Right to repair](https://vid.puffyan.us/watch?v=Npd_xDuNi9k) matters.
Many people use proprietary (non-libre)
boot firmware, even if they use [a libre OS](https://www.openbsd.org/).
Proprietary firmware often contains backdoors (more info on the FAQ), and it
and can be buggy. The libreboot project was founded in in December 2013,
with the express purpose of making coreboot firmware accessible for
non-technical users.
Many people use [proprietary](https://www.gnu.org/philosophy/proprietary.html)
boot firmware, even if they use GNU+Linux. Non-free boot firmware often
contains backdoors, can be slow and have severe
bugs. Development and support can be abandoned at any time. By contrast,
Libreboot is a free software project, where anyone can contribute or inspect
its code.
The `libreboot` project uses [coreboot](https://www.coreboot.org/) for [hardware
initialisation](https://doc.coreboot.org/getting_started/architecture.html).
Coreboot is notoriously difficult to install for most non-technical users; it
handles only basic initialization and jumps to a separate
[payload](https://doc.coreboot.org/payloads.html) program (e.g.
[GRUB](https://www.gnu.org/software/grub/),
[Tianocore](https://www.tianocore.org/)), which must also be configured.
*The libreboot software solves this problem*; it is a *coreboot distribution* with
an automated build system (named *lbmk*) that builds complete *ROM images*, for
more robust installation. Documentation is provided.
Libreboot is faster, more secure and more reliable than most non-free
firmware. Libreboot provides many advanced features, like encrypted
/boot/, GPG signature checking before booting a Linux kernel and more!
Libreboot gives *you* control over *your* computing.
How does Libreboot differ from coreboot?
========================================
In the same way that *Debian* is a GNU+Linux distribution, `libreboot` is
a *coreboot distribution*. If you want to build a ROM image from scratch, you
otherwise have to perform expert-level configuration of coreboot, GRUB and
whatever other software you need, to prepare the ROM image. With *libreboot*,
you can literally download from Git or a source archive, and run `make`, and it
will build entire ROM images. An automated build system, named `lbmk`
(Libreboot MaKe), builds these ROM images automatically, without any user input
or intervention required. Configuration has already been performed in advance.
If you were to build regular coreboot, without using libreboot's automated
build system, it would require a lot more intervention and decent technical
knowledge to produce a working configuration.
Regular binary releases of `libreboot` provide these
ROM images pre-compiled, and you can simply install them, with no special
knowledge or skill except the ability to follow installation instructions
and run commands BSD/Linux.
Project goals
-------------
=============
- *Recommend and distribute only free software*. Coreboot
distributes certain pieces of proprietary software which is needed
on some systems. Examples can include things like CPU microcode
updates, memory initialization blobs and so on. The coreboot project
sometimes recommends adding more blobs which it does not distribute,
such as the Video BIOS or Intel's *Management Engine*. However, a
lot of dedicated and talented individuals in coreboot work hard to
replace these blobs whenever possible.
- *Support as much hardware as possible!* Libreboot supports less
hardware than coreboot, because most systems from coreboot still
require certain proprietary software to work properly. Libreboot is
an attempt to support as much hardware as possible, without any
proprietary software.
- *Support as much hardware as possible!* Libreboot aims to eventually
have *maintainers* for every board supported by coreboot, at every
point in time.
- *Make coreboot easy to use*. Coreboot is notoriously difficult
to install, due to an overall lack of user-focused documentation
and support. Most people will simply give up before attempting to
install coreboot.
install coreboot. Libreboot's automated build system and user-friendly
installation instructions solves this problem.
Libreboot attempts to bridge this divide by providing a build system
automating much of the coreboot image creation and customization.
Secondly, the project produces documentation aimed at non-technical users.
Thirdly, the project attempts to provide excellent user support via mailing
lists and IRC.
Thirdly, the project attempts to provide excellent user support via IRC.
Libreboot already comes with a payload (GRUB), flashrom and other
needed parts. Everything is fully integrated, in a way where most of
@@ -123,30 +99,25 @@ re-bases on the latest version of coreboot, with the number of custom
patches in use minimized. Tested, *stable* (static) releases are then provided
in Libreboot, based on specific coreboot revisions.
Coreboot is not entirely free software. It has binary blobs in it for some
platforms. What Libreboot does is download several revisions of coreboot, for
different boards, and *de-blob* those coreboot revisions. This is done using
the *linux-libre* deblob scripts, to find binary blobs in coreboot.
How to help
===========
All new coreboot development should be done in coreboot (upstream), not
libreboot! Libreboot is about deblobbing and packaging coreboot in a
user-friendly way, where most work is already done for the user.
You can check bugs listed on
the [bug tracker](https://codeberg.org/libreboot/lbmk/issues).
For example, if you wanted to add a new board to libreboot, you should
add it to coreboot first. Libreboot will automatically receive your code
at a later date, when it updates itself.
If you spot a bug and have a fix, the website has instructions for how to send
patches, and you can also report it. Also, this entire website is
written in Markdown and hosted in a [separate
repository](https://codeberg.org/libreboot/lbwww) where you can send patches.
The deblobbed coreboot tree used in libreboot is referred to as
*coreboot-libre*, to distinguish it as a component of *libreboot*.
Any and all development discussion and user support are all done on the IRC
channel. More information is on the contact page of libreboot.org.
LICENSE FOR THIS README:
GNU Free Documentation License 1.3 as published by the Free Software Foundation,
with no invariant sections, no front cover texts and no back cover texts. If
you wish it, you may use a later version of the GNU Free Documentation License
as published by the Free Software Foundation.
LICENSE FOR THIS README
=======================
Copy of the GNU Free Documentation License v1.3 here:
<https://www.gnu.org/licenses/fdl-1.3.en.html>
It's just a README file. This README file is released under the terms of the
Creative Commons Zero license, version 1.0 of the license, which you can
read here:
Info about Free Software Foundation:
<https://www.fsf.org/>
<https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt>
-111
View File
@@ -1,111 +0,0 @@
#!/usr/bin/env bash
# generic build script, for building components (all of them)
#
# Copyright (C) 2014, 2015, 2020, 2021 Leah Rowe <info@minifree.org>
# Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
# Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
# Copyright (C) 2022, Caleb La Grange <thonkpeasant@protonmail.com>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
./.gitcheck
[ "x${DEBUG+set}" = 'xset' ] && set -v
set -u -e
projectname="$(cat projectname)"
build=./resources/scripts/build
listmodes() {
for mode in "${build}"/*; do
printf '%s\n' "${mode##*/}"
done
}
# Takes exactly one mode as parameter
listoptions() {
for option in "${build}"/"${1}"/*; do
printf '%s\n' "${option##*/}"
done
}
help() {
cat <<- EOF
USAGE: ./build <MODE> <OPTION>
possible values for 'mode':
$(listmodes)
Example: ./build module all
Example: ./build module flashrom [static]
Example: ./build roms withgrub
Example: ./build clean all
Refer to the ${projectname} documentation for more information.
EOF
}
die() {
printf 'Error: %s\n' "${@}" 1>&2
exit 1
}
if [ $# -lt 1 ]; then
die "Wrong number of arguments specified. See './build help'."
fi
mode="${1}"
if [ "${mode}" != "dependencies" ]; then
./resources/scripts/misc/versioncheck
fi
[ "${mode}" = help ] && help && exit 0
if [ $# -gt 1 ]; then
option="${2}"
shift 2
case "${option}" in
list)
printf "Available options for mode '%s':\n\n" "${mode}"
listoptions "${mode}"
;;
all)
for option in $(listoptions "${mode}"); do
"${build}"/"${mode}"/"${option}" $@
done
;;
*)
if [ -d "${build}"/"${mode}"/ ]; then
if [ -f "${build}"/"${mode}"/"${option}" ]; then
"${build}"/"${mode}"/"${option}" $@
else
help
die "Invalid option for '${mode}'. See './build ${mode} list'."
fi
else
help
die "Invalid mode '${mode}'. See './build help'."
fi
esac
else
help
exit 0
fi
./.gitcheck clean
Symlink
+1
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@@ -0,0 +1 @@
lbmk
-119
View File
@@ -1,119 +0,0 @@
#!/usr/bin/env bash
# Generic script for downloading programs used by the build system
#
# Copyright (C) 2014, 2015, 2020, 2021 Leah Rowe <info@minifree.org>
# Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
# Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
# Copyright (C) 2022, Caleb La Grange <thonkpeasant@protonmail.com>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
./.gitcheck
[ "x${DEBUG+set}" = 'xset' ] && set -v
set -u -e
./resources/scripts/misc/versioncheck
# set this when you want to modify each coreboot tree
# for example, you want to test custom patches
# NODELETE= ./download coreboot
deleteblobs="true"
[ "x${NODELETE+set}" = 'xset' ] && deleteblobs="false"
rm -f "build_error"
download=resources/scripts/download
listprograms() {
for program in "${download}"/*; do
printf '%s\n' "${program##*/}"
done
}
help() {
cat <<- EOF
USAGE: ./download <PROGRAM> <OPTIONS>
possible values for 'program':
$(listprograms)
Example: ./download flashrom
Example: ./download coreboot
Some program options allow for additional parameters:
Example: ./download coreboot default
Example: ./download coreboot x60
Each program download script should work without extra paramaters, but
they can use them. For instance, './download coreboot' will download all
coreboot trees by default, but './download coreboot x60' will only download
the coreboot tree required for the target: x60
Each program download script should also accept the --help paramater to
display the usage of the script.
Refer to the documentation for more information.
EOF
}
die() {
printf 'Error: %s\n' "${@}" 1>&2
exit 1
}
if [ $# -lt 1 ]; then
help
die "Please specify arguments."
fi
program="${1}"
shift 1
[ "${program}" = help ] && help && exit 0
if [ "${program}" = "all" ]; then
for downloadProgram in ${download}/*; do
if [ -f "${downloadProgram}" ]; then
if [ "${deleteblobs}" = "false" ]; then
NODELETE= "${downloadProgram}"
else
"${downloadProgram}"
fi
fi
done
exit 0
elif [ ! -f "${download}/${program}" ]; then
help
die "Invalid argument '${program}'. See: './download help'."
fi
if [ $# -lt 1 ]; then
if [ "${deleteblobs}" = "false" ]; then
NODELETE= "${download}/${program}"
else
"${download}/${program}"
fi
else
if [ "${deleteblobs}" = "false" ]; then
NODELETE= "${download}/${program}" $@
else
"${download}/${program}" $@
fi
fi
exit 0
./.gitcheck clean
Symlink
+1
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@@ -0,0 +1 @@
lbmk
Executable
+122
View File
@@ -0,0 +1,122 @@
#!/usr/bin/env sh
# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
# SPDX-License-Identifier: GPL-3.0-only
name=""
revision=""
location=""
url=""
bkup_url=""
tmp_dir=""
main()
{
if [ -z "${1+x}" ]; then
err 'Error: name not set'
fi
name=${1}
read_config
verify_config
clone_project
# clean in case of failure
rm -rf ${tmp_dir} >/dev/null 2>&1 || exit 1
}
read_config()
{
awkstr=" /\{.*${name}.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
while read -r line ; do
set ${line} >/dev/null 2>&1
case ${line} in
rev:*)
revision=${2}
;;
loc:*)
location=${2}
;;
url:*)
url=${2}
;;
bkup_url:*)
bkup_url=${2}
;;
esac
done << EOF
$(eval "awk '${awkstr}' resources/git/revisions")
EOF
}
verify_config()
{
if [ -z "${revision+x}" ]; then
err 'Error: revision not set'
elif [ -z "${location+x}" ]; then
err 'Error: location not set'
elif [ -z "${url+x}" ]; then
err 'Error: url not set'
fi
}
clone_project()
{
tmp_dir=$(mktemp -dt "${name}_XXXXX")
git clone ${url} ${tmp_dir} || git clone ${bkup_url} ${tmp_dir} \
|| err "ERROR: could not download ${name}"
(
cd ${tmp_dir} || exit 1
git reset --hard ${revision} || err "Cannot reset revision"
)
patch_project
if [ -d "${location}" ]; then
rm -Rf ${location} || exit 1
fi
mv ${tmp_dir} ${location} && return 0
printf "ERROR: Could not copy temp file to destination.\n"
err " ${tmp_dir} > ${location} check permissions"
}
patch_project()
{
patchdir="resources/${name}/patches"
for patchfile in ${PWD}/${patchdir}/*.patch ; do
if [ ! -f "${patchfile}" ]; then
continue
fi
(
cd ${tmp_dir} || exit 1
git am ${patchfile} || err "Cannot patch project: $name"
)
done
}
usage()
{
cat <<- EOF
Usage: ./gitclone [name]
Options:
name: Module name as specified in resources/git/revisions
EOF
}
err()
{
printf "${@}\n"
usage
exit 1
}
main $@
Executable
+126
View File
@@ -0,0 +1,126 @@
#!/usr/bin/env sh
# generic script for calling other scripts in lbmk
#
# Copyright (C) 2014,2015,2020,2021,2023 Leah Rowe <info@minifree.org>
# Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
# Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
# Copyright (C) 2022, Caleb La Grange <thonkpeasant@protonmail.com>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
[ "x${DEBUG+set}" = 'xset' ] && set -v
set -u -e
projectname="$(cat projectname)"
buildpath=""
mode=""
option=""
main()
{
if [ "${0##*/}" = "lbmk" ]; then
die "Do not run the lbmk script directly!"
elif [ "${0##*/}" = "download" ]; then
./update module $@ || exit 1
exit 0
elif [ $# -lt 1 ]; then
die "Too few arguments. Try: ${0} help"
fi
buildpath="./resources/scripts/${0##*/}"
mode="${1}"
./.gitcheck
if [ "${mode}" != "dependencies" ]; then
./resources/scripts/misc/versioncheck
fi
if [ "${mode}" = help ]; then
usage $0
exit 0
elif [ $# -lt 2 ]; then
usage $0
exit 0
fi
option="${2}"
shift 2
case "${option}" in
list)
printf "Options for mode '%s':\n\n" ${mode}
listoptions "${mode}"
;;
all)
for option in $(listoptions "${mode}"); do
"${buildpath}/${mode}/${option}" $@
done
;;
*)
if [ ! -d "${buildpath}/${mode}" ]; then
usage $0
die "Invalid mode '${mode}'. Run: ${0} help"
elif [ ! -f "${buildpath}/${mode}/${option}" ]; then
usage $0
printf "Invalid option for '%s'." ${mode}
die "Run: ${0} ${mode} list'."
fi
"${buildpath}/${mode}/${option}" $@ || die "lbmk error"
esac
./.gitcheck clean
}
# Takes exactly one mode as parameter
listoptions()
{
for option in "${buildpath}/${1}/"*; do
printf '%s\n' ${option##*/}
done
}
usage()
{
progname=${0}
cat <<- EOF
USAGE: ${progname} <MODE> <OPTION>
possible values for 'mode':
$(listmodes)
Example: ${progname} module all
Example: ${progname} module flashrom [static]
Example: ${progname} roms withgrub
Example: ${progname} clean all
Refer to ${projectname} documentation for more info.
EOF
}
listmodes()
{
for mode in "${buildpath}"/*; do
printf '%s\n' ${mode##*/}
done
}
die()
{
./.gitcheck clean
printf "Error: %s\n" "${@}" 1>&2
exit 1
}
main $@
-102
View File
@@ -1,102 +0,0 @@
#!/usr/bin/env bash
# generic scripts for modifying configs and such
#
# Copyright (C) 2014, 2015, 2020, 2021 Leah Rowe <info@minifree.org>
# Copyright (C) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
# Copyright (C) 2015, 2016 Klemens Nanni <contact@autoboot.org>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
[ "x${DEBUG+set}" = 'xset' ] && set -v
set -u -e
projectname="$(cat projectname)"
./resources/scripts/misc/versioncheck
modify=./resources/scripts/modify
listmodes() {
for mode in "${modify}"/*; do
printf '%s\n' "${mode##*/}"
done
}
# Takes exactly one mode as parameter
listoptions() {
for option in "${modify}"/"${1}"/*; do
printf '%s\n' "${option##*/}"
done
}
help() {
cat <<- EOF
USAGE: ./modify <MODE> <OPTION>
possible values for 'mode':
$(listmodes)
Example: ./modify coreboot configs
Example: ./modify coreboot configs x60
Refer to the ${projectname} documentation for more information.
EOF
}
die() {
printf 'Error: %s\n' "${@}" 1>&2
exit 1
}
if [ $# -lt 1 ]; then
die "Wrong number of arguments specified. See './modify help'."
fi
mode="${1}"
[ "${mode}" = help ] && help && exit 0
if [ $# -gt 1 ]; then
option="${2}"
shift 2
case "${option}" in
list)
printf "Available options for mode '%s':\n\n" "${mode}"
listoptions "${mode}"
;;
all)
for option in $(listoptions "${mode}"); do
"${modify}"/"${mode}"/"${option}" $@
done
;;
*)
if [ -d "${modify}"/"${mode}"/ ]; then
if [ -f "${modify}"/"${mode}"/"${option}" ]; then
"${modify}"/"${mode}"/"${option}" $@
else
help
die "Invalid option for '${mode}'. See './modify ${mode} list'."
fi
else
help
die "Invalid mode '${mode}'. See './modify help'."
fi
esac
else
help
exit 0
fi
Symlink
+1
View File
@@ -0,0 +1 @@
lbmk
+1 -1
View File
@@ -1 +1 @@
libreboot
censored-libreboot
+42
View File
@@ -0,0 +1,42 @@
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
3rdparty/chromeec/test/legacy_nvmem_dump.h
3rdparty/vboot/tests/futility/data/bios_link_mp.bin
3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
3rdparty/chromeec/third_party/bmi260/accelgyro_bmi260_config_tbin.h
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
3rdparty/vboot/tests/futility/data/bios_link_mp.bin
3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
+4
View File
@@ -0,0 +1,4 @@
cbtree="cros"
arch="spaghettimonster"
cbrevision="8da4bfe5b573f395057fbfb5a9d99b376e25c2a4" # 4.17
romtype="normal"
@@ -0,0 +1,55 @@
From 0d5a5f3ee1ee5d6f757d5877b7adbe9839487ccf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 19 Nov 2022 14:55:01 +0000
Subject: [PATCH 1/1] fix crossgcc build error
---
util/crossgcc/patches/gcc-11.2.0_gnat.patch | 32 ++++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/util/crossgcc/patches/gcc-11.2.0_gnat.patch b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
index 2d7cecee24..c22cec45d0 100644
--- a/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+++ b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
@@ -5,7 +5,37 @@
# Extra flags to pass to recursive makes.
-COMMON_ADAFLAGS= -gnatpg
-+COMMON_ADAFLAGS= -gnatpg -gnatwGUR
++COMMON_ADAFLAGS= -gnatpg -gnatwn
ifeq ($(TREECHECKING),)
CHECKING_ADAFLAGS=
else
+diff -Nurp gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in
+--- gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in 2022-06-03 00:31:57.993273717 +0200
++++ gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in 2022-06-03 00:30:50.214166847 +0200
+@@ -334,6 +334,7 @@ GNAT_ADA_OBJS = \
+ ada/hostparm.o \
+ ada/impunit.o \
+ ada/inline.o \
++ ada/libgnat/i-c.o \
+ ada/libgnat/interfac.o \
+ ada/itypes.o \
+ ada/krunch.o \
+@@ -364,7 +365,10 @@ GNAT_ADA_OBJS = \
+ ada/rtsfind.o \
+ ada/libgnat/s-addope.o \
+ ada/libgnat/s-addima.o \
++ ada/libgnat/s-aotase.o \
+ ada/libgnat/s-assert.o \
++ ada/libgnat/s-atoope.o \
++ ada/libgnat/s-atopri.o \
+ ada/libgnat/s-bitops.o \
+ ada/libgnat/s-carun8.o \
+ ada/libgnat/s-casuti.o \
+@@ -548,6 +552,7 @@ GNATBIND_OBJS = \
+ ada/hostparm.o \
+ ada/init.o \
+ ada/initialize.o \
++ ada/libgnat/i-c.o \
+ ada/libgnat/interfac.o \
+ ada/krunch.o \
+ ada/lib.o \
--
2.25.1
@@ -0,0 +1,38 @@
From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH] Remove warning for coreboot images built without a payload
I added this in upstream to prevent people from accidentally flashing
roms without a payload resulting in a no boot situation, but in
libreboot lbmk handles the payload and thus this warning always comes
up. This has caused confusion and concern so just patch it out.
---
payloads/Makefile.inc | 13 +------------
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
index e735443a76..4f1692a873 100644
--- a/payloads/Makefile.inc
+++ b/payloads/Makefile.inc
@@ -49,16 +49,5 @@ distclean-payloads:
print-repo-info-payloads:
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
-ifeq ($(CONFIG_PAYLOAD_NONE),y)
-files_added:: warn_no_payload
-endif
-
-warn_no_payload:
- printf "\n\t** WARNING **\n"
- printf "coreboot has been built without a payload. Writing\n"
- printf "a coreboot image without a payload to your board's\n"
- printf "flash chip will result in a non-booting system. You\n"
- printf "can use cbfstool to add a payload to the image.\n\n"
-
.PHONY: force-payload coreinfo nvramcui
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
2.40.1
@@ -0,0 +1,28 @@
From 9f52555eac217623ad2edc72492f9ded6a5b538d Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Thu, 22 Jun 2023 16:44:27 +0300
Subject: [PATCH] HACK: Disable coreboot related BL31 features
I don't know why, but removing this BL31 make argument lets gru-kevin
power off properly when shut down from Linux. Needs investigation.
---
src/arch/arm64/Makefile.inc | 3 ---
1 file changed, 3 deletions(-)
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index 6b49743633c3..e1982d92cc5c 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -158,9 +158,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
# Always enable crash reporting, even on a release build
BL31_MAKEARGS += CRASH_REPORTING=1
-# Enable coreboot-specific features like CBMEM console support
-BL31_MAKEARGS += COREBOOT=1
-
# Avoid build/release|build/debug distinction by overriding BUILD_PLAT directly
BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
--
2.40.1
+4 -2
View File
@@ -1,6 +1,8 @@
cbtree="default"
romtype="normal"
arch="x86_64"
payload_grub="y"
payload_grub_withseabios="y"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -107,24 +111,24 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Intel"
CONFIG_CBFS_SIZE=0x00100000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=4
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x4000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
@@ -139,6 +143,9 @@ CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
# CONFIG_BOARD_INTEL_ADLRVP_M is not set
# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_N is not set
# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
@@ -162,8 +169,6 @@ CONFIG_BOARD_INTEL_D510MO=y
# CONFIG_BOARD_INTEL_GALILEO is not set
# CONFIG_BOARD_INTEL_GLKRVP is not set
# CONFIG_BOARD_INTEL_HARCUVAR is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
# CONFIG_BOARD_INTEL_KBLRVP3 is not set
@@ -173,6 +178,8 @@ CONFIG_BOARD_INTEL_D510MO=y
# CONFIG_BOARD_INTEL_KUNIMITSU is not set
# CONFIG_BOARD_INTEL_LEAFHILL is not set
# CONFIG_BOARD_INTEL_MINNOW3 is not set
# CONFIG_BOARD_INTEL_MTLRVP_P is not set
# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
@@ -180,12 +187,17 @@ CONFIG_BOARD_INTEL_D510MO=y
# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
# CONFIG_BOARD_INTEL_WTM2 is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -217,29 +229,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x80000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -248,9 +260,8 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
# CPU
#
CONFIG_CPU_INTEL_MODEL_106CX=y
CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -263,36 +274,35 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SERIALIZED_SMM_INITIALIZATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_PINEVIEW=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,10 +320,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -333,17 +343,16 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -354,6 +363,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -371,13 +381,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -404,12 +427,17 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -421,6 +449,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -465,6 +499,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -475,6 +510,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -501,28 +538,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -547,15 +562,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_NO_CBFS_MCACHE=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
+2
View File
@@ -5,3 +5,5 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -107,24 +111,24 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Intel"
CONFIG_CBFS_SIZE=0x01000000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=4
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x4000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
@@ -139,6 +143,9 @@ CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
# CONFIG_BOARD_INTEL_ADLRVP_M is not set
# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_N is not set
# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
@@ -162,8 +169,6 @@ CONFIG_BOARD_INTEL_D510MO=y
# CONFIG_BOARD_INTEL_GALILEO is not set
# CONFIG_BOARD_INTEL_GLKRVP is not set
# CONFIG_BOARD_INTEL_HARCUVAR is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
# CONFIG_BOARD_INTEL_KBLRVP3 is not set
@@ -173,6 +178,8 @@ CONFIG_BOARD_INTEL_D510MO=y
# CONFIG_BOARD_INTEL_KUNIMITSU is not set
# CONFIG_BOARD_INTEL_LEAFHILL is not set
# CONFIG_BOARD_INTEL_MINNOW3 is not set
# CONFIG_BOARD_INTEL_MTLRVP_P is not set
# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
@@ -180,12 +187,17 @@ CONFIG_BOARD_INTEL_D510MO=y
# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
# CONFIG_BOARD_INTEL_WTM2 is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -217,29 +229,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x80000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -248,9 +260,8 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
# CPU
#
CONFIG_CPU_INTEL_MODEL_106CX=y
CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_FCBGA559=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -263,36 +274,35 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SERIALIZED_SMM_INITIALIZATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_PINEVIEW=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,10 +320,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -333,17 +343,16 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -354,6 +363,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -371,13 +381,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -404,12 +427,17 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -421,6 +449,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -465,6 +499,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -475,6 +510,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -501,28 +538,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -547,15 +562,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_NO_CBFS_MCACHE=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
-7
View File
@@ -1,7 +0,0 @@
cbtree="default"
romtype="normal"
arch="x86_32"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
payload_memtest="y"
+21
View File
@@ -20,3 +20,24 @@ src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
3rdparty/chromeec/third_party/bmi260/accelgyro_bmi260_config_tbin.h
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_hotplug.c
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_mcdi.c
3rdparty/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
3rdparty/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/rk3368_ddr_reg_resume_V1.05.bin
3rdparty/vboot/tests/futility/data/bios_link_mp.bin
3rdparty/vboot/tests/futility/data/bios_peppy_mp.bin
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c
src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c
src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h
src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h
src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
3rdparty/vboot/tests/futility/data/bios_peppy_dev.bin
+1 -1
View File
@@ -1,4 +1,4 @@
cbtree="default"
romtype="normal"
cbrevision="b2e8bd83647f664260120fdfc7d07cba694dd89e"
cbrevision="e70bc423f9a2e1d13827f2703efe1f9c72549f20"
arch="x86_64"
@@ -1,7 +1,7 @@
From 4df63d823092dc06e3cfc27165a4850b996af90d Mon Sep 17 00:00:00 2001
From 4c5971a6fcf7e948f7df4d0ce2ab0751060cb2ca Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@retroboot.org>
Date: Fri, 19 Mar 2021 05:54:58 +0000
Subject: [PATCH 01/11] apple/macbook21: Set default VRAM to 64MiB instead of
Subject: [PATCH 01/18] apple/macbook21: Set default VRAM to 64MiB instead of
8MiB
---
@@ -19,5 +19,5 @@ index cf1bc4566e..dc0df3b6d6 100644
-gfx_uma_size=8M
+gfx_uma_size=64M
--
2.25.1
2.39.2
@@ -1,7 +1,7 @@
From a43fee19b7a4615aceb9bdf96afda980c106445e Mon Sep 17 00:00:00 2001
From ff523fd40649b72512b0f1253701509d83ca4a8d Mon Sep 17 00:00:00 2001
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
Date: Wed, 27 Oct 2021 13:36:01 +0200
Subject: [PATCH 02/11] add c3 and clockgen to apple/macbook21
Subject: [PATCH 02/18] add c3 and clockgen to apple/macbook21
---
src/mainboard/apple/macbook21/Kconfig | 1 +
@@ -46,10 +46,10 @@ index 13d06f0839..88b8669c61 100644
int get_cst_entries(const acpi_cstate_t **entries)
diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
index bcce778cb1..16025d6fbb 100644
index dd701da7ed..5587c48d1f 100644
--- a/src/mainboard/apple/macbook21/devicetree.cb
+++ b/src/mainboard/apple/macbook21/devicetree.cb
@@ -104,7 +104,13 @@ chip northbridge/intel/i945
@@ -100,7 +100,13 @@ chip northbridge/intel/i945
end
device pci 1f.3 on # SMBUS
subsystemid 0x8086 0x7270
@@ -64,5 +64,5 @@ index bcce778cb1..16025d6fbb 100644
end
end
--
2.25.1
2.39.2
@@ -1,7 +1,7 @@
From 6302d89dfd785330944ad091767c7e7eb8da4aed Mon Sep 17 00:00:00 2001
From fe79712702002bf2044227d6c3cef7ae022e3539 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@osboot.org>
Date: Sun, 3 Jan 2021 03:34:01 +0000
Subject: [PATCH 03/11] lenovo/x60: 64MiB Video RAM changed to default
Subject: [PATCH 03/18] lenovo/x60: 64MiB Video RAM changed to default
(previously it was 8MiB)
---
@@ -19,5 +19,5 @@ index 5c3576d1f3..88170a1aab 100644
-gfx_uma_size=8M
+gfx_uma_size=64M
--
2.25.1
2.39.2
@@ -1,7 +1,7 @@
From f13f10f6b61d0581970a508b626cd63adf607eff Mon Sep 17 00:00:00 2001
From 79440902866bdafeec651476a5a0e51d42b43b21 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@osboot.org>
Date: Mon, 22 Feb 2021 22:16:59 +0000
Subject: [PATCH 04/11] lenovo/t60: make 64MiB VRAM the default in cmos.default
Subject: [PATCH 04/18] lenovo/t60: make 64MiB VRAM the default in cmos.default
---
src/mainboard/lenovo/t60/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index af865f16da..7f03157df7 100644
-gfx_uma_size=8M
+gfx_uma_size=64M
--
2.25.1
2.39.2
@@ -1,7 +1,7 @@
From e3b971134ffc2f52e575efe53a571978ed291dc6 Mon Sep 17 00:00:00 2001
From 73ca2562e77c971c2e581a414dc57b4b9aa544d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:10:33 +0100
Subject: [PATCH 05/11] lenovo/t400: set VRAM to 352MiB VRAM by default
Subject: [PATCH 05/18] lenovo/t400: set VRAM to 352MiB VRAM by default
In the past, this caused stability issues so we set it to 256MiB. Nowadays,
coreboot has fixed the issue preventing this. See:
@@ -23,5 +23,5 @@ index a326e315b1..e74d15d030 100644
-gfx_uma_size=32M
+gfx_uma_size=352M
--
2.25.1
2.39.2
@@ -1,7 +1,7 @@
From 383c273f0c44eec93cd55c3d21d6c1a8316d8dbe Mon Sep 17 00:00:00 2001
From badcbb2f07ac0e3d8b53a23e324f709bf93c3dd5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:11:59 +0100
Subject: [PATCH 06/11] lenovo/x200: set VRAM to 352MiB by default
Subject: [PATCH 06/18] lenovo/x200: set VRAM to 352MiB by default
This fix makes it possible:
https://review.coreboot.org/c/coreboot/+/16831
@@ -20,5 +20,5 @@ index bb4323836e..33a6a69f59 100644
-gfx_uma_size=32M
+gfx_uma_size=352M
--
2.25.1
2.39.2
@@ -1,7 +1,7 @@
From 4f4f957ea967cc94841746821144ee807747f540 Mon Sep 17 00:00:00 2001
From 59e14decddd3a3d0eb9905196df045e34b7ce035 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:18:26 +0100
Subject: [PATCH 07/11] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
Subject: [PATCH 07/18] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
---
src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index 8372032119..3a9a8e2d72 100644
-gfx_uma_size=64M
+gfx_uma_size=352M
--
2.25.1
2.39.2
@@ -1,7 +1,7 @@
From 1ee893f9fc5251968500695824ab9fd39461d318 Mon Sep 17 00:00:00 2001
From 794e082e64558678fe245c86a2c81b4edc582795 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:21:39 +0100
Subject: [PATCH 08/11] acer/g43t-am3: set VRAM to 352MiB by default
Subject: [PATCH 08/18] acer/g43t-am3: set VRAM to 352MiB by default
---
src/mainboard/acer/g43t-am3/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index 706f5dd551..98899e8bf5 100644
-gfx_uma_size=64M
+gfx_uma_size=352M
--
2.25.1
2.39.2
@@ -1,115 +0,0 @@
From 8e8704050aec67490a6d1f272840e5a04ee1bcff Mon Sep 17 00:00:00 2001
From: Rodrigo <rm@firemail.cc>
Date: Mon, 23 Aug 2021 02:20:32 -0300
Subject: [PATCH 09/11] Revert "cpu/intel: Configure IA32_FEATURE_CONTROL for
alternative SMRR"
This rendered at least the x200 unable to reboot.
This reverts commit df7aecd92643d207feaf7fd840f8835097346644.
---
src/cpu/intel/model_1067x/model_1067x_init.c | 3 +++
src/cpu/intel/model_1067x/mp_init.c | 26 --------------------
src/cpu/intel/model_106cx/model_106cx_init.c | 3 +++
src/cpu/intel/model_6ex/model_6ex_init.c | 3 +++
src/cpu/intel/model_6fx/model_6fx_init.c | 3 +++
5 files changed, 12 insertions(+), 26 deletions(-)
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index 3e4de1fa31..ca3ce274fc 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -274,6 +274,9 @@ static void model_1067x_init(struct device *cpu)
/* Initialize the APIC timer */
init_timer();
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states(quad);
diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
index bc53214310..72f40f6762 100644
--- a/src/cpu/intel/model_1067x/mp_init.c
+++ b/src/cpu/intel/model_1067x/mp_init.c
@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
smm_initialize();
}
-#define SMRR_SUPPORTED (1 << 11)
-
static void per_cpu_smm_trigger(void)
{
- msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
- if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
- set_feature_ctrl_vmx();
- msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
- /* We don't care if the lock is already setting
- as our smm relocation handler is able to handle
- setups where SMRR is not enabled here. */
- if (ia32_ft_ctrl.lo & (1 << 0)) {
- /* IA32_FEATURE_CONTROL locked. If we set it again we
- get an illegal instruction. */
- printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
- printk(BIOS_DEBUG, "SMRR status: %senabled\n",
- ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
- } else {
- if (!CONFIG(SET_IA32_FC_LOCK_BIT))
- printk(BIOS_INFO,
- "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
- ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
- wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
- }
- } else {
- set_vmx_and_lock();
- }
-
/* Relocate the SMM handler. */
smm_relocate();
}
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index 278d8dea81..a0917045dd 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -70,6 +70,9 @@ static void model_106cx_init(struct device *cpu)
/* Enable the local CPU APICs */
setup_lapic();
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states();
diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
index 34646ad5e9..36cfd51f01 100644
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
@@ -109,6 +109,9 @@ static void model_6ex_init(struct device *cpu)
/* Enable the local CPU APICs */
setup_lapic();
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states();
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
index 72ece23935..6f2d6ef599 100644
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
@@ -123,6 +123,9 @@ static void model_6fx_init(struct device *cpu)
/* Enable the local CPU APICs */
setup_lapic();
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states();
--
2.25.1
@@ -1,7 +1,7 @@
From c4ab3bd4c88d83ca3ca391519cec31fa7b7a6c2a Mon Sep 17 00:00:00 2001
From 62121b837771b0b05f6490943ff9f1ccaba45bdb Mon Sep 17 00:00:00 2001
From: persmule <persmule@gmail.com>
Date: Sun, 31 Oct 2021 23:33:26 +0000
Subject: [PATCH 11/11] lenovo/t400: Enable all SATA ports
Subject: [PATCH 09/18] lenovo/t400: Enable all SATA ports
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -15,10 +15,10 @@ This patch unmasked all SATA ports found within t400s with factory firmware.
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 670b4883f3..1fc60d9b24 100644
index 1df350ab67..21c8e2c9a1 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -59,8 +59,8 @@ chip northbridge/intel/gm45
@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
register "gpe0_en" = "0x01000000"
register "gpi1_routing" = "2"
@@ -30,5 +30,5 @@ index 670b4883f3..1fc60d9b24 100644
register "sata_traffic_monitor" = "0"
--
2.25.1
2.39.2
@@ -1,63 +0,0 @@
From e6960dec197491941254af48b60f1cf1592bcb2b Mon Sep 17 00:00:00 2001
From: Rodrigo <rm@firemail.cc>
Date: Mon, 23 Aug 2021 03:51:21 -0300
Subject: [PATCH 10/11] Fix missing include
---
src/cpu/intel/model_1067x/model_1067x_init.c | 1 +
src/cpu/intel/model_106cx/model_106cx_init.c | 1 +
src/cpu/intel/model_6ex/model_6ex_init.c | 1 +
src/cpu/intel/model_6fx/model_6fx_init.c | 1 +
4 files changed, 4 insertions(+)
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index ca3ce274fc..cc7a5edca9 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -9,6 +9,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
#include <cpu/intel/smm_reloc.h>
+#include <cpu/intel/common/common.h>
#include "chip.h"
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index a0917045dd..7b88f19ee0 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -8,6 +8,7 @@
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
+#include <cpu/intel/common/common.h>
#define HIGHEST_CLEVEL 3
static void configure_c_states(void)
diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
index 36cfd51f01..793474ffa5 100644
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
@@ -8,6 +8,7 @@
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
+#include <cpu/intel/common/common.h>
#define HIGHEST_CLEVEL 3
static void configure_c_states(void)
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
index 6f2d6ef599..d0031ad741 100644
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
@@ -8,6 +8,7 @@
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
+#include <cpu/intel/common/common.h>
#define HIGHEST_CLEVEL 3
static void configure_c_states(void)
--
2.25.1
@@ -1,36 +0,0 @@
From cb3b04a3849952d8c0fa90616f45cfe5e613a286 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Mar 2022 18:04:55 +0000
Subject: [PATCH 1/1] specifically use python3, in scripts
---
src/drivers/intel/fsp2_0/Makefile.inc | 2 +-
util/spdtool/spdtool.py | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index eaf99d1492..9e82172c9e 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -84,7 +84,7 @@ endif
ifeq ($(CONFIG_FSP_FULL_FD),y)
$(obj)/Fsp_M.fd: $(call strip_quotes,$(CONFIG_FSP_FD_PATH)) $(DOTCONFIG)
- python 3rdparty/fsp/Tools/SplitFspBin.py split -f $(CONFIG_FSP_FD_PATH) -o "$(obj)" -n "Fsp.fd"
+ python3 3rdparty/fsp/Tools/SplitFspBin.py split -f $(CONFIG_FSP_FD_PATH) -o "$(obj)" -n "Fsp.fd"
$(obj)/Fsp_S.fd: $(call strip_quotes,$(CONFIG_FSP_FD_PATH)) $(obj)/Fsp_M.fd
true
diff --git a/util/spdtool/spdtool.py b/util/spdtool/spdtool.py
index 89976eac59..2cd7027377 100644
--- a/util/spdtool/spdtool.py
+++ b/util/spdtool/spdtool.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
# spdtool - Tool for partial deblobbing of UEFI firmware images
# SPDX-License-Identifier: GPL-3.0-or-later
#
--
2.25.1
@@ -0,0 +1,56 @@
From 30d8dd45ab489bed21398b04bd03a54e08eafaf2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Mar 2023 23:55:41 +0000
Subject: [PATCH 18/18] ich9m boards: set 256MB VRAM instead
352MB causes some stability issues reported by a few people
---
src/mainboard/acer/g43t-am3/cmos.default | 2 +-
src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
src/mainboard/lenovo/t400/cmos.default | 2 +-
src/mainboard/lenovo/x200/cmos.default | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/acer/g43t-am3/cmos.default b/src/mainboard/acer/g43t-am3/cmos.default
index 98899e8bf5..e8b45ea22c 100644
--- a/src/mainboard/acer/g43t-am3/cmos.default
+++ b/src/mainboard/acer/g43t-am3/cmos.default
@@ -3,4 +3,4 @@ debug_level=Debug
power_on_after_fail=Disable
nmi=Enable
sata_mode=AHCI
-gfx_uma_size=352M
+gfx_uma_size=256M
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
index 3a9a8e2d72..bedad54d2a 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
@@ -2,4 +2,4 @@ boot_option=Fallback
debug_level=Debug
power_on_after_fail=Enable
nmi=Enable
-gfx_uma_size=352M
+gfx_uma_size=256M
diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default
index e74d15d030..b907a3e2df 100644
--- a/src/mainboard/lenovo/t400/cmos.default
+++ b/src/mainboard/lenovo/t400/cmos.default
@@ -13,4 +13,4 @@ power_management_beeps=Enable
low_battery_beep=Enable
sata_mode=AHCI
hybrid_graphics_mode=Integrated Only
-gfx_uma_size=352M
+gfx_uma_size=256M
diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default
index 33a6a69f59..458b3f19c5 100644
--- a/src/mainboard/lenovo/x200/cmos.default
+++ b/src/mainboard/lenovo/x200/cmos.default
@@ -12,4 +12,4 @@ sticky_fn=Disable
power_management_beeps=Enable
low_battery_beep=Enable
sata_mode=AHCI
-gfx_uma_size=352M
+gfx_uma_size=256M
--
2.39.2
@@ -1,7 +1,7 @@
From 69ae79e6dd11cee4e63e89907177ad199d71d74f Mon Sep 17 00:00:00 2001
From 3cf315fd59f1388d60cce9290eb52bccb7b29625 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Dec 2021 02:53:00 +0000
Subject: [PATCH 1/1] fix speedstep on x200/t400: Revert
Subject: [PATCH 1/2] fix speedstep on x200/t400: Revert
"cpu/intel/model_1067x: enable PECI"
This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
@@ -16,10 +16,10 @@ maintain this revert patch in Libreboot, from now on.
1 file changed, 9 deletions(-)
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index cc7a5edca9..72983eca4f 100644
index 315e7c36fc..1423fd72bc 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -167,8 +167,6 @@ static void configure_emttm_tables(void)
@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
wrmsr(MSR_EMTTM_CR_TABLE(5), msr);
}
@@ -28,7 +28,7 @@ index cc7a5edca9..72983eca4f 100644
static void configure_misc(const int eist, const int tm2, const int emttm)
{
msr_t msr;
@@ -211,13 +209,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
@@ -185,13 +183,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
msr.lo |= (1 << 20); /* Lock Enhanced SpeedStep Enable */
wrmsr(IA32_MISC_ENABLE, msr);
}
@@ -43,5 +43,5 @@ index cc7a5edca9..72983eca4f 100644
#define PIC_SENS_CFG 0x1aa
--
2.25.1
2.40.0
@@ -0,0 +1,173 @@
From 651292a204b00d7a39d8722f9d26fd9d7178fba2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 17 Apr 2023 15:49:57 +0100
Subject: [PATCH 1/1] GM45-type CPUs: don't enable alternative SMRR
This reverts the changes in coreboot revision:
df7aecd92643d207feaf7fd840f8835097346644
While this fix is *technically correct*, the one in
coreboot, it breaks rebooting as tested on several
GM45 ThinkPads e.g. X200, T400, when microcode
updates are not applied.
Since November 2022, Libreboot includes microcode
updates by default, but it tells users how to remove
it from the ROM (with cbfstool) if they wish.
Well, with Libreboot 20221214, 20230319 and 20230413,
mitigations present in Libreboot 20220710 (which did
not have microcode updates) do not exist.
This patch, along with the other patch to remove PECI
support (which breaks speedstep when microcode updates
are not applied) have now been re-added to Libreboot.
It is still best to use microcode updates by default.
These patches in coreboot are not critically urgent,
and you can use the machines with or without them,
regardless of ucode.
I'll probably re-write this and the other patch at
some point, applying the change conditionally upon
whether or not microcode is applied.
Pragmatism is a good thing. I recommend it.
---
src/cpu/intel/model_1067x/model_1067x_init.c | 4 +++
src/cpu/intel/model_1067x/mp_init.c | 26 --------------------
src/cpu/intel/model_106cx/model_106cx_init.c | 4 +++
src/cpu/intel/model_6ex/model_6ex_init.c | 4 +++
src/cpu/intel/model_6fx/model_6fx_init.c | 4 +++
5 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index 1423fd72bc..d1f98ca43a 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -8,6 +8,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
#include <cpu/intel/smm_reloc.h>
+#include <cpu/intel/common/common.h>
#define MSR_BBL_CR_CTL3 0x11e
@@ -234,6 +235,9 @@ static void model_1067x_init(struct device *cpu)
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states(quad);
diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
index bc53214310..72f40f6762 100644
--- a/src/cpu/intel/model_1067x/mp_init.c
+++ b/src/cpu/intel/model_1067x/mp_init.c
@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
smm_initialize();
}
-#define SMRR_SUPPORTED (1 << 11)
-
static void per_cpu_smm_trigger(void)
{
- msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
- if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
- set_feature_ctrl_vmx();
- msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
- /* We don't care if the lock is already setting
- as our smm relocation handler is able to handle
- setups where SMRR is not enabled here. */
- if (ia32_ft_ctrl.lo & (1 << 0)) {
- /* IA32_FEATURE_CONTROL locked. If we set it again we
- get an illegal instruction. */
- printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
- printk(BIOS_DEBUG, "SMRR status: %senabled\n",
- ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
- } else {
- if (!CONFIG(SET_IA32_FC_LOCK_BIT))
- printk(BIOS_INFO,
- "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
- ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
- wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
- }
- } else {
- set_vmx_and_lock();
- }
-
/* Relocate the SMM handler. */
smm_relocate();
}
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index 05f5f327cc..0450c2ad83 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -7,6 +7,7 @@
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
+#include <cpu/intel/common/common.h>
#define HIGHEST_CLEVEL 3
static void configure_c_states(void)
@@ -66,6 +67,9 @@ static void model_106cx_init(struct device *cpu)
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states();
diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
index 5bd1c32815..f3bb08cde3 100644
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
@@ -7,6 +7,7 @@
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
+#include <cpu/intel/common/common.h>
#define HIGHEST_CLEVEL 3
static void configure_c_states(void)
@@ -105,6 +106,9 @@ static void model_6ex_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states();
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
index 535fb8fae7..f7b05facd2 100644
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
@@ -7,6 +7,7 @@
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
+#include <cpu/intel/common/common.h>
#define HIGHEST_CLEVEL 3
static void configure_c_states(void)
@@ -118,6 +119,9 @@ static void model_6fx_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
+ /* Set virtualization based on Kconfig option */
+ set_vmx_and_lock();
+
/* Configure C States */
configure_c_states();
--
2.40.0
@@ -0,0 +1,28 @@
From 521a2edd13050fa39c896bf4f481ff0021c9213e Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sat, 6 May 2023 15:53:41 -0600
Subject: [PATCH] mb/dell/e6400: Enable 01.0 device in devicetree for dGPU
models
Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/e6400/devicetree.cb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
index bb954cbd7b..e9f3915d17 100644
--- a/src/mainboard/dell/e6400/devicetree.cb
+++ b/src/mainboard/dell/e6400/devicetree.cb
@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
ops gm45_pci_domain_ops
device pci 00.0 on end # host bridge
- device pci 01.0 off end
+ device pci 01.0 on end
device pci 02.0 on end # VGA
device pci 02.1 on end # Display
device pci 03.0 on end # ME
--
2.40.1
@@ -0,0 +1,38 @@
From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH] Remove warning for coreboot images built without a payload
I added this in upstream to prevent people from accidentally flashing
roms without a payload resulting in a no boot situation, but in
libreboot lbmk handles the payload and thus this warning always comes
up. This has caused confusion and concern so just patch it out.
---
payloads/Makefile.inc | 13 +------------
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
index e735443a76..4f1692a873 100644
--- a/payloads/Makefile.inc
+++ b/payloads/Makefile.inc
@@ -49,16 +49,5 @@ distclean-payloads:
print-repo-info-payloads:
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
-ifeq ($(CONFIG_PAYLOAD_NONE),y)
-files_added:: warn_no_payload
-endif
-
-warn_no_payload:
- printf "\n\t** WARNING **\n"
- printf "coreboot has been built without a payload. Writing\n"
- printf "a coreboot image without a payload to your board's\n"
- printf "flash chip will result in a non-booting system. You\n"
- printf "can use cbfstool to add a payload to the image.\n\n"
-
.PHONY: force-payload coreinfo nvramcui
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
2.40.1
@@ -0,0 +1,125 @@
From 5c1455495e8d2030473d8194fcf2e1d1111696b7 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Tue, 23 May 2023 20:59:56 -0600
Subject: [PATCH] mb/dell/e6400/acpi: Route Ricoh R5C847 PCI IRQ lines as DBC
Based on the schematic and vendor ASL code, PCI interrupt lines ABC of
the Ricoh R5C847 PC Card/Media Card/FireWire controller are routed DBC.
From lspci and the schematic this chip is PCI device 1. The original
config copied from the T400 was routed ABCD->BCDA, causing Linux to
issue an "irq 18: nobody cared" message when inserting an SD card.
This is fixed by this patch and the SD card now works properly.
Change-Id: Iede1de72d5369f1aebbac170792733739add3431
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75411
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
.../dell/e6400/acpi/ich9_pci_irqs.asl | 85 ++-----------------
1 file changed, 8 insertions(+), 77 deletions(-)
diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
index 21066fbf3b..9a4cdfb75b 100644
--- a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
+++ b/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
@@ -4,87 +4,18 @@
* 0:1e.0 PCI bridge of the ICH9
*/
-/* TODO: which slots are actually relevant? */
If (PICM) {
Return (Package() {
- // PCI Slot 1 routes ABCD
- Package() { 0x0000ffff, 0, 0, 16},
- Package() { 0x0000ffff, 1, 0, 17},
- Package() { 0x0000ffff, 2, 0, 18},
- Package() { 0x0000ffff, 3, 0, 19},
-
- // PCI Slot 2 routes BCDA
- Package() { 0x0001ffff, 0, 0, 17},
- Package() { 0x0001ffff, 1, 0, 18},
- Package() { 0x0001ffff, 2, 0, 19},
- Package() { 0x0001ffff, 3, 0, 16},
-
- // PCI Slot 3 routes CDAB
- Package() { 0x0002ffff, 0, 0, 18},
- Package() { 0x0002ffff, 1, 0, 19},
- Package() { 0x0002ffff, 2, 0, 16},
- Package() { 0x0002ffff, 3, 0, 17},
-
- // PCI Slot 4 routes ABCD
- Package() { 0x0003ffff, 0, 0, 16},
- Package() { 0x0003ffff, 1, 0, 17},
- Package() { 0x0003ffff, 2, 0, 18},
- Package() { 0x0003ffff, 3, 0, 19},
-
- // PCI Slot 5 routes ABCD
- Package() { 0x0004ffff, 0, 0, 16},
- Package() { 0x0004ffff, 1, 0, 17},
- Package() { 0x0004ffff, 2, 0, 18},
- Package() { 0x0004ffff, 3, 0, 19},
-
- // PCI Slot 6 routes BCDA
- Package() { 0x0005ffff, 0, 0, 17},
- Package() { 0x0005ffff, 1, 0, 18},
- Package() { 0x0005ffff, 2, 0, 19},
- Package() { 0x0005ffff, 3, 0, 16},
-
- // FIXME: what's this supposed to mean? (adopted from ich7)
- //Package() { 0x0008ffff, 0, 0, 20},
+ // PCI Device 1, Ricoh R5C847 routes DBC
+ Package() { 0x0001ffff, 0, 0, 19},
+ Package() { 0x0001ffff, 1, 0, 17},
+ Package() { 0x0001ffff, 2, 0, 18},
})
} Else {
Return (Package() {
- // PCI Slot 1 routes ABCD
- Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
- Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
-
- // PCI Slot 2 routes BCDA
- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKD, 0},
- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
-
- // PCI Slot 3 routes CDAB
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKD, 0},
- Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKA, 0},
- Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKB, 0},
-
- // PCI Slot 4 routes ABCD
- Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
- Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0003ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
-
- // PCI Slot 5 routes ABCD
- Package() { 0x0004ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
- Package() { 0x0004ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0004ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0004ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
-
- // PCI Slot 6 routes BCDA
- Package() { 0x0005ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
- Package() { 0x0005ffff, 1, \_SB.PCI0.LPCB.LNKC, 0},
- Package() { 0x0005ffff, 2, \_SB.PCI0.LPCB.LNKD, 0},
- Package() { 0x0005ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
-
- // FIXME
- // Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
+ // PCI Device 1, Ricoh R5C847 routes DBC
+ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKD, 0},
+ Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
+ Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
})
}
--
2.41.0
@@ -0,0 +1,157 @@
From 6490aad9a1095c837a13cf3002cd4f7340267964 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 8 Jul 2023 20:33:59 +0100
Subject: [PATCH 1/1] never add cpu microcode updates
we do it at the source.
this way, we can just leave the default option
enabled in coreboot configs, which is to include
the microcode updates.
however, this patch to the coreboot build system
will result in the default setting being ignored.
simply put: no action will be taken.
no microcode updates will ever be inserted.
this combined with ommitting --checkout in
the submodule update command, should result reliably
in no-microcode roms being the only reality in this
version of coreboot, at least on intel machines.
amd is another matter (for d8 and d16, the solution was/is
to just patch the coreboot code to not add them - which actually
is exactly the same as this change)
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/cpu/Makefile.inc | 59 -----------------------
src/cpu/intel/fit/Makefile.inc | 33 -------------
src/soc/amd/common/block/cpu/Makefile.inc | 1 -
3 files changed, 93 deletions(-)
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index 12c682d43d..6be29bc942 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -8,62 +8,3 @@ subdirs-y += ti
subdirs-$(CONFIG_ARCH_X86) += x86
subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86
subdirs-$(CONFIG_CPU_POWER9) += power9
-
-$(eval $(call create_class_compiler,cpu_microcode,x86_32))
-################################################################################
-## Rules for building the microcode blob in CBFS
-################################################################################
-
-cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin
-
-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
-cbfs-files-y += cpu_microcode_blob.bin
-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin
-
-$(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER_FILES))
- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\""
- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES)
-endif
-
-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y)
-$(obj)/cpu_microcode_blob.bin: cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
-endif
-# otherwise `cpu_microcode_bins` should be filled by platform makefiles
-
-# We just mash all microcode binaries together into one binary to rule them all.
-# This approach assumes that the microcode binaries are properly padded, and
-# their headers specify the correct size. This works fairly well on isolatied
-# updates, such as Intel and some AMD microcode, but won't work very well if the
-# updates are wrapped in a container, like AMD's microcode update container. If
-# there is only one microcode binary (i.e. one container), then we don't have
-# this issue, and this rule will continue to work.
-$(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins)) $(DOTCONFIG)
- for bin in $(cpu_microcode_bins); do \
- if [ ! -f "$$bin" ]; then \
- echo "Microcode error: $$bin does not exist"; \
- NO_MICROCODE_FILE=1; \
- fi; \
- done; \
- if [ -n "$$NO_MICROCODE_FILE" ]; then \
- if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \
- echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \
- fi; \
- false; \
- fi
- $(if $(cpu_microcode_bins),,false) # fail if no file is given at all
- @printf " MICROCODE $(subst $(obj)/,,$(@))\n"
- @echo $(cpu_microcode_bins)
- cat $(cpu_microcode_bins) > $@
-
-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
-cpu_microcode_blob.bin-type := microcode
-# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
-ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
-cpu_microcode_blob.bin-align := 64
-else
-cpu_microcode_blob.bin-align := 16
-endif
-
-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
-cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
-endif
diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc
index d3f12e43e6..10d1c7c1fe 100644
--- a/src/cpu/intel/fit/Makefile.inc
+++ b/src/cpu/intel/fit/Makefile.inc
@@ -16,36 +16,3 @@ $(call add_intermediate, set_fit_ptr, $(IFITTOOL))
$(IFITTOOL) -f $< -F -n intel_fit -r COREBOOT -c
FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG))
-
-ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock
-
-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
-
-$(call add_intermediate, add_mcu_fit, set_fit_ptr $(IFITTOOL))
- @printf " UPDATE-FIT Microcode\n"
- $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
-
-# Second FIT in TOP_SWAP bootblock
-ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
-
-$(call add_intermediate, set_ts_fit_ptr, $(IFITTOOL))
- @printf " UPDATE-FIT Top Swap: set FIT pointer to table\n"
- $(IFITTOOL) -f $< -F -n intel_fit_ts -r COREBOOT $(TS_OPTIONS)
-
-$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr $(IFITTOOL))
- @printf " UPDATE-FIT Top Swap: Microcode\n"
-ifneq ($(FIT_ENTRY),)
- $(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
-endif # FIT_ENTRY
- $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
-
-cbfs-files-y += intel_fit_ts
-intel_fit_ts-file := fit_table.c:struct
-intel_fit_ts-type := intel_fit
-intel_fit_ts-align := 16
-
-endif # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK
-
-endif # CONFIG_CPU_MICROCODE_CBFS_NONE
-
-endif # CONFIG_UPDATE_IMAGE
diff --git a/src/soc/amd/common/block/cpu/Makefile.inc b/src/soc/amd/common/block/cpu/Makefile.inc
index bd9e8ff88f..6f95b9684c 100644
--- a/src/soc/amd/common/block/cpu/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/Makefile.inc
@@ -6,7 +6,6 @@ ramstage-y += cpu.c
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE),y)
define add-ucode-as-cbfs
-cbfs-files-y += cpu_microcode_$(2).bin
cpu_microcode_$(2).bin-file := $(1)
cpu_microcode_$(2).bin-type := microcode
--
2.40.1
+10
View File
@@ -0,0 +1,10 @@
cbtree="default"
romtype="4MiB ICH9 IFD NOR flash"
arch="x86_64"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
payload_memtest="y"
grub_scan_disk="ahci"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,121 +93,88 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_DIR="intel/d945gclf"
CONFIG_VGA_BIOS_ID="8086,2772"
CONFIG_MAINBOARD_DIR="dell/e6400"
CONFIG_VGA_BIOS_ID="8086,2a42"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Intel"
CONFIG_CBFS_SIZE=0x01000000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAINBOARD_VENDOR="Dell Inc."
CONFIG_CBFS_SIZE=0x3FD000
CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
CONFIG_MAX_CPUS=4
CONFIG_IRQ_SLOT_COUNT=18
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_BOARD_DELL_E6400=y
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_DCACHE_RAM_SIZE=0x10000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_BOARD_INTEL_ADLRVP_P is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
# CONFIG_BOARD_INTEL_ADLRVP_M is not set
# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
#
# Coffeelake RVP
#
# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
# CONFIG_BOARD_INTEL_D510MO is not set
CONFIG_BOARD_INTEL_D945GCLF=y
# CONFIG_BOARD_INTEL_DCP847SKE is not set
# CONFIG_BOARD_INTEL_DG41WV is not set
# CONFIG_BOARD_INTEL_DG43GT is not set
# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
# CONFIG_BOARD_INTEL_GALILEO is not set
# CONFIG_BOARD_INTEL_GLKRVP is not set
# CONFIG_BOARD_INTEL_HARCUVAR is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
# CONFIG_BOARD_INTEL_KBLRVP3 is not set
# CONFIG_BOARD_INTEL_KBLRVP7 is not set
# CONFIG_BOARD_INTEL_KBLRVP8 is not set
# CONFIG_BOARD_INTEL_KBLRVP11 is not set
# CONFIG_BOARD_INTEL_KUNIMITSU is not set
# CONFIG_BOARD_INTEL_LEAFHILL is not set
# CONFIG_BOARD_INTEL_MINNOW3 is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
# CONFIG_BOARD_INTEL_WTM2 is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
# CONFIG_HAVE_IFD_BIN is not set
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_BOARD_ROMSIZE_KB_512=y
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
CONFIG_COREBOOT_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x01000000
CONFIG_COREBOOT_ROMSIZE_KB=4096
CONFIG_ROM_SIZE=0x00400000
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
@@ -212,6 +183,8 @@ CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
# end of Mainboard
CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# Chipset
#
@@ -219,41 +192,37 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
#
# CPU
#
CONFIG_CPU_INTEL_MODEL_106CX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_CPU_INTEL_MODEL_1067X=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_441=y
CONFIG_CPU_INTEL_SOCKET_P=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -265,6 +234,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -272,62 +242,62 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SERIALIZED_SMM_INITIALIZATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
CONFIG_NORTHBRIDGE_INTEL_GM45=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
#
CONFIG_SUPERIO_SMSC_LPC47M15X=y
#
# Embedded Controllers
#
CONFIG_EC_DELL_MEC5035=y
#
# Intel Firmware
#
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -335,34 +305,39 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_HAVE_EXP_X86_64_SUPPORT=y
# CONFIG_USE_EXP_X86_64_SUPPORT is not set
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
#
CONFIG_VGA_TEXT_FRAMEBUFFER=y
# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
# CONFIG_BOOTSPLASH is not set
# end of Display
CONFIG_PCI=y
@@ -375,13 +350,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -405,14 +393,28 @@ CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
CONFIG_GFX_GMA_DYN_CPU=y
CONFIG_GFX_GMA_GENERATION="G45"
CONFIG_GFX_GMA_PCH="No_PCH"
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -424,6 +426,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -468,6 +476,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -478,6 +487,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -492,14 +503,10 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
CONFIG_HAVE_OPTION_TABLE=y
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
CONFIG_HAVE_MP_TABLE=y
CONFIG_HAVE_PIRQ_TABLE=y
#
# System tables
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -508,28 +515,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -552,17 +537,20 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
# CONFIG_DEBUG_PIRQ is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_RAMSTAGE_ADA=y
CONFIG_RAMSTAGE_LIBHWBASE=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
CONFIG_HWBASE_DIRECT_PCIDEV=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,111 +93,76 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_DIR="intel/d945gclf"
CONFIG_VGA_BIOS_ID="8086,2772"
CONFIG_MAINBOARD_DIR="dell/e6400"
CONFIG_VGA_BIOS_ID="8086,2a42"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Intel"
CONFIG_CBFS_SIZE=0x00080000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAINBOARD_VENDOR="Dell Inc."
CONFIG_CBFS_SIZE=0x3FD000
CONFIG_MAX_CPUS=4
CONFIG_IRQ_SLOT_COUNT=18
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_BOARD_DELL_E6400=y
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_DCACHE_RAM_SIZE=0x10000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_BOARD_INTEL_ADLRVP_P is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
# CONFIG_BOARD_INTEL_ADLRVP_M is not set
# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
#
# Coffeelake RVP
#
# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
# CONFIG_BOARD_INTEL_D510MO is not set
CONFIG_BOARD_INTEL_D945GCLF=y
# CONFIG_BOARD_INTEL_DCP847SKE is not set
# CONFIG_BOARD_INTEL_DG41WV is not set
# CONFIG_BOARD_INTEL_DG43GT is not set
# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
# CONFIG_BOARD_INTEL_GALILEO is not set
# CONFIG_BOARD_INTEL_GLKRVP is not set
# CONFIG_BOARD_INTEL_HARCUVAR is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPU is not set
# CONFIG_BOARD_INTEL_ICELAKE_RVPY is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
# CONFIG_BOARD_INTEL_KBLRVP3 is not set
# CONFIG_BOARD_INTEL_KBLRVP7 is not set
# CONFIG_BOARD_INTEL_KBLRVP8 is not set
# CONFIG_BOARD_INTEL_KBLRVP11 is not set
# CONFIG_BOARD_INTEL_KUNIMITSU is not set
# CONFIG_BOARD_INTEL_LEAFHILL is not set
# CONFIG_BOARD_INTEL_MINNOW3 is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
# CONFIG_BOARD_INTEL_WTM2 is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
# CONFIG_HAVE_IFD_BIN is not set
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_BOARD_ROMSIZE_KB_512=y
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
CONFIG_COREBOOT_ROMSIZE_KB_512=y
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
CONFIG_COREBOOT_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
@@ -202,8 +171,8 @@ CONFIG_COREBOOT_ROMSIZE_KB_512=y
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=512
CONFIG_ROM_SIZE=0x00080000
CONFIG_COREBOOT_ROMSIZE_KB=4096
CONFIG_ROM_SIZE=0x00400000
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
@@ -212,6 +181,8 @@ CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
# end of Mainboard
CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# Chipset
#
@@ -219,41 +190,37 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
#
# CPU
#
CONFIG_CPU_INTEL_MODEL_106CX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_CPU_INTEL_MODEL_1067X=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_441=y
CONFIG_CPU_INTEL_SOCKET_P=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -265,6 +232,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -272,62 +240,62 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SERIALIZED_SMM_INITIALIZATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
CONFIG_NORTHBRIDGE_INTEL_GM45=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
#
CONFIG_SUPERIO_SMSC_LPC47M15X=y
#
# Embedded Controllers
#
CONFIG_EC_DELL_MEC5035=y
#
# Intel Firmware
#
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -335,34 +303,37 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_HAVE_EXP_X86_64_SUPPORT=y
# CONFIG_USE_EXP_X86_64_SUPPORT is not set
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
#
CONFIG_VGA_TEXT_FRAMEBUFFER=y
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
# end of Display
CONFIG_PCI=y
@@ -375,13 +346,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -405,14 +389,28 @@ CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
CONFIG_GFX_GMA_DYN_CPU=y
CONFIG_GFX_GMA_GENERATION="G45"
CONFIG_GFX_GMA_PCH="No_PCH"
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -424,6 +422,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -468,6 +472,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -478,6 +483,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -492,14 +499,10 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
CONFIG_HAVE_OPTION_TABLE=y
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
CONFIG_HAVE_MP_TABLE=y
CONFIG_HAVE_PIRQ_TABLE=y
#
# System tables
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -508,28 +511,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -552,17 +533,20 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
# CONFIG_DEBUG_PIRQ is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_RAMSTAGE_ADA=y
CONFIG_RAMSTAGE_LIBHWBASE=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
CONFIG_HWBASE_DIRECT_PCIDEV=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -19,3 +19,4 @@ src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse.c
+2 -1
View File
@@ -1,8 +1,9 @@
cbtree="fam15h_rdimm"
romtype="normal"
cbrevision="ad983eeec76ecdb2aff4fb47baeee95ade012225"
cbrevision="1c13f8d85c7306213cd525308ee8973e5663a3f8"
arch="x86_64"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="n"
payload_memtest="n"
crossgcc_ada="n"
@@ -0,0 +1,41 @@
From d5dc3f23eb546cf328fdfe1e918afa028fb9cd8c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jul 2023 04:13:52 +0100
Subject: [PATCH 1/1] util/cbfstool Makefile: support distclean
it just does make-clean
this is so that this super-old coreboot revision
interfaces well with lbmk, which runs distclean
on cbfstool (which is supported, on modern cbfstool)
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/cbfstool/Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
index d5321f6959..b8424d7d87 100644
--- a/util/cbfstool/Makefile
+++ b/util/cbfstool/Makefile
@@ -26,7 +26,7 @@ ifittool: $(objutil)/cbfstool/ifittool
cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool
-.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
+.PHONY: distclean clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
clean:
$(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h
$(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj)
@@ -55,6 +55,8 @@ install: all
$(INSTALL) ifittool $(DESTDIR)$(BINDIR)
$(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR)
+distclean: clean
+
ifneq ($(V),1)
.SILENT:
endif
--
2.40.1
@@ -0,0 +1,37 @@
From 4b4b2bdc2cedb3e219c6f90809e5684441b1dafa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jul 2023 04:54:19 +0100
Subject: [PATCH 1/1] crossgcc: patch binutils 2.32 for newer hostcc
tested on debian sid as of 9 July 2023
implicit string declaration
easy peasy
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/crossgcc/patches/binutils-2.32_stringfix.patch | 11 +++++++++++
1 file changed, 11 insertions(+)
create mode 100644 util/crossgcc/patches/binutils-2.32_stringfix.patch
diff --git a/util/crossgcc/patches/binutils-2.32_stringfix.patch b/util/crossgcc/patches/binutils-2.32_stringfix.patch
new file mode 100644
index 0000000000..de27a2752a
--- /dev/null
+++ b/util/crossgcc/patches/binutils-2.32_stringfix.patch
@@ -0,0 +1,11 @@
+diff -u binutils-2.32/gold/errors.h binutils-2.32.patched/gold/errors.h
+--- binutils-2.32/gold/errors.h
++++ binutils-2.32.patched/gold/errors.h
+@@ -24,6 +24,7 @@
+ #define GOLD_ERRORS_H
+
+ #include <cstdarg>
++#include <string>
+
+ #include "gold-threads.h"
+
--
2.40.1
@@ -0,0 +1,108 @@
From 373dd351e374f391c9e2048e5f3e535267a04719 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jul 2023 19:37:39 +0100
Subject: [PATCH 1/1] fix crossgcc/acpica build on newer hostcc
Changes made to acpica/iasl:
remove superfluous YYSTYPE declaration
make LuxBuffer variables static, to avoid warnings
treated as errors about multiple definitions
AcpiGbl_DbOpt_NoRegionSupport - remove this definition
in source/tools/acpiexec/aemain.c because it's already
re-defined by acpiexec. otherwise the linker complains
about multiple definitions
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
.../acpica-unix2-20190703_mitigategcc.patch | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
diff --git a/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
new file mode 100644
index 0000000000..8de47245bd
--- /dev/null
+++ b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
@@ -0,0 +1,76 @@
+From 66b927d923183ff62c9a757fafdeca9d1ac3fa87 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 18:58:11 +0100
+Subject: [PATCH 1/1] fix building on newer hostcc (debian sid tested)
+
+remove superfluous YYSTYPE declaration
+
+make LuxBuffer variables static, to avoid warnings
+treated as errors about multiple definitions
+
+AcpiGbl_DbOpt_NoRegionSupport - remove this definition
+in source/tools/acpiexec/aemain.c because it's already
+re-defined by acpiexec. otherwise the linker complains
+about multiple definitions
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ source/compiler/aslcompiler.l | 1 -
+ source/compiler/dtparser.l | 2 +-
+ source/compiler/prparser.l | 2 +-
+ source/tools/acpiexec/aemain.c | 1 -
+ 4 files changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/source/compiler/aslcompiler.l b/source/compiler/aslcompiler.l
+index 1949b32..a24f028 100644
+--- a/source/compiler/aslcompiler.l
++++ b/source/compiler/aslcompiler.l
+@@ -48,7 +48,6 @@
+
+ #include <stdlib.h>
+ #include <string.h>
+-YYSTYPE AslCompilerlval;
+
+ /*
+ * Generation: Use the following command line:
+diff --git a/source/compiler/dtparser.l b/source/compiler/dtparser.l
+index 6517e52..d35181c 100644
+--- a/source/compiler/dtparser.l
++++ b/source/compiler/dtparser.l
+@@ -100,7 +100,7 @@ NewLine [\n]
+ /*
+ * Local support functions
+ */
+-YY_BUFFER_STATE LexBuffer;
++static YY_BUFFER_STATE LexBuffer;
+
+ /******************************************************************************
+ *
+diff --git a/source/compiler/prparser.l b/source/compiler/prparser.l
+index bcdef14..5a1b848 100644
+--- a/source/compiler/prparser.l
++++ b/source/compiler/prparser.l
+@@ -116,7 +116,7 @@ Identifier [a-zA-Z][0-9a-zA-Z]*
+ /*
+ * Local support functions
+ */
+-YY_BUFFER_STATE LexBuffer;
++static YY_BUFFER_STATE LexBuffer;
+
+
+ /******************************************************************************
+diff --git a/source/tools/acpiexec/aemain.c b/source/tools/acpiexec/aemain.c
+index 58640dd..cd0add6 100644
+--- a/source/tools/acpiexec/aemain.c
++++ b/source/tools/acpiexec/aemain.c
+@@ -84,7 +84,6 @@ BOOLEAN AcpiGbl_VerboseHandlers = FALSE;
+ UINT8 AcpiGbl_RegionFillValue = 0;
+ BOOLEAN AcpiGbl_IgnoreErrors = FALSE;
+ BOOLEAN AcpiGbl_AbortLoopOnTimeout = FALSE;
+-BOOLEAN AcpiGbl_DbOpt_NoRegionSupport = FALSE;
+ UINT8 AcpiGbl_UseHwReducedFadt = FALSE;
+ BOOLEAN AcpiGbl_DoInterfaceTests = FALSE;
+ BOOLEAN AcpiGbl_LoadTestTables = FALSE;
+--
+2.40.1
+
--
2.40.1
@@ -19,3 +19,4 @@ src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h
src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h
src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse.c
+2 -1
View File
@@ -1,8 +1,9 @@
cbtree="fam15h_udimm"
romtype="normal"
cbrevision="ad983eeec76ecdb2aff4fb47baeee95ade012225"
cbrevision="1c13f8d85c7306213cd525308ee8973e5663a3f8"
arch="x86_64"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="n"
payload_memtest="n"
crossgcc_ada="n"
@@ -0,0 +1,41 @@
From d5dc3f23eb546cf328fdfe1e918afa028fb9cd8c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jul 2023 04:13:52 +0100
Subject: [PATCH 1/1] util/cbfstool Makefile: support distclean
it just does make-clean
this is so that this super-old coreboot revision
interfaces well with lbmk, which runs distclean
on cbfstool (which is supported, on modern cbfstool)
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/cbfstool/Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
index d5321f6959..b8424d7d87 100644
--- a/util/cbfstool/Makefile
+++ b/util/cbfstool/Makefile
@@ -26,7 +26,7 @@ ifittool: $(objutil)/cbfstool/ifittool
cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool
-.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
+.PHONY: distclean clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
clean:
$(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h
$(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj)
@@ -55,6 +55,8 @@ install: all
$(INSTALL) ifittool $(DESTDIR)$(BINDIR)
$(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR)
+distclean: clean
+
ifneq ($(V),1)
.SILENT:
endif
--
2.40.1
@@ -0,0 +1,37 @@
From 4b4b2bdc2cedb3e219c6f90809e5684441b1dafa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jul 2023 04:54:19 +0100
Subject: [PATCH 1/1] crossgcc: patch binutils 2.32 for newer hostcc
tested on debian sid as of 9 July 2023
implicit string declaration
easy peasy
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/crossgcc/patches/binutils-2.32_stringfix.patch | 11 +++++++++++
1 file changed, 11 insertions(+)
create mode 100644 util/crossgcc/patches/binutils-2.32_stringfix.patch
diff --git a/util/crossgcc/patches/binutils-2.32_stringfix.patch b/util/crossgcc/patches/binutils-2.32_stringfix.patch
new file mode 100644
index 0000000000..de27a2752a
--- /dev/null
+++ b/util/crossgcc/patches/binutils-2.32_stringfix.patch
@@ -0,0 +1,11 @@
+diff -u binutils-2.32/gold/errors.h binutils-2.32.patched/gold/errors.h
+--- binutils-2.32/gold/errors.h
++++ binutils-2.32.patched/gold/errors.h
+@@ -24,6 +24,7 @@
+ #define GOLD_ERRORS_H
+
+ #include <cstdarg>
++#include <string>
+
+ #include "gold-threads.h"
+
--
2.40.1
@@ -0,0 +1,108 @@
From 373dd351e374f391c9e2048e5f3e535267a04719 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jul 2023 19:37:39 +0100
Subject: [PATCH 1/1] fix crossgcc/acpica build on newer hostcc
Changes made to acpica/iasl:
remove superfluous YYSTYPE declaration
make LuxBuffer variables static, to avoid warnings
treated as errors about multiple definitions
AcpiGbl_DbOpt_NoRegionSupport - remove this definition
in source/tools/acpiexec/aemain.c because it's already
re-defined by acpiexec. otherwise the linker complains
about multiple definitions
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
.../acpica-unix2-20190703_mitigategcc.patch | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
diff --git a/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
new file mode 100644
index 0000000000..8de47245bd
--- /dev/null
+++ b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
@@ -0,0 +1,76 @@
+From 66b927d923183ff62c9a757fafdeca9d1ac3fa87 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 9 Jul 2023 18:58:11 +0100
+Subject: [PATCH 1/1] fix building on newer hostcc (debian sid tested)
+
+remove superfluous YYSTYPE declaration
+
+make LuxBuffer variables static, to avoid warnings
+treated as errors about multiple definitions
+
+AcpiGbl_DbOpt_NoRegionSupport - remove this definition
+in source/tools/acpiexec/aemain.c because it's already
+re-defined by acpiexec. otherwise the linker complains
+about multiple definitions
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ source/compiler/aslcompiler.l | 1 -
+ source/compiler/dtparser.l | 2 +-
+ source/compiler/prparser.l | 2 +-
+ source/tools/acpiexec/aemain.c | 1 -
+ 4 files changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/source/compiler/aslcompiler.l b/source/compiler/aslcompiler.l
+index 1949b32..a24f028 100644
+--- a/source/compiler/aslcompiler.l
++++ b/source/compiler/aslcompiler.l
+@@ -48,7 +48,6 @@
+
+ #include <stdlib.h>
+ #include <string.h>
+-YYSTYPE AslCompilerlval;
+
+ /*
+ * Generation: Use the following command line:
+diff --git a/source/compiler/dtparser.l b/source/compiler/dtparser.l
+index 6517e52..d35181c 100644
+--- a/source/compiler/dtparser.l
++++ b/source/compiler/dtparser.l
+@@ -100,7 +100,7 @@ NewLine [\n]
+ /*
+ * Local support functions
+ */
+-YY_BUFFER_STATE LexBuffer;
++static YY_BUFFER_STATE LexBuffer;
+
+ /******************************************************************************
+ *
+diff --git a/source/compiler/prparser.l b/source/compiler/prparser.l
+index bcdef14..5a1b848 100644
+--- a/source/compiler/prparser.l
++++ b/source/compiler/prparser.l
+@@ -116,7 +116,7 @@ Identifier [a-zA-Z][0-9a-zA-Z]*
+ /*
+ * Local support functions
+ */
+-YY_BUFFER_STATE LexBuffer;
++static YY_BUFFER_STATE LexBuffer;
+
+
+ /******************************************************************************
+diff --git a/source/tools/acpiexec/aemain.c b/source/tools/acpiexec/aemain.c
+index 58640dd..cd0add6 100644
+--- a/source/tools/acpiexec/aemain.c
++++ b/source/tools/acpiexec/aemain.c
+@@ -84,7 +84,6 @@ BOOLEAN AcpiGbl_VerboseHandlers = FALSE;
+ UINT8 AcpiGbl_RegionFillValue = 0;
+ BOOLEAN AcpiGbl_IgnoreErrors = FALSE;
+ BOOLEAN AcpiGbl_AbortLoopOnTimeout = FALSE;
+-BOOLEAN AcpiGbl_DbOpt_NoRegionSupport = FALSE;
+ UINT8 AcpiGbl_UseHwReducedFadt = FALSE;
+ BOOLEAN AcpiGbl_DoInterfaceTests = FALSE;
+ BOOLEAN AcpiGbl_LoadTestTables = FALSE;
+--
+2.40.1
+
--
2.40.1
+4 -2
View File
@@ -1,6 +1,8 @@
cbtree="default"
romtype="normal"
arch="x86_64"
payload_grub="y"
payload_grub_withseabios="y"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -106,23 +110,24 @@ CONFIG_DIMM_SPD_SIZE=256
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Acer"
# CONFIG_BOARD_ACER_VN7_572G is not set
CONFIG_BOARD_ACER_G43T_AM3=y
CONFIG_CBFS_SIZE=0x200000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=4
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfeff8000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -145,10 +150,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -180,30 +187,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=4
CONFIG_PCIEXP_ASPM=y
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
#
# CPU
@@ -213,7 +219,6 @@ CONFIG_CPU_INTEL_MODEL_1067X=y
CONFIG_CPU_INTEL_MODEL_F3X=y
CONFIG_CPU_INTEL_MODEL_F4X=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_LGA775=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -226,6 +231,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -233,28 +239,27 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_CPU_INFO_V2=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_X4X=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -272,10 +277,10 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -305,17 +310,16 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
# CONFIG_USE_EXP_X86_64_SUPPORT is not set
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -327,6 +331,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -345,16 +350,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -385,8 +400,12 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_GMA_ACPI=y
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -396,6 +415,7 @@ CONFIG_GFX_GMA_GENERATION="G45"
CONFIG_GFX_GMA_PCH="No_PCH"
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -407,6 +427,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -450,6 +476,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -460,6 +487,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -486,28 +515,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -532,12 +539,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_RAMSTAGE_ADA=y
@@ -545,6 +550,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
CONFIG_HWBASE_DIRECT_PCIDEV=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
+5 -3
View File
@@ -1,7 +1,9 @@
cbtree="default"
romtype="normal"
arch="x86_64"
payload_grub="y"
payload_grub_withseabios="y"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
payload_memtest="y"
payload_memtest="n"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -106,23 +110,24 @@ CONFIG_DIMM_SPD_SIZE=256
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Acer"
# CONFIG_BOARD_ACER_VN7_572G is not set
CONFIG_BOARD_ACER_G43T_AM3=y
CONFIG_CBFS_SIZE=0x1000000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=4
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfeff8000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -145,10 +150,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -180,30 +187,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=4
CONFIG_PCIEXP_ASPM=y
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
#
# CPU
@@ -213,7 +219,6 @@ CONFIG_CPU_INTEL_MODEL_1067X=y
CONFIG_CPU_INTEL_MODEL_F3X=y
CONFIG_CPU_INTEL_MODEL_F4X=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_LGA775=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -226,6 +231,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -233,28 +239,27 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_CPU_INFO_V2=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_X4X=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -272,10 +277,10 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -305,17 +310,16 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
# CONFIG_USE_EXP_X86_64_SUPPORT is not set
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -327,6 +331,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -345,16 +350,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -385,8 +400,12 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_GMA_ACPI=y
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -396,6 +415,7 @@ CONFIG_GFX_GMA_GENERATION="G45"
CONFIG_GFX_GMA_PCH="No_PCH"
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -407,6 +427,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -450,6 +476,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -460,6 +487,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -486,28 +515,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -532,12 +539,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_RAMSTAGE_ADA=y
@@ -545,6 +550,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
CONFIG_HWBASE_DIRECT_PCIDEV=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
+4 -2
View File
@@ -1,7 +1,9 @@
cbtree="default"
romtype="normal"
arch="x86_64"
payload_grub="y"
payload_grub_withseabios="y"
payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
grub_scan_disk="ata"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
CONFIG_VENDOR_GIGABYTE=y
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_GIGABYTE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -107,21 +111,21 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="GIGABYTE"
CONFIG_CBFS_SIZE=0x00100000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=4
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GIGABYTE"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfeff8000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -142,17 +146,23 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GIGABYTE_GA_D510UD is not set
CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
# CONFIG_BOARD_GIGABYTE_GA_H61M_S2PV is not set
# CONFIG_BOARD_GIGABYTE_GA_H61M_DS2 is not set
# CONFIG_BOARD_GIGABYTE_GA_H61M_DS2V is not set
# CONFIG_BOARD_GIGABYTE_GA_H61MA_D3V is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
# CONFIG_DEBUG_SMI is not set
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -184,30 +194,29 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
CONFIG_PCIEXP_ASPM=y
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -220,7 +229,6 @@ CONFIG_CPU_INTEL_MODEL_1067X=y
CONFIG_CPU_INTEL_MODEL_F3X=y
CONFIG_CPU_INTEL_MODEL_F4X=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_LGA775=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -233,6 +241,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -240,29 +249,28 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_CPU_INFO_V2=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_X4X=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -280,10 +288,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -308,17 +316,16 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
# CONFIG_USE_EXP_X86_64_SUPPORT is not set
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -330,6 +337,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -348,13 +356,26 @@ CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -386,7 +407,11 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_GMA_ACPI=y
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -396,6 +421,7 @@ CONFIG_GFX_GMA_GENERATION="G45"
CONFIG_GFX_GMA_PCH="No_PCH"
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -407,6 +433,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -451,6 +483,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -461,6 +494,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -487,28 +522,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -533,12 +546,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_RAMSTAGE_ADA=y
@@ -546,6 +557,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
CONFIG_HWBASE_DIRECT_PCIDEV=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
+6
View File
@@ -0,0 +1,6 @@
cbtree="cros"
romtype="normal"
arch="AArch64"
payload_uboot="y"
blobs_required="n"
microcode_required="n"
@@ -0,0 +1,875 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_PRERAM_STAGES=y
CONFIG_COMPRESS_BOOTBLOCK=y
CONFIG_INCLUDE_CONFIG_FILE=y
# CONFIG_COLLECT_TIMESTAMPS is not set
# CONFIG_USE_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
# CONFIG_ASAN is not set
CONFIG_NO_STAGE_CACHE=y
# CONFIG_CBMEM_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
# end of General setup
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
CONFIG_VENDOR_GOOGLE=y
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PINE64 is not set
# CONFIG_VENDOR_PORTWELL is not set
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Bob"
CONFIG_MAINBOARD_DIR="google/gru"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Google"
CONFIG_CBFS_SIZE=0x00800000
CONFIG_CONSOLE_SERIAL=y
CONFIG_MAX_CPUS=1
CONFIG_POST_DEVICE=y
CONFIG_UART_FOR_CONSOLE=0
# CONFIG_VBOOT is not set
# CONFIG_CHROMEOS is not set
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
# CONFIG_CONSOLE_POST is not set
CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
CONFIG_SPI_FLASH_WINBOND=y
#
# Asurada
#
# CONFIG_BOARD_GOOGLE_ASURADA is not set
# CONFIG_BOARD_GOOGLE_HAYATO is not set
# CONFIG_BOARD_GOOGLE_SPHERION is not set
#
# Auron
#
# CONFIG_BOARD_GOOGLE_AURON_PAINE is not set
# CONFIG_BOARD_GOOGLE_AURON_YUNA is not set
# CONFIG_BOARD_GOOGLE_BUDDY is not set
# CONFIG_BOARD_GOOGLE_GANDOF is not set
# CONFIG_BOARD_GOOGLE_LULU is not set
# CONFIG_BOARD_GOOGLE_SAMUS is not set
#
# Beltino
#
# CONFIG_BOARD_GOOGLE_MCCLOUD is not set
# CONFIG_BOARD_GOOGLE_MONROE is not set
# CONFIG_BOARD_GOOGLE_PANTHER is not set
# CONFIG_BOARD_GOOGLE_TRICKY is not set
# CONFIG_BOARD_GOOGLE_ZAKO is not set
#
# Brya
#
# CONFIG_BOARD_GOOGLE_AGAH is not set
# CONFIG_BOARD_GOOGLE_ANAHERA is not set
# CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
# CONFIG_BOARD_GOOGLE_BRASK is not set
# CONFIG_BOARD_GOOGLE_BRYA0 is not set
# CONFIG_BOARD_GOOGLE_BRYA4ES is not set
# CONFIG_BOARD_GOOGLE_FELWINTER is not set
# CONFIG_BOARD_GOOGLE_GIMBLE is not set
# CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
# CONFIG_BOARD_GOOGLE_KANO is not set
# CONFIG_BOARD_GOOGLE_NIVVIKS is not set
# CONFIG_BOARD_GOOGLE_NEREID is not set
# CONFIG_BOARD_GOOGLE_PRIMUS is not set
# CONFIG_BOARD_GOOGLE_PRIMUS4ES is not set
# CONFIG_BOARD_GOOGLE_REDRIX is not set
# CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
# CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
# CONFIG_BOARD_GOOGLE_TAEKO is not set
# CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
# CONFIG_BOARD_GOOGLE_TANIKS is not set
# CONFIG_BOARD_GOOGLE_VELL is not set
# CONFIG_BOARD_GOOGLE_VOLMAR is not set
# CONFIG_BOARD_GOOGLE_BANSHEE is not set
# CONFIG_BOARD_GOOGLE_CROTA is not set
# CONFIG_BOARD_GOOGLE_MOLI is not set
# CONFIG_BOARD_GOOGLE_KINOX is not set
# CONFIG_BOARD_GOOGLE_CRAASK is not set
# CONFIG_BOARD_GOOGLE_OSIRIS is not set
# CONFIG_BOARD_GOOGLE_MITHRAX is not set
# CONFIG_BOARD_GOOGLE_KULDAX is not set
#
# Butterfly
#
# CONFIG_BOARD_GOOGLE_BUTTERFLY is not set
#
# Cherry
#
# CONFIG_BOARD_GOOGLE_CHERRY is not set
# CONFIG_BOARD_GOOGLE_DOJO is not set
# CONFIG_BOARD_GOOGLE_TOMATO is not set
#
# Kingler
#
# CONFIG_BOARD_GOOGLE_KINGLER is not set
# CONFIG_BOARD_GOOGLE_STEELIX is not set
#
# Krabby
#
# CONFIG_BOARD_GOOGLE_KRABBY is not set
#
# Cyan
#
# CONFIG_BOARD_GOOGLE_BANON is not set
# CONFIG_BOARD_GOOGLE_CELES is not set
# CONFIG_BOARD_GOOGLE_CYAN is not set
# CONFIG_BOARD_GOOGLE_EDGAR is not set
# CONFIG_BOARD_GOOGLE_KEFKA is not set
# CONFIG_BOARD_GOOGLE_REKS is not set
# CONFIG_BOARD_GOOGLE_RELM is not set
# CONFIG_BOARD_GOOGLE_SETZER is not set
# CONFIG_BOARD_GOOGLE_TERRA is not set
# CONFIG_BOARD_GOOGLE_ULTIMA is not set
# CONFIG_BOARD_GOOGLE_WIZPIG is not set
#
# Daisy
#
# CONFIG_BOARD_GOOGLE_DAISY is not set
#
# Dedede
#
# CONFIG_BOARD_GOOGLE_BOTEN is not set
# CONFIG_BOARD_GOOGLE_DEDEDE is not set
# CONFIG_BOARD_GOOGLE_DRAWCIA is not set
# CONFIG_BOARD_GOOGLE_HABOKI is not set
# CONFIG_BOARD_GOOGLE_MADOO is not set
# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
# CONFIG_BOARD_GOOGLE_LALALA is not set
# CONFIG_BOARD_GOOGLE_MAGOLOR is not set
# CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
# CONFIG_BOARD_GOOGLE_LANTIS is not set
# CONFIG_BOARD_GOOGLE_GALTIC is not set
# CONFIG_BOARD_GOOGLE_SASUKE is not set
# CONFIG_BOARD_GOOGLE_STORO is not set
# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
# CONFIG_BOARD_GOOGLE_KRACKO is not set
# CONFIG_BOARD_GOOGLE_BLIPPER is not set
# CONFIG_BOARD_GOOGLE_CRET is not set
# CONFIG_BOARD_GOOGLE_PIRIKA is not set
# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
# CONFIG_BOARD_GOOGLE_BUGZZY is not set
# CONFIG_BOARD_GOOGLE_CORORI is not set
# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
# CONFIG_BOARD_GOOGLE_GOOEY is not set
# CONFIG_BOARD_GOOGLE_BEADRIX is not set
#
# Drallion
#
# CONFIG_BOARD_GOOGLE_DRALLION is not set
#
# Eve
#
# CONFIG_BOARD_GOOGLE_EVE is not set
#
# Fizz
#
# CONFIG_BOARD_GOOGLE_FIZZ is not set
# CONFIG_BOARD_GOOGLE_KARMA is not set
# CONFIG_BOARD_GOOGLE_ENDEAVOUR is not set
#
# Foster
#
# CONFIG_BOARD_GOOGLE_FOSTER is not set
#
# Gale
#
# CONFIG_BOARD_GOOGLE_GALE is not set
#
# Glados
#
# CONFIG_BOARD_GOOGLE_ASUKA is not set
# CONFIG_BOARD_GOOGLE_CAROLINE is not set
# CONFIG_BOARD_GOOGLE_CAVE is not set
# CONFIG_BOARD_GOOGLE_CHELL is not set
# CONFIG_BOARD_GOOGLE_GLADOS is not set
# CONFIG_BOARD_GOOGLE_LARS is not set
# CONFIG_BOARD_GOOGLE_SENTRY is not set
#
# Gru
#
# CONFIG_BOARD_GOOGLE_KEVIN is not set
# CONFIG_BOARD_GOOGLE_GRU is not set
CONFIG_BOARD_GOOGLE_BOB=y
# CONFIG_BOARD_GOOGLE_SCARLET is not set
# CONFIG_BOARD_GOOGLE_NEFARIO is not set
# CONFIG_BOARD_GOOGLE_RAINIER is not set
#
# Guybrush
#
# CONFIG_BOARD_GOOGLE_GUYBRUSH is not set
# CONFIG_BOARD_GOOGLE_NIPPERKIN is not set
# CONFIG_BOARD_GOOGLE_DEWATT is not set
#
# Hatch
#
# CONFIG_BOARD_GOOGLE_AKEMI is not set
# CONFIG_BOARD_GOOGLE_AMBASSADOR is not set
# CONFIG_BOARD_GOOGLE_DOOLY is not set
# CONFIG_BOARD_GOOGLE_DRATINI is not set
# CONFIG_BOARD_GOOGLE_DUFFY_LEGACY is not set
# CONFIG_BOARD_GOOGLE_DUFFY is not set
# CONFIG_BOARD_GOOGLE_FAFFY is not set
# CONFIG_BOARD_GOOGLE_GENESIS is not set
# CONFIG_BOARD_GOOGLE_HATCH is not set
# CONFIG_BOARD_GOOGLE_HELIOS is not set
# CONFIG_BOARD_GOOGLE_HELIOS_DISKSWAP is not set
# CONFIG_BOARD_GOOGLE_JINLON is not set
# CONFIG_BOARD_GOOGLE_KAISA_LEGACY is not set
# CONFIG_BOARD_GOOGLE_KAISA is not set
# CONFIG_BOARD_GOOGLE_KINDRED is not set
# CONFIG_BOARD_GOOGLE_KOHAKU is not set
# CONFIG_BOARD_GOOGLE_MOONBUGGY is not set
# CONFIG_BOARD_GOOGLE_MUSHU is not set
# CONFIG_BOARD_GOOGLE_NIGHTFURY is not set
# CONFIG_BOARD_GOOGLE_NOIBAT is not set
# CONFIG_BOARD_GOOGLE_PALKIA is not set
# CONFIG_BOARD_GOOGLE_PUFF is not set
# CONFIG_BOARD_GOOGLE_SCOUT is not set
# CONFIG_BOARD_GOOGLE_WYVERN is not set
#
# Herobrine
#
#
# (Herobrine requires 'Allow QC blobs repository')
#
#
# Jecht
#
# CONFIG_BOARD_GOOGLE_GUADO is not set
# CONFIG_BOARD_GOOGLE_JECHT is not set
# CONFIG_BOARD_GOOGLE_RIKKU is not set
# CONFIG_BOARD_GOOGLE_TIDUS is not set
#
# Kahlee
#
# CONFIG_BOARD_GOOGLE_ALEENA is not set
# CONFIG_BOARD_GOOGLE_CAREENA is not set
# CONFIG_BOARD_GOOGLE_GRUNT is not set
# CONFIG_BOARD_GOOGLE_LIARA is not set
# CONFIG_BOARD_GOOGLE_NUWANI is not set
# CONFIG_BOARD_GOOGLE_TREEYA is not set
#
# Kukui
#
# CONFIG_BOARD_GOOGLE_KUKUI is not set
# CONFIG_BOARD_GOOGLE_KRANE is not set
# CONFIG_BOARD_GOOGLE_KODAMA is not set
# CONFIG_BOARD_GOOGLE_KAKADU is not set
# CONFIG_BOARD_GOOGLE_FLAPJACK is not set
# CONFIG_BOARD_GOOGLE_KATSU is not set
#
# Jacuzzi
#
# CONFIG_BOARD_GOOGLE_JACUZZI is not set
# CONFIG_BOARD_GOOGLE_JUNIPER is not set
# CONFIG_BOARD_GOOGLE_KAPPA is not set
# CONFIG_BOARD_GOOGLE_DAMU is not set
# CONFIG_BOARD_GOOGLE_CERISE is not set
# CONFIG_BOARD_GOOGLE_STERN is not set
# CONFIG_BOARD_GOOGLE_WILLOW is not set
# CONFIG_BOARD_GOOGLE_ESCHE is not set
# CONFIG_BOARD_GOOGLE_BURNET is not set
# CONFIG_BOARD_GOOGLE_FENNEL is not set
# CONFIG_BOARD_GOOGLE_COZMO is not set
# CONFIG_BOARD_GOOGLE_MAKOMO is not set
# CONFIG_BOARD_GOOGLE_MUNNA is not set
# CONFIG_BOARD_GOOGLE_PICO is not set
#
# Link
#
# CONFIG_BOARD_GOOGLE_LINK is not set
#
# Mistral
#
# CONFIG_BOARD_GOOGLE_MISTRAL is not set
#
# Nyan
#
# CONFIG_BOARD_GOOGLE_NYAN is not set
#
# Nyan Big
#
# CONFIG_BOARD_GOOGLE_NYAN_BIG is not set
#
# Nyan Blaze
#
# CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set
#
# Oak
#
# CONFIG_BOARD_GOOGLE_OAK is not set
# CONFIG_BOARD_GOOGLE_ELM is not set
# CONFIG_BOARD_GOOGLE_HANA is not set
#
# Octopus
#
# CONFIG_BOARD_GOOGLE_AMPTON is not set
# CONFIG_BOARD_GOOGLE_BLOOG is not set
# CONFIG_BOARD_GOOGLE_BOBBA is not set
# CONFIG_BOARD_GOOGLE_CASTA is not set
# CONFIG_BOARD_GOOGLE_DOOD is not set
# CONFIG_BOARD_GOOGLE_FLEEX is not set
# CONFIG_BOARD_GOOGLE_FOOB is not set
# CONFIG_BOARD_GOOGLE_GARG is not set
# CONFIG_BOARD_GOOGLE_LICK is not set
# CONFIG_BOARD_GOOGLE_MEEP is not set
# CONFIG_BOARD_GOOGLE_OCTOPUS is not set
# CONFIG_BOARD_GOOGLE_PHASER is not set
# CONFIG_BOARD_GOOGLE_YORP is not set
#
# Parrot
#
# CONFIG_BOARD_GOOGLE_PARROT is not set
#
# Peach Pit
#
# CONFIG_BOARD_GOOGLE_PEACH_PIT is not set
#
# Poppy
#
# CONFIG_BOARD_GOOGLE_ATLAS is not set
# CONFIG_BOARD_GOOGLE_POPPY is not set
# CONFIG_BOARD_GOOGLE_NAMI is not set
# CONFIG_BOARD_GOOGLE_NAUTILUS is not set
# CONFIG_BOARD_GOOGLE_NOCTURNE is not set
# CONFIG_BOARD_GOOGLE_RAMMUS is not set
# CONFIG_BOARD_GOOGLE_SORAKA is not set
#
# Rambi
#
# CONFIG_BOARD_GOOGLE_BANJO is not set
# CONFIG_BOARD_GOOGLE_CANDY is not set
# CONFIG_BOARD_GOOGLE_CLAPPER is not set
# CONFIG_BOARD_GOOGLE_ENGUARDE is not set
# CONFIG_BOARD_GOOGLE_GLIMMER is not set
# CONFIG_BOARD_GOOGLE_GNAWTY is not set
# CONFIG_BOARD_GOOGLE_HELI is not set
# CONFIG_BOARD_GOOGLE_KIP is not set
# CONFIG_BOARD_GOOGLE_NINJA is not set
# CONFIG_BOARD_GOOGLE_ORCO is not set
# CONFIG_BOARD_GOOGLE_QUAWKS is not set
# CONFIG_BOARD_GOOGLE_SQUAWKS is not set
# CONFIG_BOARD_GOOGLE_RAMBI is not set
# CONFIG_BOARD_GOOGLE_SUMO is not set
# CONFIG_BOARD_GOOGLE_SWANKY is not set
# CONFIG_BOARD_GOOGLE_WINKY is not set
#
# Reef
#
# CONFIG_BOARD_GOOGLE_REEF is not set
# CONFIG_BOARD_GOOGLE_PYRO is not set
# CONFIG_BOARD_GOOGLE_SAND is not set
# CONFIG_BOARD_GOOGLE_SNAPPY is not set
# CONFIG_BOARD_GOOGLE_CORAL is not set
#
# Sarien
#
# CONFIG_BOARD_GOOGLE_ARCADA is not set
# CONFIG_BOARD_GOOGLE_SARIEN is not set
#
# Skyrim
#
# CONFIG_BOARD_GOOGLE_SKYRIM is not set
#
# Slippy
#
# CONFIG_BOARD_GOOGLE_FALCO is not set
# CONFIG_BOARD_GOOGLE_LEON is not set
# CONFIG_BOARD_GOOGLE_PEPPY is not set
# CONFIG_BOARD_GOOGLE_WOLF is not set
#
# Smaug
#
# CONFIG_BOARD_GOOGLE_SMAUG is not set
#
# Storm
#
# CONFIG_BOARD_GOOGLE_STORM is not set
#
# Stout
#
# CONFIG_BOARD_GOOGLE_STOUT is not set
#
# Trogdor
#
#
# (Trogdor requires 'Allow QC blobs repository')
#
#
# Veyron
#
# CONFIG_BOARD_GOOGLE_VEYRON_JAQ is not set
# CONFIG_BOARD_GOOGLE_VEYRON_JERRY is not set
# CONFIG_BOARD_GOOGLE_VEYRON_MIGHTY is not set
# CONFIG_BOARD_GOOGLE_VEYRON_MINNIE is not set
# CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY is not set
#
# Veyron Mickey
#
# CONFIG_BOARD_GOOGLE_VEYRON_MICKEY is not set
#
# Veyron Rialto
#
# CONFIG_BOARD_GOOGLE_VEYRON_RIALTO is not set
#
# Volteer
#
# CONFIG_BOARD_GOOGLE_DELBIN is not set
# CONFIG_BOARD_GOOGLE_ELDRID is not set
# CONFIG_BOARD_GOOGLE_HALVOR is not set
# CONFIG_BOARD_GOOGLE_LINDAR is not set
# CONFIG_BOARD_GOOGLE_MALEFOR is not set
# CONFIG_BOARD_GOOGLE_TERRADOR is not set
# CONFIG_BOARD_GOOGLE_TODOR is not set
# CONFIG_BOARD_GOOGLE_TRONDO is not set
# CONFIG_BOARD_GOOGLE_VOLTEER is not set
# CONFIG_BOARD_GOOGLE_VOLTEER2 is not set
# CONFIG_BOARD_GOOGLE_VOLTEER2_TI50 is not set
# CONFIG_BOARD_GOOGLE_VOXEL is not set
# CONFIG_BOARD_GOOGLE_ELEMI is not set
# CONFIG_BOARD_GOOGLE_VOEMA is not set
# CONFIG_BOARD_GOOGLE_DROBIT is not set
# CONFIG_BOARD_GOOGLE_COPANO is not set
# CONFIG_BOARD_GOOGLE_COLLIS is not set
# CONFIG_BOARD_GOOGLE_VOLET is not set
# CONFIG_BOARD_GOOGLE_CHRONICLER is not set
#
# Zork
#
# CONFIG_BOARD_GOOGLE_DALBOZ is not set
# CONFIG_BOARD_GOOGLE_VILBOZ is not set
# CONFIG_BOARD_GOOGLE_EZKINIL is not set
# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
# CONFIG_BOARD_GOOGLE_BERKNIP is not set
# CONFIG_BOARD_GOOGLE_WOOMAX is not set
# CONFIG_BOARD_GOOGLE_DIRINBOZ is not set
# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
# CONFIG_BOARD_GOOGLE_GUMBOZ is not set
CONFIG_DRIVER_TPM_SPI_BUS=0x0
CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_DRIVER_TPM_I2C_BUS=0x0
CONFIG_DRIVER_TPM_I2C_ADDR=0x20
CONFIG_PMIC_BUS=-1
CONFIG_BOARD_GOOGLE_GRU_COMMON=y
CONFIG_GRU_HAS_TPM2=y
CONFIG_GRU_HAS_CENTERLOG_PWM=y
CONFIG_GRU_HAS_WLAN_RESET=y
CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_HEAP_SIZE=0x100000
CONFIG_DRIVER_TPM_SPI_CHIP=0
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=8192
CONFIG_ROM_SIZE=0x00800000
# end of Mainboard
#
# Chipset
#
#
# SoC
#
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_ARM64_BL31_EXTERNAL_FILE=""
CONFIG_ARCH_ARMV8_EXTENSION=0
CONFIG_STACK_SIZE=0x0
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_TTYS0_BASE=0x3f8
CONFIG_TTYS0_LCS=3
CONFIG_UART_PCI_ADDR=0x0
CONFIG_GENERIC_UDELAY=y
CONFIG_SOC_ROCKCHIP_RK3399=y
CONFIG_RK3399_SPREAD_SPECTRUM_DDR=y
#
# CPU
#
#
# Northbridge
#
#
# Southbridge
#
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
#
# Super I/O
#
#
# Embedded Controllers
#
CONFIG_EC_SUPPORTS_DPTF_TEVT=y
CONFIG_EC_GOOGLE_CHROMEEC=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0
CONFIG_EC_GOOGLE_CHROMEEC_RTC=y
CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
CONFIG_MAINBOARD_HAS_CHROMEOS=y
#
# ChromeOS
#
# end of ChromeOS
CONFIG_ARCH_ARM64=y
CONFIG_ARCH_BOOTBLOCK_ARM64=y
CONFIG_ARCH_VERSTAGE_ARM64=y
CONFIG_ARCH_ROMSTAGE_ARM64=y
CONFIG_ARCH_RAMSTAGE_ARM64=y
CONFIG_ARCH_BOOTBLOCK_ARMV8_64=y
CONFIG_ARCH_VERSTAGE_ARMV8_64=y
CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
# end of Chipset
#
# Devices
#
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
#
# Display
#
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
# CONFIG_BOOTSPLASH is not set
# end of Display
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATOR_V4=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_ELOG is not set
CONFIG_COMMON_CBFS_SPI_WRAPPER=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_TPM_INIT_RAMSTAGE=y
CONFIG_DRIVERS_UART=y
CONFIG_UART_OVERRIDE_REFCLK=y
CONFIG_DRIVERS_UART_8250MEM=y
CONFIG_DRIVERS_UART_8250MEM_32=y
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_INTEL_GMA_OPREGION_2_0=y
CONFIG_SPI_TPM=y
# end of Generic Drivers
#
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
# end of Verified Boot (vboot)
CONFIG_TPM_GOOGLE=y
CONFIG_TPM_GOOGLE_CR50=y
CONFIG_TPM_GOOGLE_IMMEDIATELY_COMMIT_FW_SECDATA=y
#
# Trusted Platform Module
#
# CONFIG_NO_TPM is not set
CONFIG_TPM2=y
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM2=y
# CONFIG_DEBUG_TPM is not set
# CONFIG_TPM_MEASURED_BOOT is not set
# end of Trusted Platform Module
#
# Memory initialization
#
# end of Memory initialization
CONFIG_BOOTMEDIA_LOCK_NONE=y
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
# end of Security
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
#
# memory mapped, 8250-compatible
#
# CONFIG_CONSOLE_SERIAL_921600 is not set
# CONFIG_CONSOLE_SERIAL_460800 is not set
# CONFIG_CONSOLE_SERIAL_230400 is not set
CONFIG_CONSOLE_SERIAL_115200=y
# CONFIG_CONSOLE_SERIAL_57600 is not set
# CONFIG_CONSOLE_SERIAL_38400 is not set
# CONFIG_CONSOLE_SERIAL_19200 is not set
# CONFIG_CONSOLE_SERIAL_9600 is not set
CONFIG_TTYS0_BAUD=115200
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
CONFIG_POST_DEVICE_NONE=y
CONFIG_HWBASE_DEBUG_CB=y
# end of Console
CONFIG_HAVE_MONOTONIC_TIMER=y
#
# System tables
#
# end of System tables
#
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_FIT is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
CONFIG_PAYLOAD_FIT_SUPPORT=y
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
# Debugging
#
#
# CPU Debug Settings
#
#
# BLOB Debug Settings
#
#
# General Debug Settings
#
# CONFIG_GDB_STUB is not set
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# end of Debugging
CONFIG_FLATTENED_DEVICE_TREE=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_NO_XIP_EARLY_STAGES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y
+6
View File
@@ -0,0 +1,6 @@
cbtree="cros"
romtype="normal"
arch="AArch64"
payload_uboot="y"
blobs_required="n"
microcode_required="n"
@@ -0,0 +1,874 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_PRERAM_STAGES=y
CONFIG_COMPRESS_BOOTBLOCK=y
CONFIG_INCLUDE_CONFIG_FILE=y
# CONFIG_COLLECT_TIMESTAMPS is not set
# CONFIG_USE_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
# CONFIG_ASAN is not set
CONFIG_NO_STAGE_CACHE=y
# CONFIG_CBMEM_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
# end of General setup
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
CONFIG_VENDOR_GOOGLE=y
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PINE64 is not set
# CONFIG_VENDOR_PORTWELL is not set
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Kevin"
CONFIG_MAINBOARD_DIR="google/gru"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Google"
CONFIG_CBFS_SIZE=0x00800000
CONFIG_CONSOLE_SERIAL=y
CONFIG_MAX_CPUS=1
CONFIG_POST_DEVICE=y
CONFIG_UART_FOR_CONSOLE=0
# CONFIG_VBOOT is not set
# CONFIG_CHROMEOS is not set
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
# CONFIG_CONSOLE_POST is not set
CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
CONFIG_SPI_FLASH_WINBOND=y
#
# Asurada
#
# CONFIG_BOARD_GOOGLE_ASURADA is not set
# CONFIG_BOARD_GOOGLE_HAYATO is not set
# CONFIG_BOARD_GOOGLE_SPHERION is not set
#
# Auron
#
# CONFIG_BOARD_GOOGLE_AURON_PAINE is not set
# CONFIG_BOARD_GOOGLE_AURON_YUNA is not set
# CONFIG_BOARD_GOOGLE_BUDDY is not set
# CONFIG_BOARD_GOOGLE_GANDOF is not set
# CONFIG_BOARD_GOOGLE_LULU is not set
# CONFIG_BOARD_GOOGLE_SAMUS is not set
#
# Beltino
#
# CONFIG_BOARD_GOOGLE_MCCLOUD is not set
# CONFIG_BOARD_GOOGLE_MONROE is not set
# CONFIG_BOARD_GOOGLE_PANTHER is not set
# CONFIG_BOARD_GOOGLE_TRICKY is not set
# CONFIG_BOARD_GOOGLE_ZAKO is not set
#
# Brya
#
# CONFIG_BOARD_GOOGLE_AGAH is not set
# CONFIG_BOARD_GOOGLE_ANAHERA is not set
# CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
# CONFIG_BOARD_GOOGLE_BRASK is not set
# CONFIG_BOARD_GOOGLE_BRYA0 is not set
# CONFIG_BOARD_GOOGLE_BRYA4ES is not set
# CONFIG_BOARD_GOOGLE_FELWINTER is not set
# CONFIG_BOARD_GOOGLE_GIMBLE is not set
# CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
# CONFIG_BOARD_GOOGLE_KANO is not set
# CONFIG_BOARD_GOOGLE_NIVVIKS is not set
# CONFIG_BOARD_GOOGLE_NEREID is not set
# CONFIG_BOARD_GOOGLE_PRIMUS is not set
# CONFIG_BOARD_GOOGLE_PRIMUS4ES is not set
# CONFIG_BOARD_GOOGLE_REDRIX is not set
# CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
# CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
# CONFIG_BOARD_GOOGLE_TAEKO is not set
# CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
# CONFIG_BOARD_GOOGLE_TANIKS is not set
# CONFIG_BOARD_GOOGLE_VELL is not set
# CONFIG_BOARD_GOOGLE_VOLMAR is not set
# CONFIG_BOARD_GOOGLE_BANSHEE is not set
# CONFIG_BOARD_GOOGLE_CROTA is not set
# CONFIG_BOARD_GOOGLE_MOLI is not set
# CONFIG_BOARD_GOOGLE_KINOX is not set
# CONFIG_BOARD_GOOGLE_CRAASK is not set
# CONFIG_BOARD_GOOGLE_OSIRIS is not set
# CONFIG_BOARD_GOOGLE_MITHRAX is not set
# CONFIG_BOARD_GOOGLE_KULDAX is not set
#
# Butterfly
#
# CONFIG_BOARD_GOOGLE_BUTTERFLY is not set
#
# Cherry
#
# CONFIG_BOARD_GOOGLE_CHERRY is not set
# CONFIG_BOARD_GOOGLE_DOJO is not set
# CONFIG_BOARD_GOOGLE_TOMATO is not set
#
# Kingler
#
# CONFIG_BOARD_GOOGLE_KINGLER is not set
# CONFIG_BOARD_GOOGLE_STEELIX is not set
#
# Krabby
#
# CONFIG_BOARD_GOOGLE_KRABBY is not set
#
# Cyan
#
# CONFIG_BOARD_GOOGLE_BANON is not set
# CONFIG_BOARD_GOOGLE_CELES is not set
# CONFIG_BOARD_GOOGLE_CYAN is not set
# CONFIG_BOARD_GOOGLE_EDGAR is not set
# CONFIG_BOARD_GOOGLE_KEFKA is not set
# CONFIG_BOARD_GOOGLE_REKS is not set
# CONFIG_BOARD_GOOGLE_RELM is not set
# CONFIG_BOARD_GOOGLE_SETZER is not set
# CONFIG_BOARD_GOOGLE_TERRA is not set
# CONFIG_BOARD_GOOGLE_ULTIMA is not set
# CONFIG_BOARD_GOOGLE_WIZPIG is not set
#
# Daisy
#
# CONFIG_BOARD_GOOGLE_DAISY is not set
#
# Dedede
#
# CONFIG_BOARD_GOOGLE_BOTEN is not set
# CONFIG_BOARD_GOOGLE_DEDEDE is not set
# CONFIG_BOARD_GOOGLE_DRAWCIA is not set
# CONFIG_BOARD_GOOGLE_HABOKI is not set
# CONFIG_BOARD_GOOGLE_MADOO is not set
# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
# CONFIG_BOARD_GOOGLE_LALALA is not set
# CONFIG_BOARD_GOOGLE_MAGOLOR is not set
# CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
# CONFIG_BOARD_GOOGLE_LANTIS is not set
# CONFIG_BOARD_GOOGLE_GALTIC is not set
# CONFIG_BOARD_GOOGLE_SASUKE is not set
# CONFIG_BOARD_GOOGLE_STORO is not set
# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
# CONFIG_BOARD_GOOGLE_KRACKO is not set
# CONFIG_BOARD_GOOGLE_BLIPPER is not set
# CONFIG_BOARD_GOOGLE_CRET is not set
# CONFIG_BOARD_GOOGLE_PIRIKA is not set
# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
# CONFIG_BOARD_GOOGLE_BUGZZY is not set
# CONFIG_BOARD_GOOGLE_CORORI is not set
# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
# CONFIG_BOARD_GOOGLE_GOOEY is not set
# CONFIG_BOARD_GOOGLE_BEADRIX is not set
#
# Drallion
#
# CONFIG_BOARD_GOOGLE_DRALLION is not set
#
# Eve
#
# CONFIG_BOARD_GOOGLE_EVE is not set
#
# Fizz
#
# CONFIG_BOARD_GOOGLE_FIZZ is not set
# CONFIG_BOARD_GOOGLE_KARMA is not set
# CONFIG_BOARD_GOOGLE_ENDEAVOUR is not set
#
# Foster
#
# CONFIG_BOARD_GOOGLE_FOSTER is not set
#
# Gale
#
# CONFIG_BOARD_GOOGLE_GALE is not set
#
# Glados
#
# CONFIG_BOARD_GOOGLE_ASUKA is not set
# CONFIG_BOARD_GOOGLE_CAROLINE is not set
# CONFIG_BOARD_GOOGLE_CAVE is not set
# CONFIG_BOARD_GOOGLE_CHELL is not set
# CONFIG_BOARD_GOOGLE_GLADOS is not set
# CONFIG_BOARD_GOOGLE_LARS is not set
# CONFIG_BOARD_GOOGLE_SENTRY is not set
#
# Gru
#
CONFIG_BOARD_GOOGLE_KEVIN=y
# CONFIG_BOARD_GOOGLE_GRU is not set
# CONFIG_BOARD_GOOGLE_BOB is not set
# CONFIG_BOARD_GOOGLE_SCARLET is not set
# CONFIG_BOARD_GOOGLE_NEFARIO is not set
# CONFIG_BOARD_GOOGLE_RAINIER is not set
#
# Guybrush
#
# CONFIG_BOARD_GOOGLE_GUYBRUSH is not set
# CONFIG_BOARD_GOOGLE_NIPPERKIN is not set
# CONFIG_BOARD_GOOGLE_DEWATT is not set
#
# Hatch
#
# CONFIG_BOARD_GOOGLE_AKEMI is not set
# CONFIG_BOARD_GOOGLE_AMBASSADOR is not set
# CONFIG_BOARD_GOOGLE_DOOLY is not set
# CONFIG_BOARD_GOOGLE_DRATINI is not set
# CONFIG_BOARD_GOOGLE_DUFFY_LEGACY is not set
# CONFIG_BOARD_GOOGLE_DUFFY is not set
# CONFIG_BOARD_GOOGLE_FAFFY is not set
# CONFIG_BOARD_GOOGLE_GENESIS is not set
# CONFIG_BOARD_GOOGLE_HATCH is not set
# CONFIG_BOARD_GOOGLE_HELIOS is not set
# CONFIG_BOARD_GOOGLE_HELIOS_DISKSWAP is not set
# CONFIG_BOARD_GOOGLE_JINLON is not set
# CONFIG_BOARD_GOOGLE_KAISA_LEGACY is not set
# CONFIG_BOARD_GOOGLE_KAISA is not set
# CONFIG_BOARD_GOOGLE_KINDRED is not set
# CONFIG_BOARD_GOOGLE_KOHAKU is not set
# CONFIG_BOARD_GOOGLE_MOONBUGGY is not set
# CONFIG_BOARD_GOOGLE_MUSHU is not set
# CONFIG_BOARD_GOOGLE_NIGHTFURY is not set
# CONFIG_BOARD_GOOGLE_NOIBAT is not set
# CONFIG_BOARD_GOOGLE_PALKIA is not set
# CONFIG_BOARD_GOOGLE_PUFF is not set
# CONFIG_BOARD_GOOGLE_SCOUT is not set
# CONFIG_BOARD_GOOGLE_WYVERN is not set
#
# Herobrine
#
#
# (Herobrine requires 'Allow QC blobs repository')
#
#
# Jecht
#
# CONFIG_BOARD_GOOGLE_GUADO is not set
# CONFIG_BOARD_GOOGLE_JECHT is not set
# CONFIG_BOARD_GOOGLE_RIKKU is not set
# CONFIG_BOARD_GOOGLE_TIDUS is not set
#
# Kahlee
#
# CONFIG_BOARD_GOOGLE_ALEENA is not set
# CONFIG_BOARD_GOOGLE_CAREENA is not set
# CONFIG_BOARD_GOOGLE_GRUNT is not set
# CONFIG_BOARD_GOOGLE_LIARA is not set
# CONFIG_BOARD_GOOGLE_NUWANI is not set
# CONFIG_BOARD_GOOGLE_TREEYA is not set
#
# Kukui
#
# CONFIG_BOARD_GOOGLE_KUKUI is not set
# CONFIG_BOARD_GOOGLE_KRANE is not set
# CONFIG_BOARD_GOOGLE_KODAMA is not set
# CONFIG_BOARD_GOOGLE_KAKADU is not set
# CONFIG_BOARD_GOOGLE_FLAPJACK is not set
# CONFIG_BOARD_GOOGLE_KATSU is not set
#
# Jacuzzi
#
# CONFIG_BOARD_GOOGLE_JACUZZI is not set
# CONFIG_BOARD_GOOGLE_JUNIPER is not set
# CONFIG_BOARD_GOOGLE_KAPPA is not set
# CONFIG_BOARD_GOOGLE_DAMU is not set
# CONFIG_BOARD_GOOGLE_CERISE is not set
# CONFIG_BOARD_GOOGLE_STERN is not set
# CONFIG_BOARD_GOOGLE_WILLOW is not set
# CONFIG_BOARD_GOOGLE_ESCHE is not set
# CONFIG_BOARD_GOOGLE_BURNET is not set
# CONFIG_BOARD_GOOGLE_FENNEL is not set
# CONFIG_BOARD_GOOGLE_COZMO is not set
# CONFIG_BOARD_GOOGLE_MAKOMO is not set
# CONFIG_BOARD_GOOGLE_MUNNA is not set
# CONFIG_BOARD_GOOGLE_PICO is not set
#
# Link
#
# CONFIG_BOARD_GOOGLE_LINK is not set
#
# Mistral
#
# CONFIG_BOARD_GOOGLE_MISTRAL is not set
#
# Nyan
#
# CONFIG_BOARD_GOOGLE_NYAN is not set
#
# Nyan Big
#
# CONFIG_BOARD_GOOGLE_NYAN_BIG is not set
#
# Nyan Blaze
#
# CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set
#
# Oak
#
# CONFIG_BOARD_GOOGLE_OAK is not set
# CONFIG_BOARD_GOOGLE_ELM is not set
# CONFIG_BOARD_GOOGLE_HANA is not set
#
# Octopus
#
# CONFIG_BOARD_GOOGLE_AMPTON is not set
# CONFIG_BOARD_GOOGLE_BLOOG is not set
# CONFIG_BOARD_GOOGLE_BOBBA is not set
# CONFIG_BOARD_GOOGLE_CASTA is not set
# CONFIG_BOARD_GOOGLE_DOOD is not set
# CONFIG_BOARD_GOOGLE_FLEEX is not set
# CONFIG_BOARD_GOOGLE_FOOB is not set
# CONFIG_BOARD_GOOGLE_GARG is not set
# CONFIG_BOARD_GOOGLE_LICK is not set
# CONFIG_BOARD_GOOGLE_MEEP is not set
# CONFIG_BOARD_GOOGLE_OCTOPUS is not set
# CONFIG_BOARD_GOOGLE_PHASER is not set
# CONFIG_BOARD_GOOGLE_YORP is not set
#
# Parrot
#
# CONFIG_BOARD_GOOGLE_PARROT is not set
#
# Peach Pit
#
# CONFIG_BOARD_GOOGLE_PEACH_PIT is not set
#
# Poppy
#
# CONFIG_BOARD_GOOGLE_ATLAS is not set
# CONFIG_BOARD_GOOGLE_POPPY is not set
# CONFIG_BOARD_GOOGLE_NAMI is not set
# CONFIG_BOARD_GOOGLE_NAUTILUS is not set
# CONFIG_BOARD_GOOGLE_NOCTURNE is not set
# CONFIG_BOARD_GOOGLE_RAMMUS is not set
# CONFIG_BOARD_GOOGLE_SORAKA is not set
#
# Rambi
#
# CONFIG_BOARD_GOOGLE_BANJO is not set
# CONFIG_BOARD_GOOGLE_CANDY is not set
# CONFIG_BOARD_GOOGLE_CLAPPER is not set
# CONFIG_BOARD_GOOGLE_ENGUARDE is not set
# CONFIG_BOARD_GOOGLE_GLIMMER is not set
# CONFIG_BOARD_GOOGLE_GNAWTY is not set
# CONFIG_BOARD_GOOGLE_HELI is not set
# CONFIG_BOARD_GOOGLE_KIP is not set
# CONFIG_BOARD_GOOGLE_NINJA is not set
# CONFIG_BOARD_GOOGLE_ORCO is not set
# CONFIG_BOARD_GOOGLE_QUAWKS is not set
# CONFIG_BOARD_GOOGLE_SQUAWKS is not set
# CONFIG_BOARD_GOOGLE_RAMBI is not set
# CONFIG_BOARD_GOOGLE_SUMO is not set
# CONFIG_BOARD_GOOGLE_SWANKY is not set
# CONFIG_BOARD_GOOGLE_WINKY is not set
#
# Reef
#
# CONFIG_BOARD_GOOGLE_REEF is not set
# CONFIG_BOARD_GOOGLE_PYRO is not set
# CONFIG_BOARD_GOOGLE_SAND is not set
# CONFIG_BOARD_GOOGLE_SNAPPY is not set
# CONFIG_BOARD_GOOGLE_CORAL is not set
#
# Sarien
#
# CONFIG_BOARD_GOOGLE_ARCADA is not set
# CONFIG_BOARD_GOOGLE_SARIEN is not set
#
# Skyrim
#
# CONFIG_BOARD_GOOGLE_SKYRIM is not set
#
# Slippy
#
# CONFIG_BOARD_GOOGLE_FALCO is not set
# CONFIG_BOARD_GOOGLE_LEON is not set
# CONFIG_BOARD_GOOGLE_PEPPY is not set
# CONFIG_BOARD_GOOGLE_WOLF is not set
#
# Smaug
#
# CONFIG_BOARD_GOOGLE_SMAUG is not set
#
# Storm
#
# CONFIG_BOARD_GOOGLE_STORM is not set
#
# Stout
#
# CONFIG_BOARD_GOOGLE_STOUT is not set
#
# Trogdor
#
#
# (Trogdor requires 'Allow QC blobs repository')
#
#
# Veyron
#
# CONFIG_BOARD_GOOGLE_VEYRON_JAQ is not set
# CONFIG_BOARD_GOOGLE_VEYRON_JERRY is not set
# CONFIG_BOARD_GOOGLE_VEYRON_MIGHTY is not set
# CONFIG_BOARD_GOOGLE_VEYRON_MINNIE is not set
# CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY is not set
#
# Veyron Mickey
#
# CONFIG_BOARD_GOOGLE_VEYRON_MICKEY is not set
#
# Veyron Rialto
#
# CONFIG_BOARD_GOOGLE_VEYRON_RIALTO is not set
#
# Volteer
#
# CONFIG_BOARD_GOOGLE_DELBIN is not set
# CONFIG_BOARD_GOOGLE_ELDRID is not set
# CONFIG_BOARD_GOOGLE_HALVOR is not set
# CONFIG_BOARD_GOOGLE_LINDAR is not set
# CONFIG_BOARD_GOOGLE_MALEFOR is not set
# CONFIG_BOARD_GOOGLE_TERRADOR is not set
# CONFIG_BOARD_GOOGLE_TODOR is not set
# CONFIG_BOARD_GOOGLE_TRONDO is not set
# CONFIG_BOARD_GOOGLE_VOLTEER is not set
# CONFIG_BOARD_GOOGLE_VOLTEER2 is not set
# CONFIG_BOARD_GOOGLE_VOLTEER2_TI50 is not set
# CONFIG_BOARD_GOOGLE_VOXEL is not set
# CONFIG_BOARD_GOOGLE_ELEMI is not set
# CONFIG_BOARD_GOOGLE_VOEMA is not set
# CONFIG_BOARD_GOOGLE_DROBIT is not set
# CONFIG_BOARD_GOOGLE_COPANO is not set
# CONFIG_BOARD_GOOGLE_COLLIS is not set
# CONFIG_BOARD_GOOGLE_VOLET is not set
# CONFIG_BOARD_GOOGLE_CHRONICLER is not set
#
# Zork
#
# CONFIG_BOARD_GOOGLE_DALBOZ is not set
# CONFIG_BOARD_GOOGLE_VILBOZ is not set
# CONFIG_BOARD_GOOGLE_EZKINIL is not set
# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
# CONFIG_BOARD_GOOGLE_BERKNIP is not set
# CONFIG_BOARD_GOOGLE_WOOMAX is not set
# CONFIG_BOARD_GOOGLE_DIRINBOZ is not set
# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
# CONFIG_BOARD_GOOGLE_GUMBOZ is not set
CONFIG_DRIVER_TPM_SPI_BUS=0x0
CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_DRIVER_TPM_I2C_BUS=0x0
CONFIG_DRIVER_TPM_I2C_ADDR=0x20
CONFIG_PMIC_BUS=-1
CONFIG_BOARD_GOOGLE_GRU_COMMON=y
# CONFIG_GRU_HAS_TPM2 is not set
CONFIG_GRU_HAS_CENTERLOG_PWM=y
CONFIG_GRU_HAS_WLAN_RESET=y
CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=8192
CONFIG_ROM_SIZE=0x00800000
# end of Mainboard
#
# Chipset
#
#
# SoC
#
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_ARM64_BL31_EXTERNAL_FILE=""
CONFIG_ARCH_ARMV8_EXTENSION=0
CONFIG_STACK_SIZE=0x0
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_TTYS0_BASE=0x3f8
CONFIG_TTYS0_LCS=3
CONFIG_UART_PCI_ADDR=0x0
CONFIG_GENERIC_UDELAY=y
CONFIG_SOC_ROCKCHIP_RK3399=y
# CONFIG_RK3399_SPREAD_SPECTRUM_DDR is not set
#
# CPU
#
#
# Northbridge
#
#
# Southbridge
#
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
#
# Super I/O
#
#
# Embedded Controllers
#
CONFIG_EC_SUPPORTS_DPTF_TEVT=y
CONFIG_EC_GOOGLE_CHROMEEC=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0
CONFIG_EC_GOOGLE_CHROMEEC_RTC=y
CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
CONFIG_MAINBOARD_HAS_CHROMEOS=y
#
# ChromeOS
#
# end of ChromeOS
CONFIG_ARCH_ARM64=y
CONFIG_ARCH_BOOTBLOCK_ARM64=y
CONFIG_ARCH_VERSTAGE_ARM64=y
CONFIG_ARCH_ROMSTAGE_ARM64=y
CONFIG_ARCH_RAMSTAGE_ARM64=y
CONFIG_ARCH_BOOTBLOCK_ARMV8_64=y
CONFIG_ARCH_VERSTAGE_ARMV8_64=y
CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
# end of Chipset
#
# Devices
#
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
#
# Display
#
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
# CONFIG_BOOTSPLASH is not set
# end of Display
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATOR_V4=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_ELOG is not set
CONFIG_COMMON_CBFS_SPI_WRAPPER=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_TPM_INIT_RAMSTAGE=y
CONFIG_DRIVERS_UART=y
CONFIG_UART_OVERRIDE_REFCLK=y
CONFIG_DRIVERS_UART_8250MEM=y
CONFIG_DRIVERS_UART_8250MEM_32=y
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_I2C_TPM=y
CONFIG_DRIVER_TIS_DEFAULT=y
# CONFIG_DRIVER_I2C_TPM_ACPI is not set
# CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES is not set
CONFIG_INTEL_GMA_OPREGION_2_0=y
# end of Generic Drivers
#
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
# end of Verified Boot (vboot)
#
# Trusted Platform Module
#
# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_TPM_MEASURED_BOOT is not set
# end of Trusted Platform Module
#
# Memory initialization
#
# end of Memory initialization
CONFIG_BOOTMEDIA_LOCK_NONE=y
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
# end of Security
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
#
# memory mapped, 8250-compatible
#
# CONFIG_CONSOLE_SERIAL_921600 is not set
# CONFIG_CONSOLE_SERIAL_460800 is not set
# CONFIG_CONSOLE_SERIAL_230400 is not set
CONFIG_CONSOLE_SERIAL_115200=y
# CONFIG_CONSOLE_SERIAL_57600 is not set
# CONFIG_CONSOLE_SERIAL_38400 is not set
# CONFIG_CONSOLE_SERIAL_19200 is not set
# CONFIG_CONSOLE_SERIAL_9600 is not set
CONFIG_TTYS0_BAUD=115200
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
CONFIG_POST_DEVICE_NONE=y
CONFIG_HWBASE_DEBUG_CB=y
# end of Console
CONFIG_HAVE_MONOTONIC_TIMER=y
#
# System tables
#
# end of System tables
#
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_FIT is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
CONFIG_PAYLOAD_FIT_SUPPORT=y
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
# Debugging
#
#
# CPU Debug Settings
#
#
# BLOB Debug Settings
#
#
# General Debug Settings
#
# CONFIG_GDB_STUB is not set
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# end of Debugging
CONFIG_FLATTENED_DEVICE_TREE=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_NO_XIP_EARLY_STAGES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kcma-d8"
CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
@@ -325,6 +326,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -537,6 +539,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kcma-d8"
CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
@@ -325,6 +326,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -537,6 +539,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kcma-d8"
CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
@@ -325,6 +326,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -537,6 +539,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kcma-d8"
CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
@@ -325,6 +326,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -537,6 +539,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -5,3 +5,4 @@ payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kfsn4-dre"
CONFIG_MAINBOARD_PART_NUMBER="KFSN4-DRE"
@@ -320,6 +321,7 @@ CONFIG_LIMIT_HT_UP_WIDTH_16=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/nvidia/ck804/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
@@ -519,6 +521,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -5,3 +5,4 @@ payload_grub="n"
payload_grub_withseabios="n"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kfsn4-dre"
CONFIG_MAINBOARD_PART_NUMBER="KFSN4-DRE"
@@ -320,6 +321,7 @@ CONFIG_LIMIT_HT_UP_WIDTH_16=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/nvidia/ck804/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
@@ -519,6 +521,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
@@ -156,6 +157,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
# CONFIG_USBDEBUG is not set
CONFIG_IPMI_KCS_REGISTER_SPACING=1
CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
CONFIG_MAINBOARD_VERSION="1.0"
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_PCIEXP_L1_SUB_STATE=y
@@ -328,6 +330,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -442,6 +445,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
# CONFIG_GIC is not set
CONFIG_IPMI_KCS=y
CONFIG_IPMI_KCS_TIMEOUT_MS=5000
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
@@ -544,6 +548,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -659,6 +664,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_IPMI is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
@@ -156,6 +157,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
# CONFIG_USBDEBUG is not set
CONFIG_IPMI_KCS_REGISTER_SPACING=1
CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
CONFIG_MAINBOARD_VERSION="1.0"
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_PCIEXP_L1_SUB_STATE=y
@@ -328,6 +330,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -442,6 +445,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
# CONFIG_GIC is not set
CONFIG_IPMI_KCS=y
CONFIG_IPMI_KCS_TIMEOUT_MS=5000
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
@@ -544,6 +548,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -659,6 +664,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_IPMI is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
@@ -156,6 +157,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
# CONFIG_USBDEBUG is not set
CONFIG_IPMI_KCS_REGISTER_SPACING=1
CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
CONFIG_MAINBOARD_VERSION="1.0"
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_PCIEXP_L1_SUB_STATE=y
@@ -328,6 +330,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -442,6 +445,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
# CONFIG_GIC is not set
CONFIG_IPMI_KCS=y
CONFIG_IPMI_KCS_TIMEOUT_MS=5000
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
@@ -544,6 +548,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -659,6 +664,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_IPMI is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
@@ -5,3 +5,4 @@ payload_grub="y"
payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
crossgcc_ada="n"
@@ -84,6 +84,7 @@ CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
@@ -156,6 +157,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
# CONFIG_USBDEBUG is not set
CONFIG_IPMI_KCS_REGISTER_SPACING=1
CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
CONFIG_MAINBOARD_VERSION="1.0"
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_PCIEXP_L1_SUB_STATE=y
@@ -328,6 +330,7 @@ CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
@@ -442,6 +445,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
# CONFIG_GIC is not set
CONFIG_IPMI_KCS=y
CONFIG_IPMI_KCS_TIMEOUT_MS=5000
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
@@ -544,6 +548,7 @@ CONFIG_USER_NO_TPM=y
#
# Memory initialization
#
# CONFIG_STM is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
@@ -659,6 +664,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_IPMI is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+2
View File
@@ -6,3 +6,5 @@ payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
grub_scan_disk="ahci"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -107,10 +111,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x00200000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
@@ -118,13 +125,10 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -138,13 +142,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -178,30 +187,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -213,7 +221,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -225,6 +232,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -232,23 +240,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -256,8 +263,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -275,10 +281,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -296,17 +302,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -318,6 +323,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -338,12 +344,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -370,13 +389,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -388,6 +412,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -432,6 +462,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -442,6 +473,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -470,28 +503,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -516,14 +527,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -107,10 +111,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x00200000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
@@ -118,13 +125,10 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -138,13 +142,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -178,30 +187,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -213,7 +221,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -225,6 +232,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -232,23 +240,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -256,8 +263,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -275,10 +281,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -296,17 +302,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -318,6 +323,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -336,12 +342,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -368,13 +387,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -386,6 +410,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -430,6 +460,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -440,6 +471,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -468,28 +501,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -514,14 +525,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -6,3 +6,5 @@ payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
grub_scan_disk="ahci"
microcode_required="n"
blobs_required="n"
@@ -11,13 +11,16 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -33,6 +36,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -50,30 +59,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -88,9 +92,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -106,10 +110,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x01000000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
@@ -117,13 +124,10 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -137,13 +141,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -177,30 +186,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -212,7 +220,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -224,6 +231,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -231,23 +239,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -255,8 +262,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -274,10 +280,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -295,17 +301,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -317,6 +322,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -337,12 +343,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -369,13 +388,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
@@ -387,6 +411,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -431,6 +461,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -441,6 +472,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -469,28 +502,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -515,15 +526,14 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -11,13 +11,16 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -33,6 +36,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -50,30 +59,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -88,9 +92,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -106,10 +110,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x01000000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
@@ -117,13 +124,10 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -137,13 +141,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -177,30 +186,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -212,7 +220,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -224,6 +231,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -231,23 +239,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -255,8 +262,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -274,10 +280,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -295,17 +301,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -317,6 +322,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -335,12 +341,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -367,13 +386,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
@@ -385,6 +409,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -429,6 +459,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -439,6 +470,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -467,28 +500,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -513,15 +524,14 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
+2
View File
@@ -6,3 +6,5 @@ payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
grub_scan_disk="ahci"
microcode_required="n"
blobs_required="n"
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -107,10 +111,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x00200000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
@@ -118,13 +125,10 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -138,13 +142,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -178,30 +187,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -213,7 +221,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -225,6 +232,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -232,23 +240,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -256,8 +263,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -275,10 +281,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -296,17 +302,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -318,6 +323,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -338,12 +344,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -370,13 +389,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -388,6 +412,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -432,6 +462,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -442,6 +473,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -470,28 +503,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -516,14 +527,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -11,14 +11,17 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -34,6 +37,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -51,30 +60,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -89,9 +93,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -107,10 +111,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x00200000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
@@ -118,13 +125,10 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -138,13 +142,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -178,30 +187,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -213,7 +221,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -225,6 +232,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -232,23 +240,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -256,8 +263,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -275,10 +281,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -296,17 +302,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -318,6 +323,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -336,12 +342,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -368,13 +387,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
@@ -386,6 +410,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -430,6 +460,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -440,6 +471,8 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -468,28 +501,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -514,14 +525,13 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -6,3 +6,5 @@ payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
grub_scan_disk="ahci"
microcode_required="n"
blobs_required="n"
@@ -11,13 +11,16 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -33,6 +36,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -50,30 +59,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -88,9 +92,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -106,10 +110,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x01000000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
@@ -117,13 +124,10 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -137,13 +141,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -177,30 +186,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -212,7 +220,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -224,6 +231,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -231,23 +239,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -255,8 +262,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -274,10 +280,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -295,17 +301,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -317,6 +322,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -337,12 +343,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -369,13 +388,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
@@ -387,6 +411,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -431,6 +461,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -441,6 +472,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -469,28 +502,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -515,15 +526,14 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -11,13 +11,16 @@ CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -33,6 +36,12 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
@@ -50,30 +59,25 @@ CONFIG_TSEG_STAGE_CACHE=y
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
@@ -88,9 +92,9 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
@@ -106,10 +110,13 @@ CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Apple"
CONFIG_CBFS_SIZE=0x01000000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_MAX_CPUS=2
# CONFIG_VBOOT is not set
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
@@ -117,13 +124,10 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_POST_IO=y
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE=y
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -137,13 +141,18 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_DEBUG_SMI is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -177,30 +186,29 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# SoC
#
CONFIG_ARCH_ALL_STAGES_X86=y
CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_RAMBASE=0xe00000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
CONFIG_EHCI_BAR=0xfef00000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_STACK_SIZE=0x1000
CONFIG_STACK_SIZE=0x2000
CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_AZALIA_MAX_CODECS=3
# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_UART_PCI_ADDR=0x0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
@@ -212,7 +220,6 @@ CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
@@ -224,6 +231,7 @@ CONFIG_PARALLEL_MP=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
@@ -231,23 +239,22 @@ CONFIG_SETUP_XIP_CACHE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_CPU_INFO_V2=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
CONFIG_CPU_MICROCODE_CBFS_NONE=y
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
CONFIG_NORTHBRIDGE_SPECIFIC_OPTIONS=y
CONFIG_NORTHBRIDGE_INTEL_I945=y
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
CONFIG_I945_LVDS=y
@@ -255,8 +262,7 @@ CONFIG_I945_LVDS=y
#
# Southbridge
#
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -274,10 +280,10 @@ CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
CONFIG_FIXED_SMBUS_IO_BASE=0x400
#
# Super I/O
@@ -295,17 +301,16 @@ CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_RAMTOP=0x1000000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_NUM_IPI_STARTS=2
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# end of Chipset
#
@@ -317,6 +322,7 @@ CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
@@ -335,12 +341,25 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
CONFIG_RESOURCE_ALLOCATOR_V4=y
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_NO_DDR5=y
CONFIG_NO_LPDDR4=y
CONFIG_NO_DDR4=y
CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
#
@@ -367,13 +386,18 @@ CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_CK505=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
@@ -385,6 +409,12 @@ CONFIG_VGA=y
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
@@ -429,6 +459,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
@@ -439,6 +470,8 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
@@ -467,28 +500,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# Payload
#
CONFIG_PAYLOAD_NONE=y
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
@@ -513,15 +524,14 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_HAVE_EM100_SUPPORT is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
@@ -0,0 +1,6 @@
cbtree="default"
romtype="normal"
arch="AArch64"
payload_uboot="y"
blobs_required="n"
microcode_required="n"

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