Libreboot 25.04 Corny Calamity

Signed-off-by: Leah Rowe <leah@libreboot.org>

.gitignore

@@ -1,7 +1,9 @@
 *~
 *.o
+/cache/
 /lbmk.err.log
-/cbutils/
+/repo/
+/docs/
 /pciroms/
 /util/dell-flash-unlock/dell_flash_unlock
 /TODO
@@ -22,9 +24,23 @@
 /push
 /version
 /versiondate
+/.version
+/.versiondate
 /vendorfiles/
 *me.bin
 *sch5545ec.bin
 /mrc/
 /util/nvmutil/nvm
 /src/
+/CHANGELOG
+/todo.txt
+/lock
+/hash/
+/dump/
+/qrun*.sh
+*.tar.*
+/m
+/f
+/r
+/e
+/xbmkpath/

README.md

@@ -1,123 +1,57 @@
 Libreboot
 =========
 
-Find libreboot documentation at <https://libreboot.org/>
+Documentation: [libreboot.org](https://libreboot.org)\
+Support: [\#libreboot](https://web.libera.chat/#libreboot) on
+  [Libera](https://libera.chat/) IRC
 
-The `libreboot` project provides
+Libreboot provides 
-[libre](https://libreboot.org/freedom-status.html) *boot
+[libre](https://libreboot.org/freedom-status.html)
-firmware* that initializes the hardware (e.g. memory controller, CPU,
+boot firmware on
-peripherals) on specific Intel/AMD x86 and ARM targets, which
+[supported motherboards](https://libreboot.org/docs/install/#which-systems-are-supported-by-libreboot). It replaces proprietary vendor BIOS/UEFI implementations, by
-then starts a bootloader for your operating system. Linux/BSD are
+* Using coreboot to initialize the hardware (e.g. memory controller, CPU, etc.) while
-well-supported. It replaces proprietary BIOS/UEFI firmware. Help is available
+  minimizing unwanted functionality (e.g. backdoors such as the Intel Management Engine)
-via [\#libreboot IRC](https://web.libera.chat/#libreboot)
+* ... which runs a payload such as SeaBIOS, GRUB, or U-Boot
-on [Libera](https://libera.chat/) IRC.
+* ... which loads your operating system's boot loader (BSD and Linux-based
+  [systems](systems) are supported).
 
-Why use Libreboot?
+Why use Libreboot, and what is coreboot?
-==================
+----------------------------------------
 
-Why should you use *libreboot*?
+A lot of users who use libre operating systems still use proprietary boot
-----------------------------
+firmware, which often contain backdoors and bugs, hampering
+[user freedom](https://writefreesoftware.org) and
+[right to repair](https://www.eff.org/issues/right-to-repair).
 
-Libreboot gives you freedoms that you otherwise can't get with most other
+[coreboot](https://coreboot.org) provides libre boot firmware by initializing
-boot firmware. It's extremely powerful and configurable for many use cases.
+the hardware then running a payload. However, coreboot is notoriously difficult
+to configure and install for most non-technical users, requiring detailed
+technical knowledge of hardware.
 
-You have rights. The right to privacy, freedom of thought, freedom of speech
+Libreboot solves this by being **a coreboot distribution** (in the same way
-and the right to read. In this context, Libreboot gives you these rights.
+that Alpine Linux is a Linux distribution). It provides a fully automated build
-Your freedom matters.
+system that downloads and compiles pre-configured ROM images for supported
-[Right to repair](https://vid.puffyan.us/watch?v=Npd_xDuNi9k) matters.
+motherboards, so end-users could easily fetch images to flash onto their
-Many people use proprietary (non-libre)
+devices.
-boot firmware, even if they use [a libre OS](https://www.openbsd.org/).
-Proprietary firmware often contains backdoors (more info on the FAQ), and it
-and can be buggy. The libreboot project was founded in December 2013,
-with the express purpose of making coreboot firmware accessible for
-non-technical users.
 
-The `libreboot` project uses [coreboot](https://www.coreboot.org/) for [hardware
+Libreboot also produces documentation aimed at non-technical users and
-initialisation](https://doc.coreboot.org/getting_started/architecture.html).
+excellent user support via IRC.
-Coreboot is notoriously difficult to install for most non-technical users; it
-handles only basic initialization and jumps to a separate
-[payload](https://doc.coreboot.org/payloads.html) program (e.g.
-[GRUB](https://www.gnu.org/software/grub/),
-[Tianocore](https://www.tianocore.org/)), which must also be configured.
-*The libreboot software solves this problem*; it is a *coreboot distribution* with
-an automated build system (named *lbmk*) that builds complete *ROM images*, for
-more robust installation. Documentation is provided.
 
-How does Libreboot differ from coreboot?
+Contribute
-========================================
+----------
-
-In the same way that *Debian* is a GNU+Linux distribution, `libreboot` is
-a *coreboot distribution*. If you want to build a ROM image from scratch, you
-otherwise have to perform expert-level configuration of coreboot, GRUB and
-whatever other software you need, to prepare the ROM image. With *libreboot*,
-you can literally download from Git or a source archive, and run `make`, and it
-will build entire ROM images. An automated build system, named `lbmk`
-(Libreboot MaKe), builds these ROM images automatically, without any user input
-or intervention required. Configuration has already been performed in advance.
-
-If you were to build regular coreboot, without using libreboot's automated
-build system, it would require a lot more intervention and decent technical
-knowledge to produce a working configuration.
-
-Regular binary releases of `libreboot` provide these
-ROM images pre-compiled, and you can simply install them, with no special
-knowledge or skill except the ability to follow installation instructions
-and run commands BSD/Linux.
-
-Project goals
-=============
-
--   *Support as much hardware as possible!* Libreboot aims to eventually
-    have *maintainers* for every board supported by coreboot, at every
-    point in time.
--   *Make coreboot easy to use*. Coreboot is notoriously difficult
-    to install, due to an overall lack of user-focused documentation
-    and support. Most people will simply give up before attempting to
-    install coreboot. Libreboot's automated build system and user-friendly
-    installation instructions solves this problem.
-
-Libreboot attempts to bridge this divide by providing a build system
-automating much of the coreboot image creation and customization.
-Secondly, the project produces documentation aimed at non-technical users.
-Thirdly, the project attempts to provide excellent user support via IRC.
-
-Libreboot already comes with a payload (GRUB), flashrom and other
-needed parts. Everything is fully integrated, in a way where most of
-the complicated steps that are otherwise required, are instead done
-for the user in advance.
-
-You can download ROM images for your libreboot system and install
-them without having to build anything from source. If, however, you are
-interested in building your own image, the build system makes it relatively
-easy to do so.
-
-Not a coreboot fork!
---------------------
-
-Libreboot is not a fork of coreboot. Every so often, the project
-re-bases on the latest version of coreboot, with the number of custom
-patches in use minimized. Tested, *stable* (static) releases are then provided
-in Libreboot, based on specific coreboot revisions.
-
-How to help
-===========
 
 You can check bugs listed on
 the [bug tracker](https://codeberg.org/libreboot/lbmk/issues).
 
-If you spot a bug and have a fix, the website has instructions for how to send
+You may use Codeberg pull requests to send patches with bug fixes or other
-patches, and you can also report it. Also, this entire website is
+improvements. This repository hosts the code for the main build system.
-written in Markdown and hosted in a [separate
+The website lives in [a separate repository](https://codeberg.org/libreboot/lbwww).
-repository](https://codeberg.org/libreboot/lbwww) where you can send patches.
 
-Any and all development discussion and user support are all done on the IRC
+Development is also done on the IRC channel.
-channel. More information is on https://libreboot.org/contact.html.
 
-LICENSE FOR THIS README
+License for this README
-=======================
+-----------------------
 
-It's just a README file. This README file is released under the terms of the
+It's just a README file. It is released under
-Creative Commons Zero license, version 1.0 of the license, which you can
+[Creative Commons Zero, version 1.0](https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt).
-read here:
 
-<https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt>

build

@@ -1,138 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014,2015,2020,2021,2023 Leah Rowe <leah@libreboot.org>
-# SPDX-FileCopyrightText: 2015 Patrick "P. J." McDermott <pj@pehjota.net>
-# SPDX-FileCopyrightText: 2015, 2016 Klemens Nanni <contact@autoboot.org>
-# SPDX-FileCopyrightText: 2022, Caleb La Grange <thonkpeasant@protonmail.com>
-
-[ "x${DEBUG+set}" = 'xset' ] && set -v
-set -u -e
-
-. "include/err.sh"
-. "include/option.sh"
-
-eval "$(setvars "" option aur_notice tmpdir)"
-
-tmpdir_was_set="y"
-set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
-if [ "${tmpdir_was_set}" = "y" ]; then
-	tmpdir="${TMPDIR##*/}"
-	tmpdir="${TMPDIR%_*}"
-	if [ "${tmpdir}" = "lbmk" ]; then
-		tmpdir=""
-		tmpdir_was_set="n"
-	fi
-fi
-if [ "${tmpdir_was_set}" = "n" ]; then
-	export TMPDIR="/tmp"
-	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
-	export TMPDIR="${tmpdir}"
-else
-	export TMPDIR="${TMPDIR}"
-fi
-tmpdir="${TMPDIR}"
-
-linkpath="${0}"
-linkname="${linkpath##*/}"
-buildpath="./script/${linkname}"
-
-main()
-{
-	xx_ id -u 1>/dev/null 2>/dev/null
-	[ $# -lt 1 ] && fail "Too few arguments. Try: ${0} help"
-	[ "${1}" = "dependencies" ] && xx_ install_packages $@ && lbmk_exit 0
-
-	initialise_command $@ && shift 1
-
-	check_git
-	check_project "fail"
-	git_init
-
-	execute_command $@
-	lbmk_exit 0
-}
-
-initialise_command()
-{
-	[ "$(id -u)" != "0" ] || fail "this command as root is not permitted"
-
-	case "${1}" in
-	help) usage ${0} && lbmk_exit 0 ;;
-	list) items "${buildpath}" && lbmk_exit 0 ;;
-	esac
-	option="${1}"
-}
-
-install_packages()
-{
-	if [ $# -lt 2 ]; then
-		printf "You must specify a distro, namely:\n" 1>&2
-		printf "Look at files under config/dependencies/\n" 1>&2
-		printf "Example: ./build dependencies debian\n" 1>&2
-		fail "install_packages: target not specified"
-	fi
-
-	[ -f "config/dependencies/${2}" ] || fail "Unsupported target"
-
-	. "config/dependencies/${2}"
-
-	xx_ ${pkg_add} ${pkglist}
-	[ -z "${aur_notice}" ] && return 0
-	printf "You must install AUR packages: %s\n" "${aur_notice}" 1>&2
-}
-
-# release archives contain .gitignore, but not .git.
-# lbmk can be run from lbmk.git, or an archive.
-git_init()
-{
-	[ -L ".git" ] && fail "Reference .git is a symlink"
-	[ -e ".git" ] && return 0
-	eval "$(setvars "$(date -Rd @${versiondate})" cdate _nogit)"
-
-	git init || fail "${PWD}: cannot initialise Git repository"
-	git add -A . || fail "${PWD}: cannot add files to Git repository"
-	git commit -m "${projectname} ${version}" --date "${cdate}" || \
-	    fail "${PWD}: can't commit ${projectname}/${version}, date ${cdate}"
-	git tag -a "${version}" -m "${projectname} ${version}" || \
-	    fail "${PWD}: cannot git-tag ${projectname}/${version}"
-}
-
-execute_command()
-{
-	lbmkcmd="${buildpath}/${option}"
-	[ -f "${lbmkcmd}" ] || fail "Invalid command. Run: ${linkpath} help"
-	"${lbmkcmd}" $@ || fail "execute_command: ${lbmkcmd} ${@}"
-}
-
-usage()
-{
-	progname=${0}
-	cat <<- EOF
-	USAGE:	${progname} <OPTION>
-
-	possible values for 'OPTION':
-	$(items "${buildpath}")
-
-	Refer to ${projectname} documentation for more info.
-	EOF
-}
-
-lbmk_exit()
-{
-	tmp_cleanup || err "lbmk_exit: can't rm tmpdir upon exit $1: ${tmpdir}"
-	exit $1
-}
-
-fail()
-{
-	tmp_cleanup || printf "WARNING: can't rm tmpdir: %s\n" "${tmpdir}" 1>&2
-	err "${1}"
-}
-
-tmp_cleanup()
-{
-	[ "${tmpdir_was_set}" = "n" ] || return 0
-	rm -Rf "${tmpdir}" || return 1
-}
-
-main $@

config/coreboot/build.list

@@ -1 +0,0 @@
-build/coreboot.rom

config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch

@@ -0,0 +1,56 @@
+From f22f408956bf02609a96b7d72fb3321da159bfc6 Mon Sep 17 00:00:00 2001
+From: Nico Huber <nico.huber@secunet.com>
+Date: Tue, 22 Jun 2021 13:49:44 +0000
+Subject: [PATCH 1/1] cbfstool: Make use of spurious null-termination
+
+The null-termination of `filetypes` was added after the code was
+written, obviously resulting in NULL dereferences. As some more
+code has grown around the termination, it's hard to revert the
+regression, so let's update the code that still used the array
+length.
+
+This fixes commit 7f5f9331d1 (util/cbfstool: fix buffer over-read)
+which actually did fix something, but only one path while it broke
+two others. We should be careful with fixes, they can always break
+something else. Especially when a dumb tool triggered the patching
+it seems likely that fewer people looked into related code.
+
+Change-Id: If2ece1f5ad62952ed2e57769702e318ba5468f0c
+Signed-off-by: Nico Huber <nico.huber@secunet.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/55763
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Julius Werner <jwerner@chromium.org>
+---
+ util/cbfstool/common.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index e2ed38ffc4..539d0baccf 100644
+--- a/util/cbfstool/common.c
++++ b/util/cbfstool/common.c
+@@ -168,10 +168,10 @@ void print_supported_architectures(void)
+ 
+ void print_supported_filetypes(void)
+ {
+-	int i, number = ARRAY_SIZE(filetypes);
++	int i;
+ 
+-	for (i=0; i<number; i++) {
+-		printf(" %s%c", filetypes[i].name, (i==(number-1))?'\n':',');
++	for (i=0; filetypes[i].name; i++) {
++		printf(" %s%c", filetypes[i].name, filetypes[i + 1].name ? ',' : '\n');
+ 		if ((i%8) == 7)
+ 			printf("\n");
+ 	}
+@@ -180,7 +180,7 @@ void print_supported_filetypes(void)
+ uint64_t intfiletype(const char *name)
+ {
+ 	size_t i;
+-	for (i = 0; i < (sizeof(filetypes) / sizeof(struct typedesc_t)); i++)
++	for (i = 0; filetypes[i].name; i++)
+ 		if (strcmp(filetypes[i].name, name) == 0)
+ 			return filetypes[i].type;
+ 	return -1;
+-- 
+2.39.2
+

config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch

@@ -0,0 +1,33 @@
+From 06e8d7a9db4efe1dc2b7e5865b801a5518b38fbd Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Tue, 29 Apr 2025 17:31:13 +0300
+Subject: [PATCH 1/1] Fix cbfstool build error on GCC 15 host compiler
+
+GCC 15 now considers the unterminated-string-initialization warning as
+part of -Werror by default. Coreboot compiles host utilities with the
+system compiler, which results in getting this error in some files.
+
+Mark a hexadecimal translation table in cbfstool code as "nonstring" to
+avoid the warning-turned-error.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ util/cbfstool/common.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index 539d0baccf..f6fe647503 100644
+--- a/util/cbfstool/common.c
++++ b/util/cbfstool/common.c
+@@ -188,7 +188,7 @@ uint64_t intfiletype(const char *name)
+ 
+ char *bintohex(uint8_t *data, size_t len)
+ {
+-	static const char translate[16] = "0123456789abcdef";
++	static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
+ 
+ 	char *result = malloc(len * 2 + 1);
+ 	if (result == NULL)
+-- 
+2.39.5
+

config/coreboot/coreboot413/target.cfg

@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="coreboot413"
+rev="5c186c6777c9438ff4681929c9c25c98dee28bef"

config/coreboot/d510mo/config/libgfxinit_txtmode

@@ -6,22 +6,23 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -32,11 +33,10 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_NO_STAGE_CACHE=y
-CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,10 +54,11 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -66,23 +67,30 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -92,6 +100,7 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -102,7 +111,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="D510MO"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -118,20 +129,26 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -141,15 +158,12 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_ADLRVP_P is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -157,7 +171,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
 # CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
 
 #
@@ -176,6 +192,7 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_DQ67SW is not set
 # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
 # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
@@ -189,7 +206,13 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -197,20 +220,19 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,6 +245,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=1024
@@ -248,6 +271,8 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,17 +281,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -290,6 +316,8 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -344,6 +372,8 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -355,6 +385,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -365,6 +397,10 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -381,12 +417,13 @@ CONFIG_NO_EARLY_GFX_INIT=y
 # Display
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +434,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -416,6 +451,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -428,10 +464,12 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -442,6 +480,10 @@ CONFIG_DRIVERS_I2C_CK505=y
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -449,6 +491,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -473,6 +517,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -563,6 +608,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -570,7 +619,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -584,6 +632,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

config/coreboot/d510mo/target.cfg

@@ -1,9 +1,8 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
-romtype="normal"
+xarch="i386-elf"
-arch="x86_64"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
-microcode_required="n"
+release="n"
-vendorfiles="n"
+build_depend="seabios/default memtest86plus"

config/coreboot/d510mo_16mb/config/libgfxinit_txtmode

@@ -6,22 +6,23 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -32,11 +33,10 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_NO_STAGE_CACHE=y
-CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,10 +54,11 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -66,23 +67,30 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -92,6 +100,7 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -102,7 +111,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="D510MO"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -118,20 +129,26 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -141,15 +158,12 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_ADLRVP_P is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -157,7 +171,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
 # CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
 
 #
@@ -176,6 +192,7 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_DQ67SW is not set
 # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
 # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
@@ -189,7 +206,13 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -197,20 +220,19 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,6 +245,7 @@ CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -248,6 +271,8 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,17 +281,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -290,6 +316,8 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -344,6 +372,8 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -355,6 +385,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -365,6 +397,10 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -381,12 +417,13 @@ CONFIG_NO_EARLY_GFX_INIT=y
 # Display
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +434,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -416,6 +451,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -428,10 +464,12 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -442,6 +480,10 @@ CONFIG_DRIVERS_I2C_CK505=y
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -449,6 +491,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -473,6 +517,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -563,6 +608,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -570,7 +619,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -584,6 +632,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

config/coreboot/d510mo_16mb/target.cfg

@@ -1,8 +1,8 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
-romtype="normal"
+xarch="i386-elf"
-arch="x86_64"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
-microcode_required="n"
+release="n"
-vendorfiles="n"

config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode

@@ -0,0 +1,646 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+CONFIG_VENDOR_INTEL=y
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="intel/d945gclf"
+CONFIG_VGA_BIOS_ID="8086,2772"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Intel"
+CONFIG_CBFS_SIZE=0x00080000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_IRQ_SLOT_COUNT=18
+# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_INTEL_ADLRVP_P is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
+# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
+# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
+# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
+
+#
+# Coffeelake RVP
+#
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
+# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
+# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_D510MO is not set
+CONFIG_BOARD_INTEL_D945GCLF=y
+# CONFIG_BOARD_INTEL_DCP847SKE is not set
+# CONFIG_BOARD_INTEL_DG41WV is not set
+# CONFIG_BOARD_INTEL_DG43GT is not set
+# CONFIG_BOARD_INTEL_DQ67SW is not set
+# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
+# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
+# CONFIG_BOARD_INTEL_GLKRVP is not set
+# CONFIG_BOARD_INTEL_HARCUVAR is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
+# CONFIG_BOARD_INTEL_KBLRVP3 is not set
+# CONFIG_BOARD_INTEL_KBLRVP7 is not set
+# CONFIG_BOARD_INTEL_KBLRVP8 is not set
+# CONFIG_BOARD_INTEL_KBLRVP11 is not set
+# CONFIG_BOARD_INTEL_KUNIMITSU is not set
+# CONFIG_BOARD_INTEL_LEAFHILL is not set
+# CONFIG_BOARD_INTEL_MINNOW3 is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
+# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
+# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
+# CONFIG_BOARD_INTEL_STRAGO is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
+# CONFIG_BOARD_INTEL_WTM2 is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_512=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_512=y
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=512
+CONFIG_ROM_SIZE=0x00080000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_INTEL_HAS_TOP_SWAP=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_106CX=y
+CONFIG_CPU_INTEL_SOCKET_441=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_I945=y
+CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47M15X=y
+
+#
+# Embedded Controllers
+#
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/d945gclf_512kb/target.cfg

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+release="n"
+build_depend="seabios/default"

config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode

@@ -0,0 +1,646 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+CONFIG_VENDOR_INTEL=y
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="intel/d945gclf"
+CONFIG_VGA_BIOS_ID="8086,2772"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Intel"
+CONFIG_CBFS_SIZE=0x00800000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_IRQ_SLOT_COUNT=18
+# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_INTEL_ADLRVP_P is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
+# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
+# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
+# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
+
+#
+# Coffeelake RVP
+#
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
+# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
+# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_D510MO is not set
+CONFIG_BOARD_INTEL_D945GCLF=y
+# CONFIG_BOARD_INTEL_DCP847SKE is not set
+# CONFIG_BOARD_INTEL_DG41WV is not set
+# CONFIG_BOARD_INTEL_DG43GT is not set
+# CONFIG_BOARD_INTEL_DQ67SW is not set
+# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
+# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
+# CONFIG_BOARD_INTEL_GLKRVP is not set
+# CONFIG_BOARD_INTEL_HARCUVAR is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
+# CONFIG_BOARD_INTEL_KBLRVP3 is not set
+# CONFIG_BOARD_INTEL_KBLRVP7 is not set
+# CONFIG_BOARD_INTEL_KBLRVP8 is not set
+# CONFIG_BOARD_INTEL_KBLRVP11 is not set
+# CONFIG_BOARD_INTEL_KUNIMITSU is not set
+# CONFIG_BOARD_INTEL_LEAFHILL is not set
+# CONFIG_BOARD_INTEL_MINNOW3 is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
+# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
+# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
+# CONFIG_BOARD_INTEL_STRAGO is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
+# CONFIG_BOARD_INTEL_WTM2 is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_512=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_INTEL_HAS_TOP_SWAP=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_106CX=y
+CONFIG_CPU_INTEL_SOCKET_441=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_I945=y
+CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47M15X=y
+
+#
+# Embedded Controllers
+#
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/d945gclf_8mb/target.cfg

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+release="n"
+build_depend="seabios/default grub/default"

config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch

@@ -1,7 +1,7 @@
-From fdd756a8217548981a1eb62e504cc37371c9fd51 Mon Sep 17 00:00:00 2001
+From bd959c38f6ee21db1ff8f4fbb0675e38bfbe1147 Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/22] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 01/37] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
@@ -10,10 +10,10 @@ Subject: [PATCH 02/22] add c3 and clockgen to apple/macbook21
  3 files changed, 20 insertions(+)
 
 diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
-index 5f5ffde588..27377b737c 100644
+index 330d8efae2..cf10343554 100644
 --- a/src/mainboard/apple/macbook21/Kconfig
 +++ b/src/mainboard/apple/macbook21/Kconfig
-@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
+@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
  	select HAVE_ACPI_TABLES
  	select HAVE_ACPI_RESUME
  	select I945_LVDS
@@ -64,5 +64,5 @@ index fd86e939b9..263fbabcd1 100644
  	end
  end
 -- 
-2.39.2
+2.39.5
 

config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch

@@ -1,23 +0,0 @@
-From e8f5f6c372152c7deddd3080954d0f4fdd39ae2b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@retroboot.org>
-Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/22] apple/macbook21: Set default VRAM to 64MiB instead of
- 8MiB
-
----
- src/mainboard/apple/macbook21/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
-index cf1bc4566e..dc0df3b6d6 100644
---- a/src/mainboard/apple/macbook21/cmos.default
-+++ b/src/mainboard/apple/macbook21/cmos.default
-@@ -5,4 +5,4 @@ boot_devices=''
- boot_default=0x40
- cmos_defaults_loaded=Yes
- lpt=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.2
-

config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch

@@ -1,7 +1,7 @@
-From 75858ba200a2a5835bca0af9b5f508a52ed978de Mon Sep 17 00:00:00 2001
+From e5eab4c8043b89a325b4a28bf7da456d68475144 Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 09/22] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 02/37] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -30,5 +30,5 @@ index 259c3e1b21..3d007533a4 100644
  			register "sata_traffic_monitor"		= "0"
  
 -- 
-2.39.2
+2.39.5
 

config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch

@@ -1,7 +1,7 @@
-From 040f15039fa59d70cd54b8fff5d947e155666aa1 Mon Sep 17 00:00:00 2001
+From fd398cc10600cccce3dd4931651a5294ffebde9a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 11/22] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 03/37] lenovo/x230: set me_state=Disabled in cmos.default
 
 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
@@ -23,16 +23,15 @@ Date:   Thu Nov 21 21:47:31 2019 +0300
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 2e315d4521..3585cbd58b 100644
+index 732e214b32..8454f0eac0 100644
 --- a/src/mainboard/lenovo/x230/cmos.default
 +++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -15,5 +15,5 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  usb_always_on=Disable
  f1_to_f12_as_primary=Enable
 -me_state=Normal
 +me_state=Disabled
- gfx_uma_size=224M
 -- 
-2.39.2
+2.39.5
 

config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch

@@ -1,23 +0,0 @@
-From c8332a8bac4986afec6c639f55c5876f83e50b76 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/22] lenovo/x60: 64MiB Video RAM changed to default
- (previously it was 8MiB)
-
----
- src/mainboard/lenovo/x60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
-index 5c3576d1f3..88170a1aab 100644
---- a/src/mainboard/lenovo/x60/cmos.default
-+++ b/src/mainboard/lenovo/x60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.2
-

config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch

@@ -1,22 +0,0 @@
-From 2e3ad35c24a86cb3109f4e5139b9ffba931eb80b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/22] lenovo/t60: make 64MiB VRAM the default in cmos.default
-
----
- src/mainboard/lenovo/t60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
-index af865f16da..7f03157df7 100644
---- a/src/mainboard/lenovo/t60/cmos.default
-+++ b/src/mainboard/lenovo/t60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.2
-

config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch

@@ -1,7 +1,7 @@
-From 81febff42c66bd53e44176f14b651339b503a9f3 Mon Sep 17 00:00:00 2001
+From 74230d8123cb7c31afd084658720084b1a5ac5d9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 12/22] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 04/37] set me_state=Disabled on all cmos.default files!
 
 yeah. why the hell isn't this the default
 
@@ -20,103 +20,105 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  10 files changed, 10 insertions(+), 10 deletions(-)
 
 diff --git a/src/mainboard/lenovo/l520/cmos.default b/src/mainboard/lenovo/l520/cmos.default
-index 681c40e78b..57cdcf9162 100644
+index be08e0a342..b8970efa46 100644
 --- a/src/mainboard/lenovo/l520/cmos.default
 +++ b/src/mainboard/lenovo/l520/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
  trackpoint=Enable
  backlight=Both
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index 8244071b8a..c011867916 100644
+index 6fd26c5fe3..27a62d07b3 100644
 --- a/src/mainboard/lenovo/t420/cmos.default
 +++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
  trackpoint=Enable
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index 8244071b8a..c011867916 100644
+index 6fd26c5fe3..27a62d07b3 100644
 --- a/src/mainboard/lenovo/t420s/cmos.default
 +++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
  trackpoint=Enable
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 26795fe5cf..55e1e6c04e 100644
+index c896eadec1..6d1e172056 100644
 --- a/src/mainboard/lenovo/t430/cmos.default
 +++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  usb_always_on=Disable
  hybrid_graphics_mode=Integrated Only
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t430s/cmos.default b/src/mainboard/lenovo/t430s/cmos.default
-index 52dbf70377..b16800ca9e 100644
+index 286fb0ae8c..5a05c73721 100644
 --- a/src/mainboard/lenovo/t430s/cmos.default
 +++ b/src/mainboard/lenovo/t430s/cmos.default
-@@ -16,4 +16,4 @@ backlight=Both
+@@ -18,4 +18,4 @@ backlight=Both
  enable_dual_graphics=Disable
  usb_always_on=Disable
  f1_to_f12_as_primary=Enable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index cf79b391e2..b66f7034dc 100644
+index 4857f92f67..ab1be1a678 100644
 --- a/src/mainboard/lenovo/t520/cmos.default
 +++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index cf79b391e2..b66f7034dc 100644
+index 4857f92f67..ab1be1a678 100644
 --- a/src/mainboard/lenovo/t530/cmos.default
 +++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index 6d1d57a795..52f303dfdb 100644
+index ef706c1303..b318ab9772 100644
 --- a/src/mainboard/lenovo/x220/cmos.default
 +++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -13,4 +13,4 @@ usb_always_on=Disable
+@@ -15,4 +15,4 @@ usb_always_on=Disable
  fn_ctrl_swap=Disable
  sticky_fn=Disable
  trackpoint=Enable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/protectli/vault_cml/cmos.default b/src/mainboard/protectli/vault_cml/cmos.default
-index 62715bc6ba..129b5fd121 100644
+index d61046df6b..8c793fd1c3 100644
 --- a/src/mainboard/protectli/vault_cml/cmos.default
 +++ b/src/mainboard/protectli/vault_cml/cmos.default
-@@ -1,3 +1,3 @@
+@@ -2,4 +2,4 @@
+ 
  boot_option=Fallback
  debug_level=Debug
 -me_state=Enable
 +me_state=Disabled
 diff --git a/src/mainboard/system76/tgl-u/cmos.default b/src/mainboard/system76/tgl-u/cmos.default
-index 62715bc6ba..129b5fd121 100644
+index d61046df6b..8c793fd1c3 100644
 --- a/src/mainboard/system76/tgl-u/cmos.default
 +++ b/src/mainboard/system76/tgl-u/cmos.default
-@@ -1,3 +1,3 @@
+@@ -2,4 +2,4 @@
+ 
  boot_option=Fallback
  debug_level=Debug
 -me_state=Enable
 +me_state=Disabled
 -- 
-2.39.2
+2.39.5
 

config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch

@@ -1,23 +0,0 @@
-From 5fc03fbf8c7fa30588dab93c76b5532ce03b1610 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:10:33 +0100
-Subject: [PATCH 05/22] lenovo/t400: set VRAM to 256MiB VRAM by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/lenovo/t400/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default
-index a326e315b1..b907a3e2df 100644
---- a/src/mainboard/lenovo/t400/cmos.default
-+++ b/src/mainboard/lenovo/t400/cmos.default
-@@ -13,4 +13,4 @@ power_management_beeps=Enable
- low_battery_beep=Enable
- sata_mode=AHCI
- hybrid_graphics_mode=Integrated Only
--gfx_uma_size=32M
-+gfx_uma_size=256M
--- 
-2.39.2
-

config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch

@@ -1,7 +1,7 @@
-From 38c76afbea4abfed2976bfbe10977e41f21665b0 Mon Sep 17 00:00:00 2001
+From f592ac32892d7f99fa2e68504bb147e5d06184ca Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
+From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 15/22] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 05/37] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -20,87 +20,87 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 83 insertions(+), 31 deletions(-)
 
 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index ddbc0fb91b..7af9235ae3 100644
+index b21a89c0e1..fc91d4c239 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -1847,6 +1847,7 @@ static void print_usage(const char *name)
+@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
+ 	       "                                         tgl    - Tiger Lake\n"
  	       "                                         wbg    - Wellsburg\n"
  	       "   -S | --setpchstrap                    Write a PCH strap\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
 +	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
  	       "   -v | --version:                       print the version\n"
  	       "   -h | --help:                          print this help\n\n"
- 	       "<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
+@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
-@@ -1854,6 +1855,60 @@ static void print_usage(const char *name)
  	       "\n");
  }
  
 +static int
 +get_region_type_string(const char *region_type_string)
 +{
-+	if (!strcasecmp("Descriptor", region_type_string))
++       if (!strcasecmp("Descriptor", region_type_string))
-+		return 0;
++               return 0;
-+	else if (!strcasecmp("BIOS", region_type_string))
++       else if (!strcasecmp("BIOS", region_type_string))
-+		return 1;
++               return 1;
-+	else if (!strcasecmp("ME", region_type_string))
++       else if (!strcasecmp("ME", region_type_string))
-+		return 2;
++               return 2;
-+	else if (!strcasecmp("GbE", region_type_string))
++       else if (!strcasecmp("GbE", region_type_string))
-+		return 3;
++               return 3;
-+	else if (!strcasecmp("Platform Data", region_type_string))
++       else if (!strcasecmp("Platform Data", region_type_string))
-+		return 4;
++               return 4;
-+	else if (!strcasecmp("Device Exp1", region_type_string))
++       else if (!strcasecmp("Device Exp1", region_type_string))
-+		return 5;
++               return 5;
-+	else if (!strcasecmp("Secondary BIOS", region_type_string))
++       else if (!strcasecmp("Secondary BIOS", region_type_string))
-+		return 6;
++               return 6;
-+	else if (!strcasecmp("Reserved", region_type_string))
++       else if (!strcasecmp("Reserved", region_type_string))
-+		return 7;
++               return 7;
-+	else if (!strcasecmp("EC", region_type_string))
++       else if (!strcasecmp("EC", region_type_string))
-+		return 8;
++               return 8;
-+	else if (!strcasecmp("Device Exp2", region_type_string))
++       else if (!strcasecmp("Device Exp2", region_type_string))
-+		return 9;
++               return 9;
-+	else if (!strcasecmp("IE", region_type_string))
++       else if (!strcasecmp("IE", region_type_string))
-+		return 10;
++               return 10;
-+	else if (!strcasecmp("10GbE_0", region_type_string))
++       else if (!strcasecmp("10GbE_0", region_type_string))
-+		return 11;
++               return 11;
-+	else if (!strcasecmp("10GbE_1", region_type_string))
++       else if (!strcasecmp("10GbE_1", region_type_string))
-+		return 12;
++               return 12;
-+	else if (!strcasecmp("PTT", region_type_string))
++       else if (!strcasecmp("PTT", region_type_string))
-+		return 15;
++               return 15;
-+	return -1;
++       return -1;
 +}
 +
 +static void
 +nuke(const char *filename, char *image, int size, int region_type)
 +{
-+	int i;
++       int i;
-+	struct region region;
++       struct region region;
-+	const struct frba *frba = find_frba(image, size);
++       const struct frba *frba = find_frba(image, size);
-+	if (!frba)
++       if (!frba)
-+		exit(EXIT_FAILURE);
++               exit(EXIT_FAILURE);
 +
-+	region = get_region(frba, region_type);
++       region = get_region(frba, region_type);
-+	if (region.size > 0) {
++       if (region.size > 0) {
-+		for (i = region.base; i <= region.limit; i++) {
++               for (i = region.base; i <= region.limit; i++) {
-+			if ((i + 1) > (size))
++                       if ((i + 1) > (size))
-+				break;
++                               break;
-+			image[i] = 0xFF;
++                       image[i] = 0xFF;
-+		}
++               }
-+		write_image(filename, image, size);
++               write_image(filename, image, size);
-+	}
++       }
 +}
 +
  int main(int argc, char *argv[])
  {
  	int opt, option_index = 0;
-@@ -1861,6 +1916,7 @@ int main(int argc, char *argv[])
+@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
  	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
  	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
  	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
 +	int mode_nuke = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
+ 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
- 	const char *layout_fname = NULL;
+ 	char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
  	char *new_filename = NULL;
-@@ -1892,6 +1948,7 @@ int main(int argc, char *argv[])
+@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
  		{"validate", 0, NULL, 't'},
  		{"setpchstrap", 1, NULL, 'S'},
  		{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index ddbc0fb91b..7af9235ae3 100644
  		{0, 0, 0, 0}
  	};
  
-@@ -1941,35 +1998,8 @@ int main(int argc, char *argv[])
+@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
  			region_fname++;
  			// Descriptor, BIOS, ME, GbE, Platform
  			// valid type?
@@ -146,7 +146,7 @@ index ddbc0fb91b..7af9235ae3 100644
  				fprintf(stderr, "No such region type: '%s'\n\n",
  					region_type_string);
  				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2135,6 +2165,22 @@ int main(int argc, char *argv[])
+@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
  		case 't':
  			mode_validate = 1;
  			break;
@@ -169,37 +169,37 @@ index ddbc0fb91b..7af9235ae3 100644
  		case 'v':
  			print_version();
  			exit(EXIT_SUCCESS);
-@@ -2150,7 +2196,8 @@ int main(int argc, char *argv[])
+@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
- 
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
--			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate) > 1) {
+ 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
-+			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
+-			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
++			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
 +			mode_nuke) > 1) {
  		fprintf(stderr, "You may not specify more than one mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2158,7 +2205,8 @@ int main(int argc, char *argv[])
+@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
- 
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
--			mode_locked + mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
+ 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
-+			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
+-			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
-+			mode_validate + mode_nuke) == 0) {
++			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++			mode_nuke) == 0) {
  		fprintf(stderr, "You need to specify a mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2262,6 +2310,10 @@ int main(int argc, char *argv[])
+@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
  		write_image(new_filename, image, size);
  	}
  
 +	if (mode_nuke) {
-+               nuke(new_filename, image, size, region_type);
++		nuke(new_filename, image, size, region_type);
-+       }
++	}
 +
  	if (mode_altmedisable) {
  		struct fpsba *fpsba = find_fpsba(image, size);
  		struct fmsba *fmsba = find_fmsba(image, size);
 -- 
-2.39.2
+2.39.5
 

config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch

@@ -1,23 +0,0 @@
-From 93f607fed477b3e63b7929808937436ac2898b34 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:11:59 +0100
-Subject: [PATCH 06/22] lenovo/x200: set VRAM to 256MiB by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/lenovo/x200/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default
-index bb4323836e..458b3f19c5 100644
---- a/src/mainboard/lenovo/x200/cmos.default
-+++ b/src/mainboard/lenovo/x200/cmos.default
-@@ -12,4 +12,4 @@ sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=256M
--- 
-2.39.2
-

config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch

@@ -1,7 +1,7 @@
-From a65797a9e7e610b1c916cb4d275b72848622c218 Mon Sep 17 00:00:00 2001
+From 18069af7c0c6beedfadb615cca9127e82a0d8007 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 18/22] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 06/37] mb/dell/e6400: Enable 01.0 device in devicetree for
  dGPU models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
@@ -24,5 +24,5 @@ index bb954cbd7b..e9f3915d17 100644
  		device pci 02.1 on end # Display
  		device pci 03.0 on end # ME
 -- 
-2.39.2
+2.39.5
 

config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch

@@ -1,7 +1,7 @@
-From 7d5452bc3358cf82eea48fde312494bcb4ca8101 Mon Sep 17 00:00:00 2001
+From 9563c107a4b40e66b610d7205a21590c7c181c78 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 19/22] Remove warning for coreboot images built without a
+Subject: [PATCH 07/37] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
@@ -9,19 +9,19 @@ roms without a payload resulting in a no boot situation, but in
 libreboot lbmk handles the payload and thus this warning always comes
 up. This has caused confusion and concern so just patch it out.
 ---
- payloads/Makefile.inc | 13 +------------
+ payloads/Makefile.mk | 13 +------------
  1 file changed, 1 insertion(+), 12 deletions(-)
 
-diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
+diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index e735443a76..4f1692a873 100644
+index 5f988dac1b..516133880f 100644
---- a/payloads/Makefile.inc
+--- a/payloads/Makefile.mk
-+++ b/payloads/Makefile.inc
++++ b/payloads/Makefile.mk
-@@ -49,16 +49,5 @@ distclean-payloads:
+@@ -50,16 +50,5 @@ distclean-payloads:
  print-repo-info-payloads:
  	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
  
 -ifeq ($(CONFIG_PAYLOAD_NONE),y)
--files_added:: warn_no_payload
+-show_notices:: warn_no_payload
 -endif
 -
 -warn_no_payload:
@@ -35,5 +35,5 @@ index e735443a76..4f1692a873 100644
 -.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
 +.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
 -- 
-2.39.2
+2.39.5
 

config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch

@@ -1,23 +0,0 @@
-From 9faa780b2ac45bc1bf61aa252364ee3158c4cb10 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:18:26 +0100
-Subject: [PATCH 07/22] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-index 8372032119..bedad54d2a 100644
---- a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-+++ b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- power_on_after_fail=Enable
- nmi=Enable
--gfx_uma_size=64M
-+gfx_uma_size=256M
--- 
-2.39.2
-

config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch

@@ -1,19 +1,19 @@
-From 9f52555eac217623ad2edc72492f9ded6a5b538d Mon Sep 17 00:00:00 2001
+From 7f650a19d30fe6157b150c5248d6086007323d72 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 08/37] HACK: Disable coreboot related BL31 features
 
 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
 ---
- src/arch/arm64/Makefile.inc | 3 ---
+ src/arch/arm64/Makefile.mk | 3 ---
  1 file changed, 3 deletions(-)
 
-diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
+diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
-index 6b49743633c3..e1982d92cc5c 100644
+index f54c6d22fc..b075abfd42 100644
---- a/src/arch/arm64/Makefile.inc
+--- a/src/arch/arm64/Makefile.mk
-+++ b/src/arch/arm64/Makefile.inc
++++ b/src/arch/arm64/Makefile.mk
-@@ -158,9 +158,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
+@@ -162,9 +162,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
  # Always enable crash reporting, even on a release build
  BL31_MAKEARGS += CRASH_REPORTING=1
  
@@ -24,5 +24,5 @@ index 6b49743633c3..e1982d92cc5c 100644
  BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
  
 -- 
-2.40.1
+2.39.5
 

config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch

@@ -1,23 +0,0 @@
-From f1c59cd67446303a5cdf9107461247a63f894de3 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:21:39 +0100
-Subject: [PATCH 08/22] acer/g43t-am3: set VRAM to 256MiB by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/acer/g43t-am3/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/acer/g43t-am3/cmos.default b/src/mainboard/acer/g43t-am3/cmos.default
-index 706f5dd551..e8b45ea22c 100644
---- a/src/mainboard/acer/g43t-am3/cmos.default
-+++ b/src/mainboard/acer/g43t-am3/cmos.default
-@@ -3,4 +3,4 @@ debug_level=Debug
- power_on_after_fail=Disable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=64M
-+gfx_uma_size=256M
--- 
-2.39.2
-

config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch

@@ -0,0 +1,30 @@
+From 3f6f65ed6a435fe49534c8a0b5cb98c3eac71150 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 11:41:41 +0000
+Subject: [PATCH 09/37] dell/e6430: use ME Soft Temporary Disable
+
+i overlooked this. it's set on other boards.
+
+we use me_cleaner anyway, and we set the hap bit, but
+this additional setting takes effect even if the ME
+region is unaltered. it's just another layer of
+disablement, to absolutely ensure Intel ME is not alive
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/dell/snb_ivb_latitude/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/cmos.default b/src/mainboard/dell/snb_ivb_latitude/cmos.default
+index 2a5b30f2b7..279415dfd1 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/cmos.default
++++ b/src/mainboard/dell/snb_ivb_latitude/cmos.default
+@@ -6,4 +6,4 @@ bluetooth=Enable
+ wwan=Enable
+ wlan=Enable
+ sata_mode=AHCI
+-me_state=Normal
++me_state=Disabled
+-- 
+2.39.5
+

config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch

@@ -1,22 +0,0 @@
-From 2c103a71a37eb4db9d33928b2371a682ca04e65f Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 20 Dec 2021 01:29:31 +0000
-Subject: [PATCH 10/22] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
- default
-
----
- src/mainboard/lenovo/x230/cmos.default | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 7314066c2b..2e315d4521 100644
---- a/src/mainboard/lenovo/x230/cmos.default
-+++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
- usb_always_on=Disable
- f1_to_f12_as_primary=Enable
- me_state=Normal
-+gfx_uma_size=224M
--- 
-2.39.2
-

config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch

@@ -0,0 +1,872 @@
+From b4d48233a8d829d7285501f662d999aad898be21 Mon Sep 17 00:00:00 2001
+From: Riku Viitanen <riku.viitanen@protonmail.com>
+Date: Sat, 23 Dec 2023 19:02:10 +0200
+Subject: [PATCH 10/37] mb/hp: Add Compaq Elite 8300 CMT port
+
+Based on autoport and Z220 SuperIO code.
+
+With SeaBIOS and Nouveau on Debian, only nomodeset works with GTX 780
+(must use proprietary driver instead).
+
+Tested by xilynx / spot_ on #libreboot:
+- i3-3220, native raminit 2x2GB, M378B5773DH0-CH9 + MT8JTF25664AZ-1G6M1
+- Celeron G1620, native raminit 1x4GB, MT8JTF51264AZ-1G6E1
+- Booting Debian with Linux 6.1.0-16-amd64 via SeaBIOS
+- All SATA ports
+- Audio: internal speaker, headphone and microphone plugs
+- Rebooting
+- S3 suspend and wake
+- libgfxinit: VGA, DisplayPort
+- Ethernet
+- Super I/O: fan speeds stay in control
+- GPU in PEG slot
+
+Untested:
+- EHCI debugging
+- Other PCI/PCIe slots
+- PS/2
+- Serial, parallel ports
+
+Change-Id: Ie6ec60d2f4ee50d5e3fa2847c19fa4cf0ab73363
+Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
+---
+ .../hp/compaq_elite_8300_cmt/Kconfig          |  39 ++++
+ .../hp/compaq_elite_8300_cmt/Kconfig.name     |   2 +
+ .../hp/compaq_elite_8300_cmt/Makefile.mk      |   7 +
+ .../hp/compaq_elite_8300_cmt/acpi/ec.asl      |   1 +
+ .../compaq_elite_8300_cmt/acpi/platform.asl   |  10 +
+ .../hp/compaq_elite_8300_cmt/acpi/superio.asl |  29 +++
+ .../hp/compaq_elite_8300_cmt/acpi_tables.c    |  12 ++
+ .../hp/compaq_elite_8300_cmt/board_info.txt   |   5 +
+ .../hp/compaq_elite_8300_cmt/cmos.default     |   7 +
+ .../hp/compaq_elite_8300_cmt/cmos.layout      |  74 +++++++
+ .../hp/compaq_elite_8300_cmt/data.vbt         | Bin 0 -> 3902 bytes
+ .../hp/compaq_elite_8300_cmt/devicetree.cb    | 177 ++++++++++++++++
+ .../hp/compaq_elite_8300_cmt/dsdt.asl         |  26 +++
+ .../hp/compaq_elite_8300_cmt/early_init.c     |  14 ++
+ .../compaq_elite_8300_cmt/gma-mainboard.ads   |  17 ++
+ src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++
+ .../hp/compaq_elite_8300_cmt/hda_verb.c       |  33 +++
+ .../hp/compaq_elite_8300_cmt/mainboard.c      |  16 ++
+ 18 files changed, 660 insertions(+)
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+new file mode 100644
+index 0000000000..d2bfd35dc4
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+@@ -0,0 +1,39 @@
++if BOARD_HP_COMPAQ_ELITE_8300_CMT
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_16384
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_TPM1
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select MEMORY_MAPPED_TPM
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_C216
++	select SUPERIO_NUVOTON_NPCD378
++	select USE_NATIVE_RAMINIT
++
++config CBFS_SIZE
++	default 0x570000
++
++config MAINBOARD_DIR
++	default "hp/compaq_elite_8300_cmt"
++
++config MAINBOARD_PART_NUMBER
++	default "HP Compaq Elite 8300 CMT"
++
++config VGA_BIOS_ID
++	default "8086,0152"
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config USBDEBUG_HCD_INDEX # FIXME: check this
++	default 2
++endif
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+new file mode 100644
+index 0000000000..bd399b1e76
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_HP_COMPAQ_ELITE_8300_CMT
++	bool "Compaq Elite 8300 CMT"
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
+new file mode 100644
+index 0000000000..fb492d3583
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+new file mode 100644
+index 0000000000..73fa78ef14
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+@@ -0,0 +1 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+new file mode 100644
+index 0000000000..aff432b6f4
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	Return(Package() {0, 0})
++}
++
++Method(_PTS, 1)
++{
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+new file mode 100644
+index 0000000000..54f8e3fe95
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+@@ -0,0 +1,29 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++/* Copied over from compaq_8200_elite_sff/acpi/superio.asl */
++
++#include <superio/nuvoton/npcd378/acpi/superio.asl>
++
++Scope (\_GPE)
++{
++	Method (_L0D, 0, NotSerialized)
++	{
++		Notify (\_SB.PCI0.EHC1, 0x02)
++		Notify (\_SB.PCI0.EHC2, 0x02)
++		//FIXME: Add GBE device
++		//Notify (\_SB.PCI0.GBE, 0x02)
++	}
++
++	Method (_L09, 0, NotSerialized)
++	{
++		Notify (\_SB.PCI0.RP01, 0x02)
++		Notify (\_SB.PCI0.RP02, 0x02)
++		Notify (\_SB.PCI0.RP03, 0x02)
++		Notify (\_SB.PCI0.RP04, 0x02)
++		Notify (\_SB.PCI0.RP05, 0x02)
++		Notify (\_SB.PCI0.RP06, 0x02)
++		Notify (\_SB.PCI0.RP07, 0x02)
++		Notify (\_SB.PCI0.RP08, 0x02)
++		Notify (\_SB.PCI0.PEGP, 0x02)
++	}
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+new file mode 100644
+index 0000000000..8f4f83b826
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+new file mode 100644
+index 0000000000..16c29e82d8
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+@@ -0,0 +1,5 @@
++Category: desktop
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2012
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+new file mode 100644
+index 0000000000..6d27a79c66
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+@@ -0,0 +1,7 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Enable
++nmi=Enable
++sata_mode=AHCI
++gfx_uma_size=32M
++psu_fan_lvl=3
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+new file mode 100644
+index 0000000000..1fc83b1a55
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+@@ -0,0 +1,74 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++400	3	h	0	psu_fan_lvl
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++
++421	1	e	9	sata_mode
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	IDE
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 415 984
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt b/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..ba627e152b65d779a80529d3811ec4d21c1b1e54
+GIT binary patch
+literal 3902
+zcmdT{U2GIp6h5;vvp;uc+U>N$b}h{<64)*MnJ%?9P1V_-)?HZIZFkwM#K;zQp(Lf0
+z<tLDc9kdaQ30aLnL^K;s2=dhMWTFo|nZ_7XjUmSPK!^{95W@p8ks#}tpO&8zIx!OQ
+zPQE$ko;~;Lz2}~D=XOmtlA-CLNM|A&X^#!0H)V!X1yJCH+Hrg@ZIQ%qdRr`<32%!e
+zhohV5IamQTwRf%o6o9FhLR}l4OH3XpP6S4SG(9$1II_L8yRfU+nK)!=G!;$I@QxkD
+ziDGH&K(Rp6*_Xmpr<F+L;O>b69XhyYd$H6<buRR#UELiUx+zsQbar)jhLo-lr6HwH
+z>Fo<WE0Nehba-<rkql=N!$Wj<l*SV2a5_D(Ig)&trbdV3iAW+d5R-_pl<3~6Bc<KD
+z#t+ayG>9yU(vE~()R;1j?k!Dq(D1|r9o2pI)6wGoV(Cz^&><0>;1cWR7zP*~YL5XE
+z{3`?=k6Yy2an&85Zl2-7jM~D`7^g}MH^6WOPE9askfBLVUBl5fj(Wi%F%Ax(<(|k=
+zUH4c9hXO|5?0UW22lb}G1;Fb@mzSZ8u5fTU59si@;V}EXTQ}(rl%Wn?F&a92X)&+>
+zPTj@>Ls7r4(ffK2={zn6t_hS-cTaC$zZ!`R#y2KYqnT`O>nqx^H{P7_!|gKQVi}A&
+z)G!L9*Z>@59dMlOh4owoes{Vd<dPwV$RfrOM_mMtBi==PggB45i1-TeHR314Rm63~
+z9|&+0AczJ;Ga`TpA^H)6h!kQgqJWr0I1j?@szU?Z5NsM_$vRVlmxGf*(9T-+vzFa+
+z!`K`kmJ}>$kl1)tt1cJZseb2!YSsO`J_8jQ^hAhROmRyl4au@8tDixs`{k^Dwd%=Z
+zH-yjQdy~%q^YKY<!Z~QsaFSLvP<_4(KebAii%moAUIzzXdbGph$OYv=h6VegT-HIX
+zhmBa>th;}v$r!Z-pnAN<1I)+#R``=|huU|*W1ew~tpBFsG0q;_jCFT6Ulxt*TNv8#
+z2{`>`$JM`Jd{F+EzpU7VIlvml?AFW1Xv$0tKyom(Ej2b-oERG0Q?%Jx8HYk6s9{*E
+z_)hegWIm-8PLF`1DpU2QrTKj4;VUElwQBD4f+hZ<s%)PPsp_Q#i!T5@)2taxv1ghG
+z<B&&<DI4jDn$!FOh>Zbggj@JDLYbjpK69X2PaAVr^Xn{6e+%<?63)ABGAHVvOwA0G
+zop-g`)B~42TA5y1<#p#*n`4^oSOPu_>i&oRk>LBlzUQG|c;s(9<VO#^<&i}~RuI}x
+z<RL<GguYJXG9hOOy+q_62>FFjhafiyq*<UbLCy*!FVMFH`LsYj73iEG|16MS1xiG@
+zNhE7UniS<%MKUhZlcHP^$pw+li}F>GTo<V<$!jFiA<>K^@07@tL{CZbd5K(<q}Cgp
+z=D5OWb(o)+1@4lFyO?u`hP=smQS!Cx@SCx8`ItCXGEp|?Se~I$OQ9>*L<3rb71Ew*
+zhn0l-*|a>v(n`=1+Du-&m2f&k|07qiv~u)9FuttfVcu_x;V>QXdsXjZ?db(%oNhK5
+zme#7yVBD-k)j4Zp4ohoWFJ0rv5wpCVNbYROUKoL9Ww31Rg%2ZHHV$2!ik&#T)={qH
+z{mrUEty8JFXPPS;w@^`Y*;z%PU#m>bK7$Oci}}Epjc<@x;b&~*!<k@Zeq?5~lKODv
+zA_EJ8u45$aFet6+Tz;mY_(sgz72qmZ5DkWZn3D#BWHRv7#wxD)p^~C26;X-mqrjL$
+z8S4>Op}BgEe0X$iI{Gx<zTS2<*M4^|Sg17^@EYY@zAl0)<Ta?zd%bn~D02?r)iu%P
+wm+F7xwtgQt<KA_UyAYqlTkT_cS089?Pr=)R7|a9^*a9j1U$>1p1;4R>1E3jwQUCw|
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+new file mode 100644
+index 0000000000..3d21739b72
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+@@ -0,0 +1,177 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip northbridge/intel/sandybridge
++	register "gfx.use_spread_spectrum_clock" = "0"
++	register "gpu_dp_b_hotplug" = "0"
++	register "gpu_dp_c_hotplug" = "0"
++	register "gpu_dp_d_hotplug" = "0"
++	# BTX mainboard: Reversed mapping
++	register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}"
++	device domain 0 on
++		subsystemid 0x103c 0x3396 inherit
++
++		device ref host_bridge on end # Host bridge Host bridge
++		device ref peg10 on end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "0"
++			register "gen1_dec" = "0x00fc0a01"
++			register "gen2_dec" = "0x00fc0801"
++			register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x1f"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++			register "superspeed_capable_ports" = "0x0000000f"
++			register "xhci_overcurrent_mapping" = "0x00000c03"
++			register "xhci_switchable_ports" = "0x0000000f"
++			register "usb_port_config" = "{
++				{ 1, 0, 0 },
++				{ 1, 0, 0 },
++				{ 1, 0, 1 },
++				{ 1, 0, 1 },
++				{ 1, 0, 2 },
++				{ 1, 0, 2 },
++				{ 1, 0, 3 },
++				{ 1, 0, 3 },
++				{ 1, 0, 4 },
++				{ 1, 0, 4 },
++				{ 1, 0, 6 },
++				{ 1, 0, 5 },
++				{ 1, 0, 5 },
++				{ 1, 0, 6 }
++			}"
++
++			device ref xhci on   end # USB 3.0 Controller
++			device ref mei1 off  end # Management Engine Interface 1
++			device ref mei2 off  end
++			device ref me_ide_r off end
++			device ref me_kt off end
++			device ref gbe on    end # Intel Gigabit Ethernet
++			device ref ehci1 on  end # USB2 EHCI #1
++			device ref ehci2 on  end # USB2 EHCI #2
++			device ref hda on    end # High Definition Audio
++			device ref sata1 on  end # SATA Controller 1
++			device ref sata2 off end # SATA Controller 2
++			device ref smbus on  end # SMBus
++
++			device ref pcie_rp1 on end
++			device ref pcie_rp2 on end
++			device ref pcie_rp3 on end
++			device ref pcie_rp4 on end
++			device ref pcie_rp5 on end
++			device ref pcie_rp6 on end
++			device ref pcie_rp7 on end
++			device ref pcie_rp8 on end
++
++			device ref pci_bridge on  end
++			device ref lpc on # LPC bridge
++				chip superio/common # copied from Z220
++					device pnp 2e.ff on # passes SIO base addr to SSDT gen
++						chip superio/nuvoton/npcd378
++							device pnp 2e.0 off end		# Floppy
++							device pnp 2e.1 on		# Parallel port
++								# global
++
++								# serialice: Vendor writes:
++								irq 0x14 = 0x9c
++								irq 0x1c = 0xa8
++								irq 0x1d = 0x08
++								irq 0x22 = 0x3f
++								irq 0x1a = 0xb0
++								# dumped from superiotool:
++								irq 0x1b = 0x1e
++								irq 0x27 = 0x08
++								irq 0x2a = 0x20
++								irq 0x2d = 0x01
++								# parallel port
++								io 0x60 = 0x378
++								irq 0x70 = 0x07
++								drq 0x74 = 0x01
++							end
++							device pnp 2e.2 off		# COM1
++								io 0x60 = 0x2f8
++								irq 0x70 = 3
++							end
++							device pnp 2e.3 on		# COM2, IR
++								io 0x60 = 0x3f8
++								irq 0x70 = 4
++							end
++							device pnp 2e.4 on		# LED control
++								io 0x60 = 0x600
++								# IOBASE[0h] = bit0 LED red / green
++								# IOBASE[0h] = bit1-4 LED PWM duty cycle
++								# IOBASE[1h] = bit6 SWCC
++
++								io 0x62 = 0x610
++								# IOBASE [0h] = GPES
++								# IOBASE [1h] = GPEE
++								# IOBASE [4h:7h] = 32bit upcounter at 1Mhz
++								# IOBASE [8h:bh] = GPS
++								# IOBASE [ch:fh] = GPE
++							end
++							device pnp 2e.5 on		# Mouse
++								irq 0x70 = 0xc
++							end
++							device pnp 2e.6 on		# Keyboard
++								io 0x60 = 0x0060
++								io 0x62 = 0x0064
++								irq 0x70 = 0x01
++								# serialice: Vendor writes:
++								drq 0xf0 = 0x40
++							end
++							device pnp 2e.7 on		#  WDT ?
++								io 0x60 = 0x620
++							end
++							device pnp 2e.8 on		# HWM
++								io 0x60 = 0x800
++								# IOBASE[0h:feh] HWM page
++								# IOBASE[ffh] bit0-bit3 page selector
++
++								drq 0xf0 = 0x20
++								drq 0xf1 = 0x01
++								drq 0xf2 = 0x40
++								drq 0xf3 = 0x01
++
++								drq 0xf4 = 0x66
++								drq 0xf5 = 0x67
++								drq 0xf6 = 0x66
++								drq 0xf7 = 0x01
++							end
++							device pnp 2e.f on		# GPIO OD ?
++								drq 0xf1 = 0x97
++								drq 0xf2 = 0x01
++								drq 0xf5 = 0x08
++								drq 0xfe = 0x80
++							end
++							device pnp 2e.15 on		# BUS ?
++								io 0x60 = 0x0680
++								io 0x62 = 0x0690
++							end
++							device pnp 2e.1c on		# Suspend Control ?
++								io 0x60 = 0x640
++								# writing to IOBASE[5h]
++								#  0x0: Power off
++								#  0x9: Power off and bricked until CMOS battery removed
++							end
++							device pnp 2e.1e on		# GPIO ?
++								io 0x60 = 0x660
++								drq 0xf4 = 0x01
++								# skip the following, as it
++								# looks like remapped registers
++								#drq 0xf5 = 0x06
++								#drq 0xf6 = 0x60
++								#drq 0xfe = 0x03
++							end
++						end
++					end
++				end
++				chip drivers/pc80/tpm
++					device pnp 4e.0 on end          # TPM module
++				end
++			end
++		end
++	end
++end
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+new file mode 100644
+index 0000000000..e8e2b3a3e5
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+new file mode 100644
+index 0000000000..8d10c6317c
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <superio/nuvoton/npcd378/npcd378.h>
++#include <superio/nuvoton/common/nuvoton.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
++
++void bootblock_mainboard_early_init(void)
++{
++	if (CONFIG(CONSOLE_SERIAL))
++		nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+new file mode 100644
+index 0000000000..686f7d44db
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+@@ -0,0 +1,17 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP2,
++      HDMI2,
++      Analog,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+new file mode 100644
+index 0000000000..2ae852ae51
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+@@ -0,0 +1,191 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_NATIVE,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_NATIVE,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_GPIO,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_NATIVE,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_NATIVE,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio11 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_OUTPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_OUTPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_OUTPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio15 = GPIO_LEVEL_LOW,
++	.gpio17 = GPIO_LEVEL_LOW,
++	.gpio28 = GPIO_LEVEL_LOW,
++	.gpio29 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio1 = GPIO_INVERT,
++	.gpio6 = GPIO_INVERT,
++	.gpio11 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_GPIO,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_NATIVE,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_NATIVE,
++	.gpio61 = GPIO_MODE_GPIO,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio43 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio61 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_GPIO,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_OUTPUT,
++	.gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++	.gpio71 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+new file mode 100644
+index 0000000000..a1eafcda68
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x10ec0221,	/* Codec Vendor / Device ID: Realtek */
++	0x103c3396,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x103c3396),
++	AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x01014020),
++	AZALIA_PIN_CFG(0, 0x17, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f),
++	AZALIA_PIN_CFG(0, 0x1b, 0x01813c30),
++	AZALIA_PIN_CFG(0, 0x1d, 0x415901f0),
++	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x58560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x58560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+new file mode 100644
+index 0000000000..8dbd95ef96
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++static void mainboard_enable(struct device *dev)
++{
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.39.5
+

config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch

@@ -0,0 +1,292 @@
+From a16ff494adb1f706d402a2e167d0d53c775d0897 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 2 Mar 2024 22:51:09 +0000
+Subject: [PATCH 11/37] nb/intel/haswell: make IOMMU a runtime option
+
+When I tested graphics cards on a coreboot port for Dell
+OptiPlex 9020 SFF, I could not use a graphics card unless
+I set iommu=off on the Linux cmdline.
+
+Coreboot's current behaviour is to check whether the CPU
+has vt-d support and, if it does, initialise the IOMMU.
+
+This patch maintains the current behaviour by default, but
+allows the user to turn *off* the IOMMU, even if vt-d is
+supported by the host CPU.
+
+If iommu=Disable is specified, the check will not be
+performed, and the IOMMU will be left disabled. This option
+has been added to all current Haswell boards, though it is
+recommended to leave the IOMMU turned on in most setups.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/asrock/b85m_pro4/cmos.default    | 1 +
+ src/mainboard/asrock/b85m_pro4/cmos.layout     | 3 +++
+ src/mainboard/asrock/h81m-hds/cmos.default     | 1 +
+ src/mainboard/asrock/h81m-hds/cmos.layout      | 6 ++++++
+ src/mainboard/dell/optiplex_9020/cmos.default  | 1 +
+ src/mainboard/dell/optiplex_9020/cmos.layout   | 6 ++++++
+ src/mainboard/google/beltino/cmos.layout       | 5 +++++
+ src/mainboard/google/slippy/cmos.layout        | 5 +++++
+ src/mainboard/intel/baskingridge/cmos.layout   | 4 ++++
+ src/mainboard/lenovo/haswell/cmos.default      | 1 +
+ src/mainboard/lenovo/haswell/cmos.layout       | 3 +++
+ src/mainboard/supermicro/x10slm-f/cmos.default | 1 +
+ src/mainboard/supermicro/x10slm-f/cmos.layout  | 6 ++++++
+ src/northbridge/intel/haswell/early_init.c     | 5 +++++
+ 14 files changed, 48 insertions(+)
+
+diff --git a/src/mainboard/asrock/b85m_pro4/cmos.default b/src/mainboard/asrock/b85m_pro4/cmos.default
+index 01bf20ad16..dfc8b80fb0 100644
+--- a/src/mainboard/asrock/b85m_pro4/cmos.default
++++ b/src/mainboard/asrock/b85m_pro4/cmos.default
+@@ -4,3 +4,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/asrock/b85m_pro4/cmos.layout b/src/mainboard/asrock/b85m_pro4/cmos.layout
+index efdc333fc2..c9883ea71d 100644
+--- a/src/mainboard/asrock/b85m_pro4/cmos.layout
++++ b/src/mainboard/asrock/b85m_pro4/cmos.layout
+@@ -11,6 +11,7 @@
+ 	395	4	e	4	debug_level
+ 	408	1	e	1	nmi
+ 	409	2	e	5	power_on_after_fail
++	412	1	e	6	iommu
+ 	984	16	h	0	check_sum
+ # -----------------------------------------------------------------
+ 
+@@ -38,6 +39,8 @@
+ 	5	0	Disable
+ 	5	1	Enable
+ 	5	2	Keep
++	6	0	Disable
++	6	1	Enable
+ # -----------------------------------------------------------------
+ 
+ # -----------------------------------------------------------------
+diff --git a/src/mainboard/asrock/h81m-hds/cmos.default b/src/mainboard/asrock/h81m-hds/cmos.default
+index 01bf20ad16..dfc8b80fb0 100644
+--- a/src/mainboard/asrock/h81m-hds/cmos.default
++++ b/src/mainboard/asrock/h81m-hds/cmos.default
+@@ -4,3 +4,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/asrock/h81m-hds/cmos.layout b/src/mainboard/asrock/h81m-hds/cmos.layout
+index c9ba76c78f..95ee3d36fb 100644
+--- a/src/mainboard/asrock/h81m-hds/cmos.layout
++++ b/src/mainboard/asrock/h81m-hds/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	6	iommu
++
+ # coreboot config options: check sums
+ 984	16	h	0	check_sum
+ 
+@@ -52,6 +55,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index 6c4a2a1be7..8000eea8c0 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -4,3 +4,4 @@ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
+ fan_full_speed=Disable
++iommu=Enable
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
+index d10ad95b23..4a1496a878 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.layout
++++ b/src/mainboard/dell/optiplex_9020/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# turn iommu on or off
++411	1	e	6	iommu
++
+ # coreboot config options: EC
+ 412	1	e	1	fan_full_speed
+ 
+@@ -55,6 +58,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/google/beltino/cmos.layout b/src/mainboard/google/beltino/cmos.layout
+index 78d44c1415..c143979ae1 100644
+--- a/src/mainboard/google/beltino/cmos.layout
++++ b/src/mainboard/google/beltino/cmos.layout
+@@ -19,6 +19,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +50,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/google/slippy/cmos.layout b/src/mainboard/google/slippy/cmos.layout
+index 78d44c1415..c143979ae1 100644
+--- a/src/mainboard/google/slippy/cmos.layout
++++ b/src/mainboard/google/slippy/cmos.layout
+@@ -19,6 +19,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +50,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/intel/baskingridge/cmos.layout b/src/mainboard/intel/baskingridge/cmos.layout
+index 78d44c1415..f2c602f541 100644
+--- a/src/mainboard/intel/baskingridge/cmos.layout
++++ b/src/mainboard/intel/baskingridge/cmos.layout
+@@ -19,6 +19,8 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +49,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/lenovo/haswell/cmos.default b/src/mainboard/lenovo/haswell/cmos.default
+index 08db97c5a9..cc6b363cd9 100644
+--- a/src/mainboard/lenovo/haswell/cmos.default
++++ b/src/mainboard/lenovo/haswell/cmos.default
+@@ -14,3 +14,4 @@ trackpoint=Enable
+ backlight=Keyboard
+ enable_dual_graphics=Disable
+ usb_always_on=Disable
++iommu=Enable
+diff --git a/src/mainboard/lenovo/haswell/cmos.layout b/src/mainboard/lenovo/haswell/cmos.layout
+index 27915d3ab7..59df76b64c 100644
+--- a/src/mainboard/lenovo/haswell/cmos.layout
++++ b/src/mainboard/lenovo/haswell/cmos.layout
+@@ -23,6 +23,7 @@ entries
+ 
+ # coreboot config options: EC
+ 411	1	e	8	first_battery
++413	1	e	14	iommu
+ 415	1	e	1	wlan
+ 416	1	e	1	trackpoint
+ 417	1	e	1	fn_ctrl_swap
+@@ -72,6 +73,8 @@ enumerations
+ 13	0	Disable
+ 13	1	AC and battery
+ 13	2	AC only
++14	0	Disable
++14	1	Enable
+ 
+ # -----------------------------------------------------------------
+ checksums
+diff --git a/src/mainboard/supermicro/x10slm-f/cmos.default b/src/mainboard/supermicro/x10slm-f/cmos.default
+index 7ce38fb5d7..6049e7938a 100644
+--- a/src/mainboard/supermicro/x10slm-f/cmos.default
++++ b/src/mainboard/supermicro/x10slm-f/cmos.default
+@@ -5,3 +5,4 @@ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Keep
+ hide_ast2400=Disable
++iommu=Enable
+diff --git a/src/mainboard/supermicro/x10slm-f/cmos.layout b/src/mainboard/supermicro/x10slm-f/cmos.layout
+index 38ba87aa45..24d39e97ee 100644
+--- a/src/mainboard/supermicro/x10slm-f/cmos.layout
++++ b/src/mainboard/supermicro/x10slm-f/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	6	iommu
++
+ # coreboot config options: mainboard
+ 416	1	e	1	hide_ast2400
+ 
+@@ -55,6 +58,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
+index e47deb5da6..1a7e0b1076 100644
+--- a/src/northbridge/intel/haswell/early_init.c
++++ b/src/northbridge/intel/haswell/early_init.c
+@@ -5,6 +5,7 @@
+ #include <device/mmio.h>
+ #include <device/pci_def.h>
+ #include <device/pci_ops.h>
++#include <option.h>
+ 
+ #include "haswell.h"
+ 
+@@ -157,6 +158,10 @@ static void haswell_setup_misc(void)
+ static void haswell_setup_iommu(void)
+ {
+ 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
++	u8 enable_iommu = get_uint_option("iommu", 1);
++
++	if (!enable_iommu)
++		return;
+ 
+ 	if (capid0_a & VTD_DISABLE)
+ 		return;
+-- 
+2.39.5
+

config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch

@@ -0,0 +1,29 @@
+From 4b0536ce7cd55eedc52d13497bea59d91e8924d8 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 2 Mar 2024 23:00:09 +0000
+Subject: [PATCH 12/37] dell/optiplex_9020: Disable IOMMU by default
+
+Needed to make graphics cards work. Turning it on is
+recommended if only using iGPU, otherwise leave it off
+by default. The IOMMU is extremely buggy when a graphics
+card is used. Leaving it off by default will ensure that
+the default ROM images in Libreboot will work on any setup.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_9020/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index 8000eea8c0..0700f971ee 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -4,4 +4,4 @@ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
+ fan_full_speed=Disable
+-iommu=Enable
++iommu=Disable
+-- 
+2.39.5
+

config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch

@@ -1,198 +0,0 @@
-From c73269315626678c191ea494338581abdc417f21 Mon Sep 17 00:00:00 2001
-From: Alexander Couzens <lynxis@fe80.eu>
-Date: Sat, 19 Mar 2022 13:42:33 +0000
-Subject: [PATCH 13/22] lenovo/x230: introduce FHD variant
-
-There is a modification for the x230 which uses the 2nd DP from the dock
-as the integrated panel's connection, which allows using a custom eDP
-panel instead of the stock LVDS display.
-
-There are several adapter boards present on the market and all of them
-uses the same method of enabling the custom eDP panel.
-
-To make this work with coreboot, the internal LVDS connector should be
-disabled in libgfxinit. The VBT has been modified as well, which allows
-brightness controls to work out of the box.
-
-The modifications done to the VBT are:
-- Remove the LVDS port entry.
-- Move the DP-3 (which is the 2nd DP on the dock) entry to the first
-  position on the list.
-- Set the DP-3 as internally connected.
-
-This has been reported to work with the following panels:
-- LP125WF2-SPB4 (1920*1080, 12.5")
-- LQ125T1JW02 (2560*1440, 12.5")
-- LQ133M1JW21 (1920*1080, 13.3")
-- LTN133HL10-201 (1920*1080, 13.3")
-- B133HAN04.6 (1920*1080, 13.3")
-- B133QAN02.0 (2560*1600, 13.3")
-
-Other eDP panels not on this list should work as well.
-
-Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0
-Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
-Signed-off-by: Felix Singer <felixsinger@posteo.net>
----
- src/mainboard/lenovo/x230/Kconfig             |  15 ++++++++-----
- src/mainboard/lenovo/x230/Kconfig.name        |   3 +++
- src/mainboard/lenovo/x230/Makefile.inc        |   5 +++++
- .../lenovo/x230/variants/x230_edp/data.vbt    | Bin 0 -> 4281 bytes
- .../x230/variants/x230_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
- 5 files changed, 38 insertions(+), 6 deletions(-)
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-
-diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
-index 279095629b..acfd0ed561 100644
---- a/src/mainboard/lenovo/x230/Kconfig
-+++ b/src/mainboard/lenovo/x230/Kconfig
-@@ -1,4 +1,4 @@
--if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S
-+if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
- 
- config BOARD_SPECIFIC_OPTIONS
- 	def_bool y
-@@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select H8_HAS_BAT_THRESHOLDS_IMPL
- 	select H8_HAS_PRIMARY_FN_KEYS if BOARD_LENOVO_X230S
- 	select NO_UART_ON_SUPERIO
--	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select BOARD_ROMSIZE_KB_16384 if BOARD_LENOVO_X230S
- 	select HAVE_ACPI_TABLES
- 	select HAVE_OPTION_TABLE
-@@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select INTEL_INT15
- 	select DRIVERS_RICOH_RCE822
- 	select MEMORY_MAPPED_TPM
--	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select MAINBOARD_HAS_LIBGFXINIT
- 	select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
- 	select INTEL_GMA_HAVE_VBT
-@@ -47,17 +47,20 @@ config MAINBOARD_DIR
- 	default "lenovo/x230"
- 
- config VARIANT_DIR
--	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	default "x230s" if BOARD_LENOVO_X230S
- 
- config MAINBOARD_PART_NUMBER
--	default "ThinkPad X230" if BOARD_LENOVO_X230
-+	default "ThinkPad X230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230_EDP
- 	default "ThinkPad X230t" if BOARD_LENOVO_X230T
- 	default "ThinkPad X230s" if BOARD_LENOVO_X230S
- 
- config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
-+config INTEL_GMA_VBT_FILE
-+	default "variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
-+
- config USBDEBUG_HCD_INDEX
- 	int
- 	default 2
-@@ -79,4 +82,4 @@ config PS2M_EISAID
- config THINKPADEC_HKEY_EISAID
- 	default "LEN0068"
- 
--endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S
-+endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
-diff --git a/src/mainboard/lenovo/x230/Kconfig.name b/src/mainboard/lenovo/x230/Kconfig.name
-index 1a01436879..e7290a12dd 100644
---- a/src/mainboard/lenovo/x230/Kconfig.name
-+++ b/src/mainboard/lenovo/x230/Kconfig.name
-@@ -6,3 +6,6 @@ config BOARD_LENOVO_X230T
- 
- config BOARD_LENOVO_X230S
- 	bool "ThinkPad X230s"
-+
-+config BOARD_LENOVO_X230_EDP
-+	bool "ThinkPad X230 eDP Mod (2K/FHD)"
-diff --git a/src/mainboard/lenovo/x230/Makefile.inc b/src/mainboard/lenovo/x230/Makefile.inc
-index 8e801f145d..6e6f9f90b9 100644
---- a/src/mainboard/lenovo/x230/Makefile.inc
-+++ b/src/mainboard/lenovo/x230/Makefile.inc
-@@ -5,4 +5,9 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
- romstage-y += variants/$(VARIANT_DIR)/early_init.c
- romstage-y += variants/$(VARIANT_DIR)/gpio.c
- ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
-+
-+ifeq ($(CONFIG_BOARD_LENOVO_X230_EDP),y)
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/x230_edp/gma-mainboard.ads
-+else
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
-+endif
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt b/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..13384d45571ff76e592335143d01315e37893186
-GIT binary patch
-literal 4281
-zcmdT`Z)_aZ5&ym0y}P}=-MjTVC6^<yCLz$XvE%h&S*h!)@6LAcg^PXugKH2XcDRE^
-zHNiLuN+i^5TbBk=p_5vr0Ri$CB!v1Q6%yhL5TS}%ZG|E}(5mW(6!8It5AdN?tBP`+
-zx3_i!7V#AnmCow7GdpkI?0YkBW_RywafYVHi@l}UV$Y$8VyQezRd{&CInDRYR4h$Q
-zA08>p6b={56T^4V^SA+LolmX+RUx+79#iSqiP~ars*|P{j#W<|Sw32Qpw?S@B$TK!
-zT%y8#_th3_%L^xJRhpi?y+F#XZ5B@+U98gh$p??rmIq1sVr%N_-*;O-QJ>e_m+#Gc
-zeSJjvzQO*1!F<1Mj*JdZ9IBMcg_+XCI898^NNKt-Jw1A;SiXxYQxjvQVrgb{#5RMi
-z3_rAVdim%B-#tOO;ZDl)3wi>F!IEkCq2;B0R9IZ3DP?n<rfSD)%a7Em`)pG=xClcR
-zfQTY3AQJz|BVh>3(8mm!Gbk$bf{?ofjp)+WX;f0xKuMreM_FPop&M`zu|-4&b{lx}
-z6dXr%nIN^a1Q1g^?g`SApyQo+We^Ju;y^Soa0Kxp0ExE)gG^{(s5wk=5)@Iwe?zpD
-z@%1v$crW@+c=`T;{ewfYIC5a@V7W3iGdp+pJ^l}V_@k99K7NB27i?KEp$JF`50mi@
-zjG1XXrseRG7Qw69ek|x~_*Klqd$9}}jBGpu*K}~RX~1KAld;P%uwb}2&iFCo7mQyT
-zCSGP-Wc-%#2gY9*A29yLh$l?6F>Yks%;;r&gE7oF#P|+lf$=@YNyZt*<BXp%o@K;N
-z;^Rid2d9zA7a?zJayUAk?1cYJsDCEZCq4>N3Nz%%kOxj$xHTH_I6i5-#j$7@-%=}(
-z?1954MnX?xAuk79(<<Tf409Fpx$wEsNX+wNp0De7H-87y*XOlHqw#v9f#_UhUAnlg
-zi_2(JC*w<@<i}S-iI)}-&;1HW$=_hN&+7=v86dSJ5nbA)_y+kbU2PDFE??VVW9GW>
-zSr6;_4gTc~tacpa=As!xD;@CT7xX)U4}W57_`9~2N<i$1-Hq?ZdXRnseAKTSC4vUn
-zvU_KR`>pCP65!^@JyGbYMG6B#@{r1i&qF#431THdvdmK?gb!}@x&d86kH8RtSun)L
-zMg&qo8p@sxlqPr)H*t1i5Xc8fNK*dW_}wA77I--u)J{nAs;))bo<l6#G>8v<p5gy;
-z<c2$V&sxyMI7lIRD=DCSpmMmfaICgCzVKkJ#fR-<sP2F);1(})cA)7k<8|TuBs}RY
-zwKp{#FZ7<eJej>k&YfS^jD1^rM=s>0ytuB(<S=kXYsT9eI1^R*2UrsIpx#)DflmYL
-zcI2=F|Kw{2>VlIOTx;M223I$qhjl3%0pyLp$ECQ*_^UYE{?(M!zFMP3W9I<gN%(cT
-zyvs4>_cUj9w4&M7&s8K0k<cwUM!E2PTu7mct3rr`5sB*7)nZ4R`hWT~<uZuic%Tb%
-z5{?q{&YwfGl9W%nBS~{SNhgx-V@b1~q?eQKTGD(wN&iT?re$ukXwY)YmN{$Dqn7)m
-zWuCX_HOswZnSZhfw(HvFPMeChJ7b&o+O%T3=WKJ;rZ;W(kGA=)O-9Pirp&!5I+$|r
-zNtySj=%*?7xs>@rirz}Oms94I6gg>kPulEG+g%^&e&n+7+xV#SfijjY{5o+C7V}H-
-zZs9PGrN7SK-OZ8YGZ>yr(&i#tdss~q`sQ|0&fnIIOUJ;O2*-=b;v=kW?O}6KsoH4P
-z0smI&%EQn#cd@w$RZTVP=TtP?l7~|?nRTSIQO2qkgO+Z!=3#T$D-XeMvn68}T3Ey8
-zHleye(7mkLXe*JtfA{Q*lj!gc)Wck4IFj|C#q&~HiNmA&>Z|kF4(U<Y;5eIloj)C%
-zP4#WvIv2Sie|71?P3)md%>vj%v~DWNT8*x>a2}rST)i~8vd61DwO!2$JZMNNi6hyH
-z2d_)6&979w%w$-vyatVrqw??t&t%}iZhDAP3%j_I#cGANdzLq>W;J(F=Xwkxxj%^H
-zwQDmn=w}|@-y`RG{*wz0>A(ZGtk~AM=#-fE(LV1uZE98+Nk>UmiyyuJ8?##<Mr{1g
-p(B@uj-Va_SU#<T#GXLCvin_ms#}9BYOE7UKDyX7coWuJX{tbC=%boxL
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-new file mode 100644
-index 0000000000..f7cf0bc264
---- /dev/null
-+++ b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-@@ -0,0 +1,21 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (DP1,
-+      DP2,
-+      DP3,
-+      HDMI1,
-+      HDMI2,
-+      HDMI3,
-+      Analog,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
--- 
-2.39.2
-

config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch

@@ -0,0 +1,51 @@
+From c8329f84b2d06581dcbeecedc38b7c4715a9cba7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 6 Apr 2024 01:22:47 +0100
+Subject: [PATCH 13/37] nb/haswell: Fully disable iGPU when dGPU is used
+
+My earlier patch disabled decode *and* disabled the iGPU itself, but
+a subsequent revision disabled only VGA decode. Upon revisiting, I
+found that, actually, yes, you also need to disable the iGPU entirely.
+
+Tested on Dell 9020 SFF using broadwell MRC, with both iGPU and dGPU.
+With this patch, the iGPU is completely disabled when you install a
+graphics card, but the iGPU is available to use when no graphics card
+is present.
+
+For more context, see:
+
+Author: Leah Rowe <info@minifree.org>
+Date:   Fri Feb 23 13:33:31 2024 +0000
+
+    nb/haswell: Disable iGPU when dGPU is used
+
+And look at the Gerrit comments:
+
+https://review.coreboot.org/c/coreboot/+/80717/
+
+So, my original submission on change 80717 was actually correct.
+This patch fixes the issue. I tested on iGPU and dGPU, with both
+broadwell and haswell mrc.bin.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/haswell/gma.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
+index f7fad3183d..1b188e92e1 100644
+--- a/src/northbridge/intel/haswell/gma.c
++++ b/src/northbridge/intel/haswell/gma.c
+@@ -466,6 +466,9 @@ static void gma_func0_disable(struct device *dev)
+ {
+ 	/* Disable VGA decode */
+ 	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
++
++	/* Required or else the graphics card doesn't work */
++	dev->enabled = 0;
+ }
+ 
+ static struct device_operations gma_func0_ops = {
+-- 
+2.39.5
+

config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch

@@ -0,0 +1,147 @@
+From 73dbf291631fdbae2d8e8a761c147523c8d9e65c Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 3 May 2024 11:03:32 -0600
+Subject: [PATCH 14/37] ec/dell/mec5035: Add S3 suspend SMI handler
+
+This is necessary for S3 resume to work on SNB and newer Dell Latitude
+laptops. If a command isn't sent, the EC cuts power to the DIMMs,
+preventing the system from resuming. These commands were found using an
+FPGA to log all LPC bus transactions between the host and the EC and
+then narrowing down which ones were actually necessary.
+
+Interestingly, the command IDs appear to be identical to those in
+ec/google/wilco, the EC used on Dell Latitude Chromebooks, and that EC
+implements a similar S3 SMI handler as the one implemented in this
+commit. The Wilco EC Kconfig does suggest that its firmware is a
+modified version of Dell's usual Latitude EC firmware, so the
+similarities seem to be intentional.
+
+These similarities also identified a command to enable or disable wake
+sources like the power button and lid switch, and this was added to the
+SMI handler to disable lid wake as the system does not yet resume
+properly from a like wake with coreboot.
+
+Tested on the Latitude E6430 (Ivy Bridge) and the Precision M6800
+(Haswell, not yet pushed).
+
+Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/ec/dell/mec5035/Makefile.mk  |  1 +
+ src/ec/dell/mec5035/mec5035.c    | 14 ++++++++++++++
+ src/ec/dell/mec5035/mec5035.h    | 22 ++++++++++++++++++++++
+ src/ec/dell/mec5035/smihandler.c | 17 +++++++++++++++++
+ 4 files changed, 54 insertions(+)
+ create mode 100644 src/ec/dell/mec5035/smihandler.c
+
+diff --git a/src/ec/dell/mec5035/Makefile.mk b/src/ec/dell/mec5035/Makefile.mk
+index 4ebdd811f9..be557e4599 100644
+--- a/src/ec/dell/mec5035/Makefile.mk
++++ b/src/ec/dell/mec5035/Makefile.mk
+@@ -5,5 +5,6 @@ ifeq ($(CONFIG_EC_DELL_MEC5035),y)
+ bootblock-y += mec5035.c
+ romstage-y += mec5035.c
+ ramstage-y += mec5035.c
++smm-y += mec5035.c smihandler.c
+ 
+ endif
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index dffbb7960c..85c2ab0140 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -94,6 +94,20 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
+ 	ec_command(CMD_RADIO_CTRL);
+ }
+ 
++void mec5035_change_wake(u8 source, enum ec_wake_change change)
++{
++	u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
++	write_mailbox_regs(buf, 2, ACPI_WAKEUP_NUM_ARGS);
++	ec_command(CMD_ACPI_WAKEUP_CHANGE);
++}
++
++void mec5035_sleep_enable(void)
++{
++	u8 buf[SLEEP_EN_NUM_ARGS] = {3, 0};
++	write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
++	ec_command(CMD_SLEEP_ENABLE);
++}
++
+ void mec5035_early_init(void)
+ {
+ 	/* If this isn't sent the EC shuts down the system after about 15
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index 32f791cb01..8d4fded28b 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -4,12 +4,15 @@
+ #define _EC_DELL_MEC5035_H_
+ 
+ #include <stdint.h>
++#include <types.h>
+ 
+ #define NUM_REGISTERS	32
+ 
+ enum mec5035_cmd {
+ 	CMD_MOUSE_TP = 0x1a,
+ 	CMD_RADIO_CTRL = 0x2b,
++	CMD_ACPI_WAKEUP_CHANGE = 0x4a,
++	CMD_SLEEP_ENABLE = 0x64,
+ 	CMD_CPU_OK = 0xc2,
+ };
+ 
+@@ -33,9 +36,28 @@ enum ec_radio_state {
+ 	RADIO_ON
+ };
+ 
++#define ACPI_WAKEUP_NUM_ARGS 4
++enum ec_wake_change {
++	WAKE_OFF = 0,
++	WAKE_ON
++};
++
++/* Copied from ec/google/wilco/commands.h. Not sure if these all apply */
++enum ec_acpi_wake_events {
++	EC_ACPI_WAKE_PWRB = BIT(0),     /* Wake up by power button */
++	EC_ACPI_WAKE_LID = BIT(1),      /* Wake up by lid switch */
++	EC_ACPI_WAKE_RTC = BIT(5),      /* Wake up by RTC */
++};
++
++#define SLEEP_EN_NUM_ARGS 2
++
+ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
+ void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
++void mec5035_change_wake(u8 source, enum ec_wake_change change);
++void mec5035_sleep_enable(void);
++
++void mec5035_smi_sleep(int slp_type);
+ 
+ #endif /* _EC_DELL_MEC5035_H_ */
+diff --git a/src/ec/dell/mec5035/smihandler.c b/src/ec/dell/mec5035/smihandler.c
+new file mode 100644
+index 0000000000..958733bf97
+--- /dev/null
++++ b/src/ec/dell/mec5035/smihandler.c
+@@ -0,0 +1,17 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++#include <console/console.h>
++#include <ec/acpi/ec.h>
++#include "mec5035.h"
++
++void mec5035_smi_sleep(int slp_type)
++{
++	switch (slp_type) {
++	case ACPI_S3:
++		/* System does not yet resume properly if woken by lid */
++		mec5035_change_wake(EC_ACPI_WAKE_LID, WAKE_OFF);
++		mec5035_sleep_enable();
++		break;
++	}
++}
+-- 
+2.39.5
+

config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch

@@ -1,25 +0,0 @@
-From c32229e3f82c00abb2bee4d0f7ddf33d4c7a04dc Mon Sep 17 00:00:00 2001
-From: Alexei Sorokin <sor.alexei@meowr.ru>
-Date: Sun, 27 Nov 2022 18:36:26 +0300
-Subject: [PATCH 14/22] lenovo/x230: fix the data.vbt path for the EDP variant
-
----
- src/mainboard/lenovo/x230/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
-index acfd0ed561..34108c3c04 100644
---- a/src/mainboard/lenovo/x230/Kconfig
-+++ b/src/mainboard/lenovo/x230/Kconfig
-@@ -59,7 +59,7 @@ config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
- config INTEL_GMA_VBT_FILE
--	default "variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
-+       default "src/mainboard/\$(MAINBOARDDIR)/variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
- 
- config USBDEBUG_HCD_INDEX
- 	int
--- 
-2.39.2
-

config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch

@@ -0,0 +1,55 @@
+From a507fe609a2e99c95218ec430916eaf4c3cb61d9 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 4 May 2024 02:00:53 +0100
+Subject: [PATCH 15/37] nb/haswell: lock policy regs when disabling IOMMU
+
+Angel Pons told me I should do it. See comments here:
+https://review.coreboot.org/c/coreboot/+/81016
+
+I see no harm in complying with the request. I'll merge
+this into the main patch at a later date and try to
+get this upstreamed.
+
+Just a reminder: on Optiplex 9020 variants, Xorg locks up
+under Linux when tested with a graphics card; disabling
+IOMMU works around the issue. Intel graphics work just fine
+with IOMMU turned on. Libreboot disables IOMMU by default,
+on the 9020, so that users can install graphics cards easily.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/haswell/early_init.c | 15 +++++++--------
+ 1 file changed, 7 insertions(+), 8 deletions(-)
+
+diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
+index 1a7e0b1076..e9506ee830 100644
+--- a/src/northbridge/intel/haswell/early_init.c
++++ b/src/northbridge/intel/haswell/early_init.c
+@@ -160,17 +160,16 @@ static void haswell_setup_iommu(void)
+ 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
+ 	u8 enable_iommu = get_uint_option("iommu", 1);
+ 
+-	if (!enable_iommu)
+-		return;
+-
+ 	if (capid0_a & VTD_DISABLE)
+ 		return;
+ 
+-	/* Setup BARs: zeroize top 32 bits; set enable bit */
+-	mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
+-	mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
+-	mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
+-	mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
++	if (enable_iommu) {
++		/* Setup BARs: zeroize top 32 bits; set enable bit */
++		mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
++		mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
++		mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
++		mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
++	}
+ 
+ 	/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
+ 	u32 reg32;
+-- 
+2.39.5
+

config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch

@@ -1,47 +0,0 @@
-From 3ec06fa2393995b87af1dbc0387c5d3255d5c0db Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 16/22] fix speedstep on x200/t400: Revert
- "cpu/intel/model_1067x: enable PECI"
-
-This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
-
-Enabling PECI without microcode updates loaded causes the CPUID feature set
-to become corrupted. And one consequence is broken SpeedStep. At least, that's
-my understanding looking at Intel Errata. This revert is not a fix, because
-upstream is correct (upstream assumes microcode updates). We will simply
-maintain this revert patch in Libreboot, from now on.
----
- src/cpu/intel/model_1067x/model_1067x_init.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 315e7c36fc..1423fd72bc 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
- 	wrmsr(MSR_EMTTM_CR_TABLE(5), msr);
- }
- 
--#define IA32_PECI_CTL		0x5a0
--
- static void configure_misc(const int eist, const int tm2, const int emttm)
- {
- 	msr_t msr;
-@@ -185,13 +183,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
- 		msr.lo |= (1 << 20);	/* Lock Enhanced SpeedStep Enable */
- 		wrmsr(IA32_MISC_ENABLE, msr);
- 	}
--
--	/* Enable PECI
--	   WARNING: due to Erratum AW67 described in Intel document #318733
--	   the microcode must be updated before this MSR is written to. */
--	msr = rdmsr(IA32_PECI_CTL);
--	msr.lo |= 1;
--	wrmsr(IA32_PECI_CTL, msr);
- }
- 
- #define PIC_SENS_CFG	0x1aa
--- 
-2.39.2
-

config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch

@@ -0,0 +1,223 @@
+From 9e0a6aa376db81f9409eda92b6783a8262c1fedb Mon Sep 17 00:00:00 2001
+From: Angel Pons <th3fanbus@gmail.com>
+Date: Mon, 10 May 2021 22:40:59 +0200
+Subject: [PATCH 16/37] nb/intel/gm45: Make DDR2 raminit work
+
+List of changes:
+ - Update some timing and ODT values
+ - Patch RCOMP calibration to better match what MRC binaries do
+ - Replay a hardcoded list of RCOMP codes after RcvEn
+
+This makes raminit work at DDR2-800 speeds and fixes S3 resume as well.
+Tested on Toshiba Satellite A300-1ME with two 2 GiB DDR2-800 SO-DIMMs.
+
+Change-Id: Ibaee524b8ff652ddadd66cb0eb680401b988ff7c
+Signed-off-by: Angel Pons <th3fanbus@gmail.com>
+---
+ src/northbridge/intel/gm45/gm45.h             |  2 +-
+ src/northbridge/intel/gm45/raminit.c          | 90 +++++++++++++++++--
+ .../intel/gm45/raminit_rcomp_calibration.c    | 27 ++++--
+ 3 files changed, 106 insertions(+), 13 deletions(-)
+
+diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
+index 5d9ac56606..338260ea7a 100644
+--- a/src/northbridge/intel/gm45/gm45.h
++++ b/src/northbridge/intel/gm45/gm45.h
+@@ -420,7 +420,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
+ int raminit_read_vco_index(void);
+ u32 raminit_get_rank_addr(unsigned int channel, unsigned int rank);
+ 
+-void raminit_rcomp_calibration(stepping_t stepping);
++void raminit_rcomp_calibration(int ddr_type, stepping_t stepping);
+ void raminit_reset_readwrite_pointers(void);
+ void raminit_receive_enable_calibration(int ddr_type, const timings_t *, const dimminfo_t *);
+ void raminit_write_training(const mem_clock_t, const dimminfo_t *, int s3resume);
+diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
+index b7e013959a..df8f46fbbc 100644
+--- a/src/northbridge/intel/gm45/raminit.c
++++ b/src/northbridge/intel/gm45/raminit.c
+@@ -1047,7 +1047,7 @@ static void rcomp_initialization(const int spd_type, const stepping_t stepping,
+ 	}
+ 
+ 	/* Perform RCOMP calibration for DDR3. */
+-	raminit_rcomp_calibration(stepping);
++	raminit_rcomp_calibration(spd_type, stepping);
+ 
+ 	/* Run initial RCOMP. */
+ 	mchbar_setbits32(0x418, 1 << 17);
+@@ -1117,7 +1117,7 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
+ 				reg = (reg & ~(0xf << 10)) | (2 << 10);
+ 			else
+ 				reg = (reg & ~(0xf << 10)) | (3 << 10);
+-			reg = (reg & ~(0x7 <<  5)) | (3 << 5);
++			reg = (reg & ~(0x7 <<  5)) | (2 << 5);
+ 		} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
+ 			reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
+ 			reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
+@@ -1286,11 +1286,11 @@ static void ddr2_odt_setup(const timings_t *const timings, const int sff)
+ 		reg = (reg & ~(0xf << (44 - 32))) | (8 << (44 - 32));
+ 		reg = (reg & ~(0xf << (40 - 32))) | (7 << (40 - 32));
+ 		if (timings->mem_clock == MEM_CLOCK_667MT) {
+-			reg = (reg & ~(0xf << (36 - 32))) | (4 << (36 - 32));
+-			reg = (reg & ~(0xf << (32 - 32))) | (4 << (32 - 32));
++			reg = (reg & ~(0xf << (36 - 32))) | (8 << (36 - 32));
++			reg = (reg & ~(0xf << (32 - 32))) | (8 << (32 - 32));
+ 		} else {
+-			reg = (reg & ~(0xf << (36 - 32))) | (5 << (36 - 32));
+-			reg = (reg & ~(0xf << (32 - 32))) | (5 << (32 - 32));
++			reg = (reg & ~(0xf << (36 - 32))) | (9 << (36 - 32));
++			reg = (reg & ~(0xf << (32 - 32))) | (9 << (32 - 32));
+ 		}
+ 		mchbar_write32(CxODT_HIGH(ch), reg);
+ 
+@@ -2209,6 +2209,84 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
+ 		raminit_write_training(timings->mem_clock, dimms, s3resume);
+ 	}
+ 
++	/*
++	 * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
++	 * after receiver enable calibration, otherwise raminit sometimes
++	 * completes with non-working memory.
++	 */
++	mchbar_write32(0x0530, 0x06060005);
++	mchbar_write32(0x0680, 0x06060606);
++	mchbar_write32(0x0684, 0x08070606);
++	mchbar_write32(0x0688, 0x0e0e0c0a);
++	mchbar_write32(0x068c, 0x0e0e0e0e);
++	mchbar_write32(0x0698, 0x06060606);
++	mchbar_write32(0x069c, 0x08070606);
++	mchbar_write32(0x06a0, 0x0c0c0b0a);
++	mchbar_write32(0x06a4, 0x0c0c0c0c);
++
++	mchbar_write32(0x06c0, 0x02020202);
++	mchbar_write32(0x06c4, 0x03020202);
++	mchbar_write32(0x06c8, 0x04040403);
++	mchbar_write32(0x06cc, 0x04040404);
++	mchbar_write32(0x06d8, 0x02020202);
++	mchbar_write32(0x06dc, 0x03020202);
++	mchbar_write32(0x06e0, 0x04040403);
++	mchbar_write32(0x06e4, 0x04040404);
++
++	mchbar_write32(0x0700, 0x02020202);
++	mchbar_write32(0x0704, 0x03020202);
++	mchbar_write32(0x0708, 0x04040403);
++	mchbar_write32(0x070c, 0x04040404);
++	mchbar_write32(0x0718, 0x02020202);
++	mchbar_write32(0x071c, 0x03020202);
++	mchbar_write32(0x0720, 0x04040403);
++	mchbar_write32(0x0724, 0x04040404);
++
++	mchbar_write32(0x0740, 0x02020202);
++	mchbar_write32(0x0744, 0x03020202);
++	mchbar_write32(0x0748, 0x04040403);
++	mchbar_write32(0x074c, 0x04040404);
++	mchbar_write32(0x0758, 0x02020202);
++	mchbar_write32(0x075c, 0x03020202);
++	mchbar_write32(0x0760, 0x04040403);
++	mchbar_write32(0x0764, 0x04040404);
++
++	mchbar_write32(0x0780, 0x06060606);
++	mchbar_write32(0x0784, 0x09070606);
++	mchbar_write32(0x0788, 0x0e0e0c0b);
++	mchbar_write32(0x078c, 0x0e0e0e0e);
++	mchbar_write32(0x0798, 0x06060606);
++	mchbar_write32(0x079c, 0x09070606);
++	mchbar_write32(0x07a0, 0x0d0d0c0b);
++	mchbar_write32(0x07a4, 0x0d0d0d0d);
++
++	mchbar_write32(0x07c0, 0x06060606);
++	mchbar_write32(0x07c4, 0x09070606);
++	mchbar_write32(0x07c8, 0x0e0e0c0b);
++	mchbar_write32(0x07cc, 0x0e0e0e0e);
++	mchbar_write32(0x07d8, 0x06060606);
++	mchbar_write32(0x07dc, 0x09070606);
++	mchbar_write32(0x07e0, 0x0d0d0c0b);
++	mchbar_write32(0x07e4, 0x0d0d0d0d);
++
++	mchbar_write32(0x0840, 0x06060606);
++	mchbar_write32(0x0844, 0x08070606);
++	mchbar_write32(0x0848, 0x0e0e0c0a);
++	mchbar_write32(0x084c, 0x0e0e0e0e);
++	mchbar_write32(0x0858, 0x06060606);
++	mchbar_write32(0x085c, 0x08070606);
++	mchbar_write32(0x0860, 0x0c0c0b0a);
++	mchbar_write32(0x0864, 0x0c0c0c0c);
++
++	mchbar_write32(0x0880, 0x02020202);
++	mchbar_write32(0x0884, 0x03020202);
++	mchbar_write32(0x0888, 0x04040403);
++	mchbar_write32(0x088c, 0x04040404);
++	mchbar_write32(0x0898, 0x02020202);
++	mchbar_write32(0x089c, 0x03020202);
++	mchbar_write32(0x08a0, 0x04040403);
++	mchbar_write32(0x08a4, 0x04040404);
++
+ 	igd_compute_ggc(sysinfo);
+ 
+ 	/* Program final memory map (with real values). */
+diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+index aef863f05a..b74765fd9c 100644
+--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
++++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+@@ -161,11 +161,13 @@ static void lookup_and_write(const int a1step,
+ 		mchbar += 4;
+ 	}
+ }
+-void raminit_rcomp_calibration(const stepping_t stepping) {
++void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ 	const int a1step = stepping >= STEPPING_CONVERSION_A1;
+ 
+ 	int i;
+ 
++	char magic_comp[2] = {0};
++
+ 	enum {
+ 		PULL_UP = 0,
+ 		PULL_DOWN = 1,
+@@ -196,6 +198,10 @@ void raminit_rcomp_calibration(const stepping_t stepping) {
+ 		reg = mchbar_read32(0x518);
+ 		lut_idx[channel][group][PULL_UP] = (reg >> 24) & 0x7f;
+ 		lut_idx[channel][group][PULL_DOWN] = (reg >> 16) & 0x7f;
++		if (i == 1) {
++			magic_comp[0] = (reg >> 8) & 0x3f;
++			magic_comp[1] = (reg >> 0) & 0x3f;
++		}
+ 	}
+ 	/* Cleanup? */
+ 	mchbar_setbits32(0x400, 1 << 3);
+@@ -216,13 +222,19 @@ void raminit_rcomp_calibration(const stepping_t stepping) {
+ 	for (channel = 0; channel < 2; ++channel) {
+ 		for (group = 0; group < 6; ++group) {
+ 			for (pu_pd = PULL_DOWN; pu_pd >= PULL_UP; --pu_pd) {
+-				lookup_and_write(
+-					a1step,
+-					lut_idx[channel][group][pu_pd] - 7,
+-					ddr3_lookup_schedule[group][pu_pd],
+-					mchbar);
++				if (ddr_type == DDR3) {
++					lookup_and_write(
++						a1step,
++						lut_idx[channel][group][pu_pd] - 7,
++						ddr3_lookup_schedule[group][pu_pd],
++						mchbar);
++				}
+ 				mchbar += 0x0018;
+ 			}
++			if (ddr_type == DDR2) {
++				mchbar_clrsetbits32(mchbar + 0, 0x7f << 24, lut_idx[channel][group][PULL_DOWN] << 24);
++				mchbar_clrsetbits32(mchbar + 4, 0x7f <<  0, lut_idx[channel][group][PULL_UP]   <<  0);
++			}
+ 			mchbar += 0x0010;
+ 			/* Channel B knows only the first two groups. */
+ 			if ((1 == channel) && (1 == group))
+@@ -230,4 +242,7 @@ void raminit_rcomp_calibration(const stepping_t stepping) {
+ 		}
+ 		mchbar += 0x0040;
+ 	}
++
++	mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
++	mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
+ }
+-- 
+2.39.5
+

config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch

@@ -1,173 +0,0 @@
-From fdde15b69bd5c8bf54339adf3581a32fa992a503 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 17/22] GM45-type CPUs: don't enable alternative SMRR
-
-This reverts the changes in coreboot revision:
-df7aecd92643d207feaf7fd840f8835097346644
-
-While this fix is *technically correct*, the one in
-coreboot, it breaks rebooting as tested on several
-GM45 ThinkPads e.g. X200, T400, when microcode
-updates are not applied.
-
-Since November 2022, Libreboot includes microcode
-updates by default, but it tells users how to remove
-it from the ROM (with cbfstool) if they wish.
-
-Well, with Libreboot 20221214, 20230319 and 20230413,
-mitigations present in Libreboot 20220710 (which did
-not have microcode updates) do not exist.
-
-This patch, along with the other patch to remove PECI
-support (which breaks speedstep when microcode updates
-are not applied) have now been re-added to Libreboot.
-
-It is still best to use microcode updates by default.
-These patches in coreboot are not critically urgent,
-and you can use the machines with or without them,
-regardless of ucode.
-
-I'll probably re-write this and the other patch at
-some point, applying the change conditionally upon
-whether or not microcode is applied.
-
-Pragmatism is a good thing. I recommend it.
----
- src/cpu/intel/model_1067x/model_1067x_init.c |  4 +++
- src/cpu/intel/model_1067x/mp_init.c          | 26 --------------------
- src/cpu/intel/model_106cx/model_106cx_init.c |  4 +++
- src/cpu/intel/model_6ex/model_6ex_init.c     |  4 +++
- src/cpu/intel/model_6fx/model_6fx_init.c     |  4 +++
- 5 files changed, 16 insertions(+), 26 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 1423fd72bc..d1f98ca43a 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -8,6 +8,7 @@
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
- #include <cpu/intel/smm_reloc.h>
-+#include <cpu/intel/common/common.h>
- 
- #define MSR_BBL_CR_CTL3		0x11e
- 
-@@ -234,6 +235,9 @@ static void model_1067x_init(struct device *cpu)
- 	fill_processor_name(processor_name);
- 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states(quad);
- 
-diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
-index bc53214310..72f40f6762 100644
---- a/src/cpu/intel/model_1067x/mp_init.c
-+++ b/src/cpu/intel/model_1067x/mp_init.c
-@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
- 	smm_initialize();
- }
- 
--#define SMRR_SUPPORTED (1 << 11)
--
- static void per_cpu_smm_trigger(void)
- {
--	msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
--	if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
--		set_feature_ctrl_vmx();
--		msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
--		/* We don't care if the lock is already setting
--		   as our smm relocation handler is able to handle
--		   setups where SMRR is not enabled here. */
--		if (ia32_ft_ctrl.lo & (1 << 0)) {
--			/* IA32_FEATURE_CONTROL locked. If we set it again we
--			   get an illegal instruction. */
--			printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
--			printk(BIOS_DEBUG, "SMRR status: %senabled\n",
--			       ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
--		} else {
--			if (!CONFIG(SET_IA32_FC_LOCK_BIT))
--				printk(BIOS_INFO,
--				       "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
--			ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
--			wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
--		}
--	} else {
--		set_vmx_and_lock();
--	}
--
- 	/* Relocate the SMM handler. */
- 	smm_relocate();
- }
-diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
-index 05f5f327cc..0450c2ad83 100644
---- a/src/cpu/intel/model_106cx/model_106cx_init.c
-+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -66,6 +67,9 @@ static void model_106cx_init(struct device *cpu)
- 	fill_processor_name(processor_name);
- 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
-diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
-index 5bd1c32815..f3bb08cde3 100644
---- a/src/cpu/intel/model_6ex/model_6ex_init.c
-+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -105,6 +106,9 @@ static void model_6ex_init(struct device *cpu)
- 	/* Setup Page Attribute Tables (PAT) */
- 	// TODO set up PAT
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
-diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
-index 535fb8fae7..f7b05facd2 100644
---- a/src/cpu/intel/model_6fx/model_6fx_init.c
-+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -118,6 +119,9 @@ static void model_6fx_init(struct device *cpu)
- 	/* Setup Page Attribute Tables (PAT) */
- 	// TODO set up PAT
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
--- 
-2.39.2
-

config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch

@@ -0,0 +1,240 @@
+From 6acc310c1d695d47c148296da9da189de21d58be Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 6 Aug 2024 00:50:24 +0100
+Subject: [PATCH 17/37] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+
+We add this patch:
+
+commit commit_id_here
+Author: Angel Pons <th3fanbus@gmail.com>
+Date:   Mon May 10 22:40:59 2021 +0200
+
+    nb/intel/gm45: Make DDR2 raminit work
+
+This patch was original applied, in lbmk, only on coreboot/dell,
+separately from coreboot/default, which was wasteful because it
+meant having an entire coreboot tree just for a single board. We
+did this, because the DDR2 RCOMP fix happened to break DDR3 init
+on other boards.
+
+What *this* new patch does on top of Angel's patch, is make sure
+that their changes only apply to DDR2, while DDR3 behaviour remains
+unchanged. This means that the Dell Latitude E6400 can be supported
+in the main coreboot tree, within lbmk.
+
+Essentially, this patch restores the old behaviour, prior to applying
+Angel's patch, only when DDR3 memory is used.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/gm45/raminit.c          | 161 +++++++++---------
+ .../intel/gm45/raminit_rcomp_calibration.c    |   9 +-
+ 2 files changed, 88 insertions(+), 82 deletions(-)
+
+diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
+index df8f46fbbc..433db3a68c 100644
+--- a/src/northbridge/intel/gm45/raminit.c
++++ b/src/northbridge/intel/gm45/raminit.c
+@@ -1117,7 +1117,10 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
+ 				reg = (reg & ~(0xf << 10)) | (2 << 10);
+ 			else
+ 				reg = (reg & ~(0xf << 10)) | (3 << 10);
+-			reg = (reg & ~(0x7 <<  5)) | (2 << 5);
++			if (spd_type == DDR2)
++				reg = (reg & ~(0x7 <<  5)) | (2 << 5);
++			else
++				reg = (reg & ~(0x7 <<  5)) | (3 << 5);
+ 		} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
+ 			reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
+ 			reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
+@@ -2209,83 +2212,85 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
+ 		raminit_write_training(timings->mem_clock, dimms, s3resume);
+ 	}
+ 
+-	/*
+-	 * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
+-	 * after receiver enable calibration, otherwise raminit sometimes
+-	 * completes with non-working memory.
+-	 */
+-	mchbar_write32(0x0530, 0x06060005);
+-	mchbar_write32(0x0680, 0x06060606);
+-	mchbar_write32(0x0684, 0x08070606);
+-	mchbar_write32(0x0688, 0x0e0e0c0a);
+-	mchbar_write32(0x068c, 0x0e0e0e0e);
+-	mchbar_write32(0x0698, 0x06060606);
+-	mchbar_write32(0x069c, 0x08070606);
+-	mchbar_write32(0x06a0, 0x0c0c0b0a);
+-	mchbar_write32(0x06a4, 0x0c0c0c0c);
+-
+-	mchbar_write32(0x06c0, 0x02020202);
+-	mchbar_write32(0x06c4, 0x03020202);
+-	mchbar_write32(0x06c8, 0x04040403);
+-	mchbar_write32(0x06cc, 0x04040404);
+-	mchbar_write32(0x06d8, 0x02020202);
+-	mchbar_write32(0x06dc, 0x03020202);
+-	mchbar_write32(0x06e0, 0x04040403);
+-	mchbar_write32(0x06e4, 0x04040404);
+-
+-	mchbar_write32(0x0700, 0x02020202);
+-	mchbar_write32(0x0704, 0x03020202);
+-	mchbar_write32(0x0708, 0x04040403);
+-	mchbar_write32(0x070c, 0x04040404);
+-	mchbar_write32(0x0718, 0x02020202);
+-	mchbar_write32(0x071c, 0x03020202);
+-	mchbar_write32(0x0720, 0x04040403);
+-	mchbar_write32(0x0724, 0x04040404);
+-
+-	mchbar_write32(0x0740, 0x02020202);
+-	mchbar_write32(0x0744, 0x03020202);
+-	mchbar_write32(0x0748, 0x04040403);
+-	mchbar_write32(0x074c, 0x04040404);
+-	mchbar_write32(0x0758, 0x02020202);
+-	mchbar_write32(0x075c, 0x03020202);
+-	mchbar_write32(0x0760, 0x04040403);
+-	mchbar_write32(0x0764, 0x04040404);
+-
+-	mchbar_write32(0x0780, 0x06060606);
+-	mchbar_write32(0x0784, 0x09070606);
+-	mchbar_write32(0x0788, 0x0e0e0c0b);
+-	mchbar_write32(0x078c, 0x0e0e0e0e);
+-	mchbar_write32(0x0798, 0x06060606);
+-	mchbar_write32(0x079c, 0x09070606);
+-	mchbar_write32(0x07a0, 0x0d0d0c0b);
+-	mchbar_write32(0x07a4, 0x0d0d0d0d);
+-
+-	mchbar_write32(0x07c0, 0x06060606);
+-	mchbar_write32(0x07c4, 0x09070606);
+-	mchbar_write32(0x07c8, 0x0e0e0c0b);
+-	mchbar_write32(0x07cc, 0x0e0e0e0e);
+-	mchbar_write32(0x07d8, 0x06060606);
+-	mchbar_write32(0x07dc, 0x09070606);
+-	mchbar_write32(0x07e0, 0x0d0d0c0b);
+-	mchbar_write32(0x07e4, 0x0d0d0d0d);
+-
+-	mchbar_write32(0x0840, 0x06060606);
+-	mchbar_write32(0x0844, 0x08070606);
+-	mchbar_write32(0x0848, 0x0e0e0c0a);
+-	mchbar_write32(0x084c, 0x0e0e0e0e);
+-	mchbar_write32(0x0858, 0x06060606);
+-	mchbar_write32(0x085c, 0x08070606);
+-	mchbar_write32(0x0860, 0x0c0c0b0a);
+-	mchbar_write32(0x0864, 0x0c0c0c0c);
+-
+-	mchbar_write32(0x0880, 0x02020202);
+-	mchbar_write32(0x0884, 0x03020202);
+-	mchbar_write32(0x0888, 0x04040403);
+-	mchbar_write32(0x088c, 0x04040404);
+-	mchbar_write32(0x0898, 0x02020202);
+-	mchbar_write32(0x089c, 0x03020202);
+-	mchbar_write32(0x08a0, 0x04040403);
+-	mchbar_write32(0x08a4, 0x04040404);
++	if (sysinfo->spd_type == DDR2) {
++		/*
++		 * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
++		 * after receiver enable calibration, otherwise raminit sometimes
++		 * completes with non-working memory.
++		 */
++		mchbar_write32(0x0530, 0x06060005);
++		mchbar_write32(0x0680, 0x06060606);
++		mchbar_write32(0x0684, 0x08070606);
++		mchbar_write32(0x0688, 0x0e0e0c0a);
++		mchbar_write32(0x068c, 0x0e0e0e0e);
++		mchbar_write32(0x0698, 0x06060606);
++		mchbar_write32(0x069c, 0x08070606);
++		mchbar_write32(0x06a0, 0x0c0c0b0a);
++		mchbar_write32(0x06a4, 0x0c0c0c0c);
++
++		mchbar_write32(0x06c0, 0x02020202);
++		mchbar_write32(0x06c4, 0x03020202);
++		mchbar_write32(0x06c8, 0x04040403);
++		mchbar_write32(0x06cc, 0x04040404);
++		mchbar_write32(0x06d8, 0x02020202);
++		mchbar_write32(0x06dc, 0x03020202);
++		mchbar_write32(0x06e0, 0x04040403);
++		mchbar_write32(0x06e4, 0x04040404);
++
++		mchbar_write32(0x0700, 0x02020202);
++		mchbar_write32(0x0704, 0x03020202);
++		mchbar_write32(0x0708, 0x04040403);
++		mchbar_write32(0x070c, 0x04040404);
++		mchbar_write32(0x0718, 0x02020202);
++		mchbar_write32(0x071c, 0x03020202);
++		mchbar_write32(0x0720, 0x04040403);
++		mchbar_write32(0x0724, 0x04040404);
++
++		mchbar_write32(0x0740, 0x02020202);
++		mchbar_write32(0x0744, 0x03020202);
++		mchbar_write32(0x0748, 0x04040403);
++		mchbar_write32(0x074c, 0x04040404);
++		mchbar_write32(0x0758, 0x02020202);
++		mchbar_write32(0x075c, 0x03020202);
++		mchbar_write32(0x0760, 0x04040403);
++		mchbar_write32(0x0764, 0x04040404);
++
++		mchbar_write32(0x0780, 0x06060606);
++		mchbar_write32(0x0784, 0x09070606);
++		mchbar_write32(0x0788, 0x0e0e0c0b);
++		mchbar_write32(0x078c, 0x0e0e0e0e);
++		mchbar_write32(0x0798, 0x06060606);
++		mchbar_write32(0x079c, 0x09070606);
++		mchbar_write32(0x07a0, 0x0d0d0c0b);
++		mchbar_write32(0x07a4, 0x0d0d0d0d);
++
++		mchbar_write32(0x07c0, 0x06060606);
++		mchbar_write32(0x07c4, 0x09070606);
++		mchbar_write32(0x07c8, 0x0e0e0c0b);
++		mchbar_write32(0x07cc, 0x0e0e0e0e);
++		mchbar_write32(0x07d8, 0x06060606);
++		mchbar_write32(0x07dc, 0x09070606);
++		mchbar_write32(0x07e0, 0x0d0d0c0b);
++		mchbar_write32(0x07e4, 0x0d0d0d0d);
++
++		mchbar_write32(0x0840, 0x06060606);
++		mchbar_write32(0x0844, 0x08070606);
++		mchbar_write32(0x0848, 0x0e0e0c0a);
++		mchbar_write32(0x084c, 0x0e0e0e0e);
++		mchbar_write32(0x0858, 0x06060606);
++		mchbar_write32(0x085c, 0x08070606);
++		mchbar_write32(0x0860, 0x0c0c0b0a);
++		mchbar_write32(0x0864, 0x0c0c0c0c);
++
++		mchbar_write32(0x0880, 0x02020202);
++		mchbar_write32(0x0884, 0x03020202);
++		mchbar_write32(0x0888, 0x04040403);
++		mchbar_write32(0x088c, 0x04040404);
++		mchbar_write32(0x0898, 0x02020202);
++		mchbar_write32(0x089c, 0x03020202);
++		mchbar_write32(0x08a0, 0x04040403);
++		mchbar_write32(0x08a4, 0x04040404);
++	}
+ 
+ 	igd_compute_ggc(sysinfo);
+ 
+diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+index b74765fd9c..5d4505e063 100644
+--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
++++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+@@ -198,7 +198,7 @@ void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ 		reg = mchbar_read32(0x518);
+ 		lut_idx[channel][group][PULL_UP] = (reg >> 24) & 0x7f;
+ 		lut_idx[channel][group][PULL_DOWN] = (reg >> 16) & 0x7f;
+-		if (i == 1) {
++		if ((i == 1) && (ddr_type == DDR2)) {
+ 			magic_comp[0] = (reg >> 8) & 0x3f;
+ 			magic_comp[1] = (reg >> 0) & 0x3f;
+ 		}
+@@ -242,7 +242,8 @@ void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ 		}
+ 		mchbar += 0x0040;
+ 	}
+-
+-	mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
+-	mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
++	if (ddr_type == DDR2) {
++		mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
++		mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
++	}
+ }
+-- 
+2.39.5
+

config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch

@@ -0,0 +1,52 @@
+From 7461210ecc7c8e41f3f941bd5ce7943e5f66c711 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 20 May 2024 10:24:16 -0600
+Subject: [PATCH 18/37] mb/dell/e6400: Use 100 MHz reference clock for display
+
+The E6400 uses a 100 MHz reference clock for spread spectrum support on
+LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
+the more common 1280 x 800 display panels, the numerical error was not
+large enough to cause noticable issues, but the actual pixel clock
+frequency derived from a 100 MHz reference using PLL configs calculated
+assuming a 96 MHz reference was not close enough for 1440 x 900 panels,
+which require a much higher pixel clock. This resulted in a garbled
+display in the pre-OS graphics environment provided by libgfxinit.
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/Kconfig   | 3 +++
+ src/northbridge/intel/gm45/Kconfig | 4 ++++
+ 2 files changed, 7 insertions(+)
+
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
+index 417d95fd5d..6fe1b1c456 100644
+--- a/src/mainboard/dell/e6400/Kconfig
++++ b/src/mainboard/dell/e6400/Kconfig
+@@ -19,6 +19,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select EC_DELL_MEC5035
+ 
++config INTEL_GMA_DPLL_REF_FREQ
++	default 100000000
++
+ config MAINBOARD_DIR
+ 	default "dell/e6400"
+ 
+diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
+index fef0d735b3..fc5df8b11a 100644
+--- a/src/northbridge/intel/gm45/Kconfig
++++ b/src/northbridge/intel/gm45/Kconfig
+@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_GM45
+ 
+ if NORTHBRIDGE_INTEL_GM45
+ 
++config INTEL_GMA_DPLL_REF_FREQ
++	int
++	default 96000000
++
+ config VBOOT
+ 	select VBOOT_STARTS_IN_BOOTBLOCK
+ 
+-- 
+2.39.5
+

config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch

@@ -0,0 +1,52 @@
+From a683dffd774dbbe25cc77c0f7d3853232c17c2bf Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Mon, 12 Aug 2024 02:15:24 +0100
+Subject: [PATCH 19/37] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+
+set it to 96MHz. fixes the following build error when
+building for x4x boards e.g. gigabyte ga-g41m-es2l:
+
+hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config"
+make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1
+
+this error was introduced when merging coreboot/dell
+into coreboot/default in lbmk. nicholas chin's fix in lbmk
+was as follows:
+
+commit 8629873a6043067affc137be275b7aa69cb1f10c
+Author: Nicholas Chin <nic.c3.14@gmail.com>
+Date:   Mon May 20 10:46:25 2024 -0600
+
+    Fix E6400 display issue with 1440 x 900 panel
+
+this currently corresponds to the patch in lbmk,
+as of 12 august 2024:
+
+0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+
+The assumption prior to Nicholas's fix was 96MHz, so set
+it accordingly on x4x northbridge.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/x4x/Kconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
+index 097e11126c..6430319f6a 100644
+--- a/src/northbridge/intel/x4x/Kconfig
++++ b/src/northbridge/intel/x4x/Kconfig
+@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_X4X
+ 
+ if NORTHBRIDGE_INTEL_X4X
+ 
++config INTEL_GMA_DPLL_REF_FREQ
++	int
++	default 96000000
++
+ config CBFS_SIZE
+ 	default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
+ 
+-- 
+2.39.5
+

config/coreboot/default/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch

@@ -1,61 +0,0 @@
-From f0db13a15c76c2947eec8919fd121450048914ce Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 27 Aug 2023 17:36:36 -0600
-Subject: [PATCH 20/22] ec/dell/mec5035: Add command to enable/disable radios
-
-These were determined by sniffing the LPC bus while toggling the
-hardware wireless switch on the Latitude E6400. To differentiate devices
-options in the vendor BIOS to change which radios the switch controlled
-were used.
-
-Change-Id: I173dc197d63cda232dd7ede0cb798ab0a364482b
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/ec/dell/mec5035/mec5035.c | 9 +++++++++
- src/ec/dell/mec5035/mec5035.h | 8 ++++++++
- 2 files changed, 17 insertions(+)
-
-diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index 8da11e5b1c..e0335a4635 100644
---- a/src/ec/dell/mec5035/mec5035.c
-+++ b/src/ec/dell/mec5035/mec5035.c
-@@ -84,6 +84,15 @@ u8 mec5035_mouse_touchpad(u8 setting)
- 	return buf[0];
- }
- 
-+void mec5035_radio_enable(enum mec5035_radio_dev dev, u8 on)
-+{
-+	/* From LPC traces and userspace testing with other values,
-+	   the second byte has to be 2 for an unknown reason. */
-+	u8 buf[3] = {dev, 2, on};
-+	write_mailbox_regs(buf, 2, 3);
-+	ec_command(CMD_RADIO_EN);
-+}
-+
- void mec5035_early_init(void)
- {
- 	/* If this isn't sent the EC shuts down the system after about 15
-diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
-index e7a05b64d4..16512e2cc2 100644
---- a/src/ec/dell/mec5035/mec5035.h
-+++ b/src/ec/dell/mec5035/mec5035.h
-@@ -16,8 +16,16 @@
- 
- #define CMD_CPU_OK	0xc2
- 
-+#define CMD_RADIO_EN	0x2b
-+enum mec5035_radio_dev {
-+	RADIO_WLAN = 0,
-+	RADIO_WWAN = 1,
-+	RADIO_WPAN = 2,
-+};
-+
- u8 mec5035_mouse_touchpad(u8 setting);
- void mec5035_cpu_ok(void);
- void mec5035_early_init(void);
-+void mec5035_radio_enable(enum mec5035_radio_dev device, u8 on);
- 
- #endif /* _EC_DELL_MEC5035_H_ */
--- 
-2.39.2
-

config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch

@@ -0,0 +1,243 @@
+From a48ba23bb4a24730fa49b5a10b56c9de873dea8a Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Sep 2024 19:48:26 -0600
+Subject: [PATCH 20/37] mb/dell: Convert E6400 into a variant
+
+All the GM45 Dell Latitudes should be nearly identical, so convert the
+E6400 port into a variant so that future ports for the other systems can
+share code with each other.
+
+Change-Id: I8094fce56eaaadb20aef173644cd3b2c0b008e95
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/Makefile.mk          |  10 --------
+ .../dell/{e6400 => gm45_latitude}/Kconfig     |  22 +++++++++++++-----
+ .../{e6400 => gm45_latitude}/Kconfig.name     |   0
+ src/mainboard/dell/gm45_latitude/Makefile.mk  |  11 +++++++++
+ .../dell/{e6400 => gm45_latitude}/acpi/ec.asl |   0
+ .../acpi/ich9_pci_irqs.asl                    |   0
+ .../{e6400 => gm45_latitude}/acpi/superio.asl |   0
+ .../dell/{e6400 => gm45_latitude}/blc.c       |   0
+ .../{e6400 => gm45_latitude}/board_info.txt   |   0
+ .../dell/{e6400 => gm45_latitude}/bootblock.c |   0
+ .../{e6400 => gm45_latitude}/cmos.default     |   0
+ .../dell/{e6400 => gm45_latitude}/cmos.layout |   0
+ .../dell/{e6400 => gm45_latitude}/cstates.c   |   0
+ .../{e6400 => gm45_latitude}/devicetree.cb    |   1 -
+ .../dell/{e6400 => gm45_latitude}/dsdt.asl    |   0
+ .../dell/{e6400 => gm45_latitude}/mainboard.c |   0
+ .../dell/{e6400 => gm45_latitude}/romstage.c  |   0
+ .../variants}/e6400/data.vbt                  | Bin
+ .../variants}/e6400/gma-mainboard.ads         |   0
+ .../{ => gm45_latitude/variants}/e6400/gpio.c |   0
+ .../variants}/e6400/hda_verb.c                |   0
+ .../variants/e6400/overridetree.cb            |   7 ++++++
+ 22 files changed, 34 insertions(+), 17 deletions(-)
+ delete mode 100644 src/mainboard/dell/e6400/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig (64%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig.name (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ec.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ich9_pci_irqs.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/superio.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/blc.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/board_info.txt (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/bootblock.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.default (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.layout (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cstates.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/devicetree.cb (98%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/dsdt.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/mainboard.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/romstage.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/data.vbt (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gma-mainboard.ads (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gpio.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/hda_verb.c (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+
+diff --git a/src/mainboard/dell/e6400/Makefile.mk b/src/mainboard/dell/e6400/Makefile.mk
+deleted file mode 100644
+index ca3a82db48..0000000000
+--- a/src/mainboard/dell/e6400/Makefile.mk
++++ /dev/null
+@@ -1,10 +0,0 @@
+-## SPDX-License-Identifier: GPL-2.0-only
+-
+-bootblock-y += bootblock.c
+-
+-romstage-y += gpio.c
+-
+-ramstage-y += cstates.c
+-ramstage-y += blc.c
+-
+-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
+similarity index 64%
+rename from src/mainboard/dell/e6400/Kconfig
+rename to src/mainboard/dell/gm45_latitude/Kconfig
+index 6fe1b1c456..ba76fb6e8c 100644
+--- a/src/mainboard/dell/e6400/Kconfig
++++ b/src/mainboard/dell/gm45_latitude/Kconfig
+@@ -1,9 +1,7 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
+-if BOARD_DELL_E6400
+-
+-config BOARD_SPECIFIC_OPTIONS
+-	def_bool y
++config BOARD_DELL_GM45_LATITUDE_COMMON
++	def_bool n
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select CPU_INTEL_SOCKET_P
+ 	select NORTHBRIDGE_INTEL_GM45
+@@ -19,19 +17,31 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select EC_DELL_MEC5035
+ 
++
++config BOARD_DELL_E6400
++	select BOARD_DELL_GM45_LATITUDE_COMMON
++
++if BOARD_DELL_GM45_LATITUDE_COMMON
++
+ config INTEL_GMA_DPLL_REF_FREQ
+ 	default 100000000
+ 
+ config MAINBOARD_DIR
+-	default "dell/e6400"
++	default "dell/gm45_latitude"
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6400" if BOARD_DELL_E6400
+ 
++config OVERRIDE_DEVICETREE
++	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
++
++config VARIANT_DIR
++	default "e6400" if BOARD_DELL_E6400
++
+ config USBDEBUG_HCD_INDEX
+ 	default 1
+ 
+ config CBFS_SIZE
+ 	default 0x1A0000
+ 
+-endif # BOARD_DELL_E6400
++endif # BOARD_DELL_GM45_LATITUDE_COMMON
+diff --git a/src/mainboard/dell/e6400/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
+similarity index 100%
+rename from src/mainboard/dell/e6400/Kconfig.name
+rename to src/mainboard/dell/gm45_latitude/Kconfig.name
+diff --git a/src/mainboard/dell/gm45_latitude/Makefile.mk b/src/mainboard/dell/gm45_latitude/Makefile.mk
+new file mode 100644
+index 0000000000..5295d5be22
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/Makefile.mk
+@@ -0,0 +1,11 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += bootblock.c
++
++romstage-y += variants/$(VARIANT_DIR)/gpio.c
++
++ramstage-y += cstates.c
++ramstage-y += blc.c
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
++
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/acpi/ec.asl b/src/mainboard/dell/gm45_latitude/acpi/ec.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ec.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ec.asl
+diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+diff --git a/src/mainboard/dell/e6400/acpi/superio.asl b/src/mainboard/dell/gm45_latitude/acpi/superio.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/superio.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/superio.asl
+diff --git a/src/mainboard/dell/e6400/blc.c b/src/mainboard/dell/gm45_latitude/blc.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/blc.c
+rename to src/mainboard/dell/gm45_latitude/blc.c
+diff --git a/src/mainboard/dell/e6400/board_info.txt b/src/mainboard/dell/gm45_latitude/board_info.txt
+similarity index 100%
+rename from src/mainboard/dell/e6400/board_info.txt
+rename to src/mainboard/dell/gm45_latitude/board_info.txt
+diff --git a/src/mainboard/dell/e6400/bootblock.c b/src/mainboard/dell/gm45_latitude/bootblock.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/bootblock.c
+rename to src/mainboard/dell/gm45_latitude/bootblock.c
+diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/gm45_latitude/cmos.default
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.default
+rename to src/mainboard/dell/gm45_latitude/cmos.default
+diff --git a/src/mainboard/dell/e6400/cmos.layout b/src/mainboard/dell/gm45_latitude/cmos.layout
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.layout
+rename to src/mainboard/dell/gm45_latitude/cmos.layout
+diff --git a/src/mainboard/dell/e6400/cstates.c b/src/mainboard/dell/gm45_latitude/cstates.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/cstates.c
+rename to src/mainboard/dell/gm45_latitude/cstates.c
+diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
+similarity index 98%
+rename from src/mainboard/dell/e6400/devicetree.cb
+rename to src/mainboard/dell/gm45_latitude/devicetree.cb
+index e9f3915d17..76dae87153 100644
+--- a/src/mainboard/dell/e6400/devicetree.cb
++++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
+@@ -15,7 +15,6 @@ chip northbridge/intel/gm45
+ 	register "pci_mmio_size" = "2048"
+ 
+ 	device domain 0 on
+-		subsystemid 0x1028 0x0233 inherit
+ 		ops gm45_pci_domain_ops
+ 
+ 		device pci 00.0 on end # host bridge
+diff --git a/src/mainboard/dell/e6400/dsdt.asl b/src/mainboard/dell/gm45_latitude/dsdt.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/dsdt.asl
+rename to src/mainboard/dell/gm45_latitude/dsdt.asl
+diff --git a/src/mainboard/dell/e6400/mainboard.c b/src/mainboard/dell/gm45_latitude/mainboard.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/mainboard.c
+rename to src/mainboard/dell/gm45_latitude/mainboard.c
+diff --git a/src/mainboard/dell/e6400/romstage.c b/src/mainboard/dell/gm45_latitude/romstage.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/romstage.c
+rename to src/mainboard/dell/gm45_latitude/romstage.c
+diff --git a/src/mainboard/dell/e6400/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+similarity index 100%
+rename from src/mainboard/dell/e6400/data.vbt
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+diff --git a/src/mainboard/dell/e6400/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+similarity index 100%
+rename from src/mainboard/dell/e6400/gma-mainboard.ads
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/gpio.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+diff --git a/src/mainboard/dell/e6400/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/hda_verb.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+new file mode 100644
+index 0000000000..acc34a2252
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/gm45
++	device domain 0 on
++		subsystemid 0x1028 0x0233 inherit
++	end
++end
+-- 
+2.39.5
+

config/coreboot/default/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch

@@ -1,37 +0,0 @@
-From 4537c365dae010645404fdb5d2d4e5f478dede67 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 27 Aug 2023 19:15:37 -0600
-Subject: [PATCH 21/22] ec/dell/mec5035: Hook up radio enables to option API
-
-Change-Id: I52de5ea3d24b400a93adee7a6207a4439eac61db
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/ec/dell/mec5035/mec5035.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index e0335a4635..20a33cc0ad 100644
---- a/src/ec/dell/mec5035/mec5035.c
-+++ b/src/ec/dell/mec5035/mec5035.c
-@@ -4,6 +4,7 @@
- #include <console/console.h>
- #include <device/device.h>
- #include <device/pnp.h>
-+#include <option.h>
- #include <pc80/keyboard.h>
- #include <stdint.h>
- #include "mec5035.h"
-@@ -108,6 +109,10 @@ static void mec5035_init(struct device *dev)
- 	mec5035_mouse_touchpad(TP_PS2_MOUSE);
- 
- 	pc_keyboard_init(NO_AUX_DEVICE);
-+
-+	mec5035_radio_enable(RADIO_WLAN, get_uint_option("wlan", 1));
-+	mec5035_radio_enable(RADIO_WWAN, get_uint_option("wwan", 1));
-+	mec5035_radio_enable(RADIO_WPAN, get_uint_option("bluetooth", 1));
- }
- 
- static struct device_operations ops = {
--- 
-2.39.2
-

config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch

@@ -0,0 +1,332 @@
+From b87e6774f0407ea48610c83ea54ab6a4b4a78a24 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Sep 2024 19:51:25 -0600
+Subject: [PATCH 21/37] mb/dell/gm45_latitudes: Add E4300 variant
+
+Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/gm45_latitude/Kconfig      |   5 +
+ src/mainboard/dell/gm45_latitude/Kconfig.name |   3 +
+ .../gm45_latitude/variants/e4300/data.vbt     | Bin 0 -> 3881 bytes
+ .../variants/e4300/gma-mainboard.ads          |  17 +++
+ .../dell/gm45_latitude/variants/e4300/gpio.c  | 138 ++++++++++++++++++
+ .../gm45_latitude/variants/e4300/hda_verb.c   |  37 +++++
+ .../variants/e4300/overridetree.cb            |  10 ++
+ 7 files changed, 210 insertions(+)
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+
+diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
+index ba76fb6e8c..144f9bcdf0 100644
+--- a/src/mainboard/dell/gm45_latitude/Kconfig
++++ b/src/mainboard/dell/gm45_latitude/Kconfig
+@@ -21,6 +21,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON
+ config BOARD_DELL_E6400
+ 	select BOARD_DELL_GM45_LATITUDE_COMMON
+ 
++config BOARD_DELL_E4300
++	select BOARD_DELL_GM45_LATITUDE_COMMON
++
+ if BOARD_DELL_GM45_LATITUDE_COMMON
+ 
+ config INTEL_GMA_DPLL_REF_FREQ
+@@ -31,12 +34,14 @@ config MAINBOARD_DIR
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6400" if BOARD_DELL_E6400
++	default "Latitude E4300" if BOARD_DELL_E4300
+ 
+ config OVERRIDE_DEVICETREE
+ 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+ 
+ config VARIANT_DIR
+ 	default "e6400" if BOARD_DELL_E6400
++	default "e4300" if BOARD_DELL_E4300
+ 
+ config USBDEBUG_HCD_INDEX
+ 	default 1
+diff --git a/src/mainboard/dell/gm45_latitude/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
+index aefe777109..4dc95f46be 100644
+--- a/src/mainboard/dell/gm45_latitude/Kconfig.name
++++ b/src/mainboard/dell/gm45_latitude/Kconfig.name
+@@ -1,4 +1,7 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
++config BOARD_DELL_E4300
++	bool "Latitude E4300"
++
+ config BOARD_DELL_E6400
+ 	bool "Latitude E6400"
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..fa2f3db13f688b5687df16a155781d8674ea26f3
+GIT binary patch
+literal 3881
+zcmdT`eQXp(6#wnV-R;foUbovquV-n84`GWGmlkRzXWaG>Td6>yG#51CN?M@?>DeM+
+zBI$}GlK6F+nD{}Y|ClJzh>3}Rm=N?2Y5a<biIGGii6#d8gP4#QmGpeGyBx))(i;53
+zx0(69nR)Nco0&Inc1d4HFVD7b?CrX@org342aOf$sh&<9U7NP<Sl8a$zN4diQ+5M?
+z9rN*fa`GZDAW257d6jcVwtw%wp<VsFPss9IbIT6VyT7@GKQuhTyNCDm-+uql-l6R9
+zaA9y{CEr#U=-)Ruz;_Pq?H?H$9GyPr&Fjey7akuO+O>Nhx3i7B*>RjEs#<v0-hG36
+zcy@TCu#&g$*~7O8nNhxFaCC5F|KPw%gBc7st!SzQND;)Ih9pfkBd$T$U~A~qu#ltO
+zMczfDhAs`eH4JHpsJLH4lZIP4`dyfi4M|pkg+SayZ(n(7kunGFvl<qe=w81$=+A#a
+zN=hgb2&njUcPLB!=P$(o-$={^mxQGIHvtVGBS4IU%YyNVhd3krw*m^es@B12UftTZ
+zHsf}zTi<zK_vS6VeYx!qdQTpH>PQ-s5C6@#q~ze8SUuLOHbzw$htxKlQYWCt9NZmC
+zVLO$_s2tQZ9MvqmM&%tUr>K0RF`T3FGnHSdOj6O}3>K9-D$(bpD<v6uK&w=s5=N^P
+zn1nKYZrHyr#A-t5vRX$dPN$Pl=yivfA{67CP>h$)OQqAIh6jOwCxuw)qvS0N+Nk!?
+zI~I-~3&u$!iZQuCQ3;=xYZQ&}1^JS!6aFCSvPt-}q{`KV7o=aLI=_ERh8gM+`g(-E
+z9-*&C=<5;sdVc?y{2iwmrKs|~Kw5}Heji&vYYqJOG&As1`1?G0hsr2Y&r%2qq-H)u
+z>=c836bj~sR4T<{m@IvjLaC(P1v(j%W}uLfs)L<DD#SV;6@`cGC4?jgJ8YLq>~qi^
+z4yaW6zjKK*SSa$dvbC#eRZDAgQ@dDEfr?l)G{1I<Q#e&+8Yy!=BeKi&0@sfte<K0&
+zMgsgs0(vE~6cP&098SWEom4ZZF%<l!OeEuw4n?=)Y_tg#&wy^{e@5{s`F9qRm`5m;
+zi_|4iQq@4&R8mD)tJIvCw3$`@-B9JV=`1}s_;B_rjtcVXpQ!o`MAJ$M5w65C7t<Ku
+z%xfIo$p$+0N}Qe(C7MY#!0SQ1({^-qFj5ylEHjhwn>8}OhGtOw#1e$Fn9w<r1Zp}l
+zPz$#mOP$ow*1(UHvmCGVz;T^IRnSxa*6jz+_oSD)xmT|Cbl&YcJ5M&d?&+&NDI2Y0
+zO0ai&>sUmbC8g}vF{$V$Y~rFp!qRJP)Z!2NYEhIpf^PzD_^ptxacQ#R+9@(N>ibe6
+z@|mz|d=bjIxSe3u0>+jxdmFQMG4?34k2C9i#y(>91!n!pSR`S$B&>T9Y*WHMl(1e%
+zuvZiInS^yV!G28GmAbW9XHB~OfNnjavje*Qrfz+xvyXNAl5R-`OBnW@hPA<9+YI|D
+z!+P0Z#|`^S!}`Hs7Yw^5X*DKUOVaL7TBAv}d|dV9^O8rYn%=4o&5GjdSWeb`yeyf7
+zk&0z-2#I*9^ljWL^79K!Ex#yORz2-nxRYGT$+NdKUcs>{SI2Fyx@<{2w?w*#&%hG*
+zeY&DumV{4Nw4(1*^g5r`avbR44Nj-miiQs;Ii;O}*rL^|oYl8hQ9P@{Qf5}Gn;uRg
+zI{c?gKNv~R$<jgIlQvzm9GD`y{Dh<T(H)!WlUUWvtFvzDqaVV>&eHj<So5w}UG%+7
+zt=J~1YHpT3TjRY{XlrmCz6QBZ$WqGr>8!uus22Br_GkCD$Q)pf!<P$30Ez;o=qDzr
+z7@f;LJ+ZPlo=?}4PvMm&OKLGLZ0h1&n7U8@9GP~;8!wz(OqQ<s6e;@8hfYU0ht*9>
+zGh%f}_&(hXOZrW-WCWJVw`DdrczV_sXGaOvzjt%F!O;{7J-K<j&AXad#XeO8mgw(v
+z_Gj1VBJZIpZ<>`tJBTNGZHe^T`VrkY0pv~u^?l~DG9UD8p8(692<oYlGx5_cte6LX
+JE5(FU=`RLB=-&VU
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+new file mode 100644
+index 0000000000..89b81b3d69
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+@@ -0,0 +1,17 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP2, -- dock DP
++      Analog, -- mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+new file mode 100644
+index 0000000000..b50f8da0b5
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+@@ -0,0 +1,138 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0  = GPIO_MODE_NATIVE,
++	.gpio1  = GPIO_MODE_GPIO,
++	.gpio2  = GPIO_MODE_GPIO,
++	.gpio3  = GPIO_MODE_GPIO,
++	.gpio4  = GPIO_MODE_GPIO,
++	.gpio5  = GPIO_MODE_GPIO,
++	.gpio6  = GPIO_MODE_GPIO,
++	.gpio7  = GPIO_MODE_GPIO,
++	.gpio8  = GPIO_MODE_GPIO,
++	.gpio9  = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_NATIVE,
++	.gpio16 = GPIO_MODE_NATIVE,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_GPIO,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_GPIO,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_NATIVE,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio1  = GPIO_DIR_INPUT,
++	.gpio2  = GPIO_DIR_INPUT,
++	.gpio3  = GPIO_DIR_INPUT,
++	.gpio4  = GPIO_DIR_INPUT,
++	.gpio5  = GPIO_DIR_INPUT,
++	.gpio6  = GPIO_DIR_INPUT,
++	.gpio7  = GPIO_DIR_INPUT,
++	.gpio8  = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio18 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio20 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio1  = GPIO_INVERT,
++	.gpio7  = GPIO_INVERT,
++	.gpio8  = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_NATIVE,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_NATIVE,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio56 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode      = &pch_gpio_set1_mode,
++		.direction = &pch_gpio_set1_direction,
++		.level     = &pch_gpio_set1_level,
++		.blink     = &pch_gpio_set1_blink,
++		.invert    = &pch_gpio_set1_invert,
++	},
++	.set2 = {
++		.mode      = &pch_gpio_set2_mode,
++		.direction = &pch_gpio_set2_direction,
++		.level     = &pch_gpio_set2_level,
++	},
++};
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+new file mode 100644
+index 0000000000..a9948a93dd
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+@@ -0,0 +1,37 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header */
++	0x111d76b2, /* IDT 92HD71B7X */
++	0x1028024d, /* Subsystem ID */
++	13,	    /* Number of entries */
++
++	/* Pin Widget Verb Table */
++
++	AZALIA_PIN_CFG(0, 0x0a, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0b, 0x04a11021),
++	AZALIA_PIN_CFG(0, 0x0c, 0x40f000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x14, 0x40f000f2),
++	AZALIA_PIN_CFG(0, 0x18, 0x90a601a0),
++	AZALIA_PIN_CFG(0, 0x19, 0x40f000f4),
++	AZALIA_PIN_CFG(0, 0x1e, 0x40f000f5),
++	AZALIA_PIN_CFG(0, 0x1f, 0x40f000f6),
++	AZALIA_PIN_CFG(0, 0x20, 0x40f000f7),
++	AZALIA_PIN_CFG(0, 0x27, 0x40f000f0),
++};
++
++const u32 pc_beep_verbs[] = {
++	0x00170500, /* power up codec */
++	0x00d70500, /* power up speakers */
++	0x00d70102, /* select mixer (input 0x2) for speakers */
++	0x00d70740, /* enable speakers output */
++	0x02770720, /* enable beep input */
++	0x01737217, /* unmute beep (mixer's input 0x2), set amp 0dB */
++	0x00d37000, /* unmute speakers */
++};
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+new file mode 100644
+index 0000000000..20dfa245fb
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/gm45
++	device domain 0 on
++		subsystemid 0x1028 0x024d inherit
++		chip southbridge/intel/i82801ix
++			device pci 1c.2 off end # PCIe Port #3
++		end
++	end
++end
+-- 
+2.39.5
+

config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch

@@ -1,820 +0,0 @@
-From db1cb588b64f17c7ed08201bf1e09ab5393e4b04 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 22/22] mb/dell: Add Latitude E6430 (Ivy Bridge)
-
-Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested.
-This is based on the autoport output with some manual tweaks. The flash
-is 8MiB + 4MiB, and is fairly easily accessed by removing the keyboard.
-It can also be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections. [1] The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-Working:
-- Libgfxinit
-- USB EHCI debug (left side usb port is HCD index 2, middle port on the
-  right side is HCD index 1)
-- Keyboard
-- Touchpad/trackpoint
-- ExpressCard
-- Audio
-- Ethernet
-- SD card reader
-- mPCIe WiFi
-- SeaBIOS 1.16.2
-- edk2 (MrChromebox' fork, uefipayload_202306)
-- Internal flashing
-
-Not working:
-- S3 suspend: It seems like the EC also controls the DRAM reset gate so
-  there may be a command that needs to be implemented for this
-- Physical Wireless switch
-- Battery reporting
-- Brightness hotkeys
-
-Unknown/untested:
-- Dock
-- eSATA
-- TPM
-- dGPU on non-UMA model
-
-[1] https://github.com/nic3-14159/e6400-flash-unlock
-
-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6430/Kconfig           |  36 ++++
- src/mainboard/dell/e6430/Kconfig.name      |   2 +
- src/mainboard/dell/e6430/Makefile.inc      |   6 +
- src/mainboard/dell/e6430/acpi/ec.asl       |   9 +
- src/mainboard/dell/e6430/acpi/platform.asl |  12 ++
- src/mainboard/dell/e6430/acpi/superio.asl  |   3 +
- src/mainboard/dell/e6430/acpi_tables.c     |  16 ++
- src/mainboard/dell/e6430/board_info.txt    |   6 +
- src/mainboard/dell/e6430/cmos.default      |   9 +
- src/mainboard/dell/e6430/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e6430/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6430/devicetree.cb     |  68 ++++++++
- src/mainboard/dell/e6430/dsdt.asl          |  30 ++++
- src/mainboard/dell/e6430/early_init.c      |  38 ++++
- src/mainboard/dell/e6430/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e6430/gpio.c            | 192 +++++++++++++++++++++
- src/mainboard/dell/e6430/hda_verb.c        |  33 ++++
- src/mainboard/dell/e6430/mainboard.c       |  21 +++
- 18 files changed, 589 insertions(+)
- create mode 100644 src/mainboard/dell/e6430/Kconfig
- create mode 100644 src/mainboard/dell/e6430/Kconfig.name
- create mode 100644 src/mainboard/dell/e6430/Makefile.inc
- create mode 100644 src/mainboard/dell/e6430/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6430/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6430/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6430/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6430/board_info.txt
- create mode 100644 src/mainboard/dell/e6430/cmos.default
- create mode 100644 src/mainboard/dell/e6430/cmos.layout
- create mode 100644 src/mainboard/dell/e6430/data.vbt
- create mode 100644 src/mainboard/dell/e6430/devicetree.cb
- create mode 100644 src/mainboard/dell/e6430/dsdt.asl
- create mode 100644 src/mainboard/dell/e6430/early_init.c
- create mode 100644 src/mainboard/dell/e6430/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6430/gpio.c
- create mode 100644 src/mainboard/dell/e6430/hda_verb.c
- create mode 100644 src/mainboard/dell/e6430/mainboard.c
-
-diff --git a/src/mainboard/dell/e6430/Kconfig b/src/mainboard/dell/e6430/Kconfig
-new file mode 100644
-index 0000000000..3178d12aff
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Kconfig
-@@ -0,0 +1,36 @@
-+if BOARD_DELL_LATITUDE_E6430
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_12288
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_C216
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config MAINBOARD_DIR
-+	default "dell/e6430"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E6430"
-+
-+config VGA_BIOS_ID
-+	default "8086,0166"
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+endif
-diff --git a/src/mainboard/dell/e6430/Kconfig.name b/src/mainboard/dell/e6430/Kconfig.name
-new file mode 100644
-index 0000000000..f866b03585
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6430
-+	bool "Latitude E6430"
-diff --git a/src/mainboard/dell/e6430/Makefile.inc b/src/mainboard/dell/e6430/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6430/acpi/ec.asl b/src/mainboard/dell/e6430/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6430/acpi/platform.asl b/src/mainboard/dell/e6430/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e6430/acpi/superio.asl b/src/mainboard/dell/e6430/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6430/acpi_tables.c b/src/mainboard/dell/e6430/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6430/board_info.txt b/src/mainboard/dell/e6430/board_info.txt
-new file mode 100644
-index 0000000000..4601a4aaba
---- /dev/null
-+++ b/src/mainboard/dell/e6430/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2012
-diff --git a/src/mainboard/dell/e6430/cmos.default b/src/mainboard/dell/e6430/cmos.default
-new file mode 100644
-index 0000000000..2a5b30f2b7
---- /dev/null
-+++ b/src/mainboard/dell/e6430/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Normal
-diff --git a/src/mainboard/dell/e6430/cmos.layout b/src/mainboard/dell/e6430/cmos.layout
-new file mode 100644
-index 0000000000..e85ea4c661
---- /dev/null
-+++ b/src/mainboard/dell/e6430/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+415	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6430/data.vbt b/src/mainboard/dell/e6430/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..08952c26ab82933ebb5cc5b9c7e2265963a87b2d
-GIT binary patch
-literal 6144
-zcmeHKU2Gdw7XHRFw#VZc+nI!tq)j-qG$b@>#vu)%WW~fb!7ZV6LkJc^+qlG~(WXgp
-zLU)l?#Jhyj)dGqHf<6H13kV^8g;enZDm*~=5kd&@Cn1Fu52*0a2hgri!F%q^IFQ;)
-zjkMh#DR=zcpL5Use9xJ4?#x^=mKdcQb|t!Zj3v6R-<{Yod<{*&!ppI%xUMXT9lLMX
-zn;IM)+?yEQoxF~o#5x>}{dfwPkR;RSiC=!jj_JAlRQpJWpd}$VY+XtFX9|?cO&y#m
-z<SE`uGt*OdcG7S%MVsQ5GkI`wn)VeYZ#ytIou8d0Yb)J)AUAzmo)Vpuq&7;?RQ_;&
-zie?W??w`vSW@&DQ`Yr3=;cjcIHNi^L`QOvN$?05SGCy0nZ&#9>IdrG<AJm@gpdQPz
-zx_Yd5oSZFFa;9)-D-BLf(TLc`ERE!6^M%9tiLHiaXuwHXRU|<2BX~C?>4zSq6a*B6
-zRA?%66|w}s0z*YuMNq*73a(KQQ8A>TT}4_&3_e5hDZs@lHpaYN60rOh%jBQN+*9zu
-zIASsRL<3j>pYk93g@PXvaUZbpk)yEWDA4C2Ai!cNXi4M~3gjt#<|(LxR49-{<^K|T
-zqL5SnLUq0r*kw>Q!0PGk>)$?LCsIS{ox_=t(Xs5!w-o>M=erl0apv_Z`-(^w_5@pz
-z)}lBfx8o(*hgal&<dh}67_jhVpb;fTbFdMn7Q<$~Ll)yIMvJN<r<#~$+{1W;@r<hB
-z1mh&*ZN|rpFBo4lzGDPK8tNG98Jij1j4K&Q#`TPw7&*r87<Vw{8Gm6s$astqxC3WO
-zz9NE-Ek(&|>)aMG1rKzf_^2m;)RTu!i#rBrUK{pWM_5BuDg}f1vGgAMqNM&t?7(IQ
-zcDa=Dn9^Q5?6k6+@y4UvvL3SDxKs*_^RS1n^H*!{fYZz^rPBX<FZ?DhF0v6`u90ic
-zA-5^lMeh7u!RIful;@oGY=u>mV(=eO(Cd-pvqPqVBRYz~7nA{nO7|Kv{w^;?LXb8F
-zZpK}KE=2zd4)ya^Le2qLGkt7<&s%Z6*Z`k>QW26OPC!Y8WP|wUI8Rlea-W3+oBO=P
-z7W#bDD=HM*SuTlWaHmLu%9{LBg+7xrp>y^-%p_)+nfZB&dFmKmF?B(+QtAm&-^!?J
-zr{Qq~n%$Y;KvfME{x@gVUB~vz&MBs@*k&z6fZ?Ic-b`*fKea1&Fkj=~!ZaqDU=O0r
-zYCPKK+S_PdhGTnR+18<YSJL`a_aBz`G`HE=V`WMDYTMfPLXT~qEK3^O(Kj!<{?_~E
-z{ct?ZJ!#R&H|_;QGyr;2JDTu4Urkt)#LW}e65l@e>g0GR_nHOE`gieuP-A>69j*W0
-z><PPSE2YwgK714^F4A&KOda3ou4=7C($dQbCP^XH=U4QVf8#_di>h~9>kwTD6>nL4
-zBSLUr+fHA!LgjQi9)hfgsV8iv!rHDd&4tY)VQn!?C&K1ZSo<JM{|K9!t~KbiT{nky
-zZA_;>>gEHwc1)*Nb@P2)`%EVorfFy!3`!X0sG<GVpasKx*wBs}^oC)6VrYLeNR61y
-z5$%!)?TnbWM6~@8x-Vir9?_nP(0dVcIij74P%LV0jB1@x<FeCA(YGuW>p0XopwxoS
-z0g?6TPW!DC<JKR&l%Knmp5z$x;*#X7@7xT>ql9>N1GN_$T-UVr&HErC5juykd~Sxy
-zq!PK|<^jJ^DuQ9)7p<sFLXlH${*3wEJ(L;FsEd;DgJ^{x0*)Wd^<xJzFfF2O*!)Bc
-zXtuum#xVj7H8Tulu*qs$*N1J-3WmV*15LsWQhjX<ZR^LFq0OSkUSwZ$8NS&h7|>t`
-z7FKz(x)t4R_RHf7I)6EA!d)M`R($wttvJgMee=p9zrFL_EL#DYA0wUzD?Ryj%h>lB
-ztg|e-5!;@t?uT+rR=1)e9yp?8gwNW88`Zyt!8rx=+B{i(4~DY`_-WO>sGeD;nsGcs
-z7h1ZN6srJX#Uke;d$JhpccQxNhw2Qz?Zw91`@8IHm-n!7{19~*_}LvecV2YZ7%!rJ
-zJQk}HtK2>CvB*WQ@u9a$Eq*zF2M=FM=@c`>dwDQ;<8EgZ-}dvt6=k(8Kqfa=nDJJ{
-z`Qth}G~%sFr{ZEKZb_%aySrD?sV%fJw`vFfda&ho1a>X)H^I}D_0A<|*{8kwEBU8>
-qS<b6g={WLAp3+&R^8(yo-t$_!=7BX2ta)I~18W{w^T5By1OEis_@J`@
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
-new file mode 100644
-index 0000000000..56dd9e5fe2
---- /dev/null
-+++ b/src/mainboard/dell/e6430/devicetree.cb
-@@ -0,0 +1,68 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x00001312"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x13121312"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x0534 inherit
-+
-+		device ref host_bridge on end # Host bridge
-+		device ref peg10 off end # PEG
-+		device ref igd on end # iGPU
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x005c0921"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x007c0901"
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x33"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+			register "superspeed_capable_ports" = "0x0000000f"
-+			register "xhci_overcurrent_mapping" = "0x00000c03"
-+			register "xhci_switchable_ports" = "0x0000000f"
-+
-+			device ref xhci		on end # USB 3.0 Controller
-+			device ref mei1		on end # Management Engine Interface 1
-+			device ref mei2		off end # Management Engine Interface 2
-+			device ref me_ide_r	off end # Management Engine IDE-R
-+			device ref me_kt	on end # Management Engine KT
-+			device ref gbe		on end # Intel Gigabit Ethernet
-+			device ref ehci2	on end # USB2 EHCI #2
-+			device ref hda		on end # High Definition Audio
-+			device ref pcie_rp1	on end # PCIe Port #1
-+			device ref pcie_rp2	on end # PCIe Port #2
-+			device ref pcie_rp3	on end # PCIe Port #3
-+			device ref pcie_rp4	on end # PCIe Port #4
-+			device ref pcie_rp5	off end # PCIe Port #5
-+			device ref pcie_rp6	on end # PCIe Port #6
-+			device ref pcie_rp7	off end # PCIe Port #7
-+			device ref pcie_rp8	off end # PCIe Port #8
-+			device ref ehci1	on end # USB2 EHCI #1
-+			device ref pci_bridge	off end # PCI bridge
-+			device ref lpc		on # LPC bridge
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1	on end # SATA Controller 1
-+			device ref smbus	on end # SMBus
-+			device ref sata2	off end # SATA Controller 2
-+			device ref thermal	off end # Thermal
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e6430/dsdt.asl b/src/mainboard/dell/e6430/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6430/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e6430/early_init.c b/src/mainboard/dell/e6430/early_init.c
-new file mode 100644
-index 0000000000..7944157f59
---- /dev/null
-+++ b/src/mainboard/dell/e6430/early_init.c
-@@ -0,0 +1,38 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <northbridge/intel/sandybridge/raminit_native.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 0, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 4 },
-+	{ 1, 1, 4 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 2, 6 },
-+	{ 1, 2, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
-+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
-+	mec5035_early_init();
-+}
-+
-+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-+{
-+	read_spd(&spd[0], 0x50, id_only);
-+	read_spd(&spd[2], 0x52, id_only);
-+}
-diff --git a/src/mainboard/dell/e6430/gma-mainboard.ads b/src/mainboard/dell/e6430/gma-mainboard.ads
-new file mode 100644
-index 0000000000..1310830c8e
---- /dev/null
-+++ b/src/mainboard/dell/e6430/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, --mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6430/gpio.c b/src/mainboard/dell/e6430/gpio.c
-new file mode 100644
-index 0000000000..777570765a
---- /dev/null
-+++ b/src/mainboard/dell/e6430/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e6430/hda_verb.c b/src/mainboard/dell/e6430/hda_verb.c
-new file mode 100644
-index 0000000000..56ada95c58
---- /dev/null
-+++ b/src/mainboard/dell/e6430/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df,	/* Codec Vendor / Device ID: IDT */
-+	0x10280534,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280534),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862806,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6430/mainboard.c b/src/mainboard/dell/e6430/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6430/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.39.2
-

config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch

@@ -0,0 +1,70 @@
+From 0bc9ca409793836dcdb386db97b7a9464d92a973 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 3 May 2024 16:31:12 -0600
+Subject: [PATCH 22/37] mb/dell: Add S3 SMI handler for Dell Latitudes
+
+Integrate the previously added mec5035_smi_sleep() function into
+mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
+The E6400 does not require the EC command to sucessfully suspend and
+resume from S3, though sending it does enable the breathing effect on
+the power LED while in S3. Without it, all LEDs turn off during S3.
+
+Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e7240/smihandler.c            | 9 +++++++++
+ src/mainboard/dell/gm45_latitude/smihandler.c    | 9 +++++++++
+ src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
+ 3 files changed, 27 insertions(+)
+ create mode 100644 src/mainboard/dell/e7240/smihandler.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c
+
+diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/e7240/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_smi_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_smi_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/smihandler.c b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_smi_sleep(slp_typ);
++}
+-- 
+2.39.5
+

config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch

@@ -0,0 +1,92 @@
+From d91dc168d6b8eca5e78aef9e48571d6edb156d45 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Tue, 18 Jun 2024 21:31:08 -0600
+Subject: [PATCH 23/37] ec/dell/mec5035: Route power button event to host
+
+If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
+power button results in the EC powering off the system without letting
+the OS cleanly shutting itself down. This command and argument tells the
+EC to route power button events to the host so that it can determine
+what to do.
+
+The EC command was identified from the ec/google/wilco code, which is
+used for Dell's Latitude Chromebooks. According to the EC_GOOGLE_WILCO
+Kconfig help text, those ECs run a modified version of Dell's typical
+Latitude EC firmware, so it is likely that the two firmware
+implementations use similar commands. Examining LPC traffic between the
+host and the EC on the Latitude E6400 did reveal that the same command
+was being sent by the vendor firmware to the EC, but this does not
+confirm that it has the same meaning as the command from the Wilco code.
+Sending the command using inb/outb calls in a userspace C program while
+running coreboot without this patch did allow subsequent power button
+events to be handled by the host, confirming that the command was indeed
+the same.
+
+Change-Id: I5ded315270c0e1efbbc90cfa9d9d894b872e99a2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/ec/dell/mec5035/mec5035.c | 8 ++++++++
+ src/ec/dell/mec5035/mec5035.h | 7 +++++++
+ 2 files changed, 15 insertions(+)
+
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index 85c2ab0140..bdae929a27 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -94,6 +94,13 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
+ 	ec_command(CMD_RADIO_CTRL);
+ }
+ 
++void mec5035_power_button_route(enum ec_power_button_route target)
++{
++	u8 buf = (u8)target;
++	write_mailbox_regs(&buf, 2, 1);
++	ec_command(CMD_POWER_BUTTON_TO_HOST);
++}
++
+ void mec5035_change_wake(u8 source, enum ec_wake_change change)
+ {
+ 	u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
+@@ -121,6 +128,7 @@ static void mec5035_init(struct device *dev)
+ 	/* Unconditionally use this argument for now as this setting
+ 	   is probably the most sensible default out of the 3 choices. */
+ 	mec5035_mouse_touchpad(TP_PS2_MOUSE);
++	mec5035_power_button_route(HOST);
+ 
+ 	pc_keyboard_init(NO_AUX_DEVICE);
+ 
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index 8d4fded28b..51422598c4 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -11,6 +11,7 @@
+ enum mec5035_cmd {
+ 	CMD_MOUSE_TP = 0x1a,
+ 	CMD_RADIO_CTRL = 0x2b,
++	CMD_POWER_BUTTON_TO_HOST = 0x3e,
+ 	CMD_ACPI_WAKEUP_CHANGE = 0x4a,
+ 	CMD_SLEEP_ENABLE = 0x64,
+ 	CMD_CPU_OK = 0xc2,
+@@ -36,6 +37,11 @@ enum ec_radio_state {
+ 	RADIO_ON
+ };
+ 
++enum ec_power_button_route {
++	EC = 0,
++	HOST
++};
++
+ #define ACPI_WAKEUP_NUM_ARGS 4
+ enum ec_wake_change {
+ 	WAKE_OFF = 0,
+@@ -55,6 +61,7 @@ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
+ void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
++void mec5035_power_button_route(enum ec_power_button_route target);
+ void mec5035_change_wake(u8 source, enum ec_wake_change change);
+ void mec5035_sleep_enable(void);
+ 
+-- 
+2.39.5
+

config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch

@@ -0,0 +1,31 @@
+From b6bd33b0430f72c2fce16a3b1e41927ef540923b Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 31 Dec 2024 14:42:24 +0000
+Subject: [PATCH 24/37] Disable compression on refcode insertion
+
+Compression is not reliably reproducible. In an lbmk release
+context, this means we cannot rely on vendorfile insertion.
+
+Therefore, use uncompressed refcode.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile.mk | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile.mk b/Makefile.mk
+index 3969bfbd05..15346569f8 100644
+--- a/Makefile.mk
++++ b/Makefile.mk
+@@ -1392,7 +1392,7 @@ endif
+ cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
+ $(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)
+ $(CONFIG_CBFS_PREFIX)/refcode-type := stage
+-$(CONFIG_CBFS_PREFIX)/refcode-compression := $(CBFS_COMPRESS_FLAG)
++$(CONFIG_CBFS_PREFIX)/refcode-compression := none
+ 
+ cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin
+ vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE)
+-- 
+2.39.5
+

config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch

@@ -1,39 +0,0 @@
-From cddb709fd01e3e93a7879488d0d4024360e1e3d9 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 22 Oct 2023 15:02:25 +0100
-Subject: [PATCH 1/1] don't use github for the acpica download
-
-i have the tarball from a previous download, and i placed
-it on libreboot rsync, which then got mirrored to princeton.
-
-today, github's ssl cert was b0rking the hell out and i really
-really wanted to finish a build, and didn't want to wait for
-github to fix their httpd.
-
-so i'm now hosting this specific acpica tarball on rsync.
-
-this patch makes that URL be used, instead of the github one.
-
-that's the 2nd time i've had to patch coreboot's acpica download!
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index ebc9fcb49a..a857110b4b 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
- MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
- GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-

config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch

@@ -1,341 +0,0 @@
-From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 29 Oct 2023 01:18:50 +0000
-Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
- value"
-
-This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
-
-NOTE:
-
-this is done instead of merging:
-https://review.coreboot.org/c/coreboot/+/78623
-
-which is still under review for now
-
-the patch i'm reverting is this one:
-https://review.coreboot.org/c/coreboot/+/78270
-
-this was actually only merged the day before i
-updated coreboot revs in lbmk to the 12 october rev,
-so there's no harm in quickly reverting this for now
-
-however, later on, we will rely on the other patch
----
- src/Kconfig                                   | 3 ++-
- src/cpu/qemu-x86/Kconfig                      | 3 +++
- src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
- src/northbridge/amd/pi/Kconfig                | 4 ++++
- src/soc/amd/picasso/Kconfig                   | 4 ++++
- src/soc/amd/stoneyridge/Kconfig               | 4 ++++
- src/soc/cavium/cn81xx/Kconfig                 | 3 +++
- src/soc/intel/alderlake/Kconfig               | 5 +++++
- src/soc/intel/apollolake/Kconfig              | 4 ++++
- src/soc/intel/cannonlake/Kconfig              | 4 ++++
- src/soc/intel/elkhartlake/Kconfig             | 4 ++++
- src/soc/intel/jasperlake/Kconfig              | 4 ++++
- src/soc/intel/meteorlake/Kconfig              | 5 +++++
- src/soc/intel/skylake/Kconfig                 | 4 ++++
- src/soc/intel/tigerlake/Kconfig               | 4 ++++
- src/soc/intel/xeon_sp/Kconfig                 | 4 ++++
- src/soc/intel/xeon_sp/cpx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/skx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/spr/Kconfig             | 4 ++++
- src/soc/qualcomm/ipq40xx/Kconfig              | 4 ++++
- 20 files changed, 77 insertions(+), 1 deletion(-)
-
-diff --git a/src/Kconfig b/src/Kconfig
-index ae8024089e..1549719dd0 100644
---- a/src/Kconfig
-+++ b/src/Kconfig
-@@ -751,7 +751,8 @@ config RTC
- 
- config HEAP_SIZE
- 	hex
--	default 0x100000
-+	default 0x100000 if FLATTENED_DEVICE_TREE
-+	default 0x4000
- 
- config STACK_SIZE
- 	hex
-diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
-index 0fa999e1ac..f3e2c4cea9 100644
---- a/src/cpu/qemu-x86/Kconfig
-+++ b/src/cpu/qemu-x86/Kconfig
-@@ -35,4 +35,7 @@ config MAX_CPUS
- 	default 32 if SMM_TSEG
- 	default 4
- 
-+config HEAP_SIZE
-+	default 0x8000
-+
- endif
-diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
-index 7bc3b0bcbb..7f9300f2a7 100644
---- a/src/mainboard/sifive/hifive-unleashed/Kconfig
-+++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
-@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
- 	select FLATTENED_DEVICE_TREE
- 	select SPI_SDCARD
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config MAINBOARD_DIR
- 	default "sifive/hifive-unleashed"
- 
-diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
-index 4ffe82a15f..4518db149b 100644
---- a/src/northbridge/amd/pi/Kconfig
-+++ b/src/northbridge/amd/pi/Kconfig
-@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
- 	hex
- 	default 0x200000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- endif # NORTHBRIDGE_AMD_PI
-diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
-index c33f287067..796fe4eb13 100644
---- a/src/soc/amd/picasso/Kconfig
-+++ b/src/soc/amd/picasso/Kconfig
-@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config SERIRQ_CONTINUOUS_MODE
- 	bool
- 	default n
-diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
-index 6ff135e6a8..9af7455bae 100644
---- a/src/soc/amd/stoneyridge/Kconfig
-+++ b/src/soc/amd/stoneyridge/Kconfig
-@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config EHCI_BAR
- 	hex
- 	default 0xfef00000
-diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
-index 77ca97202b..368581f8f1 100644
---- a/src/soc/cavium/cn81xx/Kconfig
-+++ b/src/soc/cavium/cn81xx/Kconfig
-@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
- 	int
- 	default 1
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config STACK_SIZE
- 	default 0x2000
- 
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 4b960c1d22..82ec8f263e 100644
---- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -215,6 +215,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- config GFX_GMA_DEFAULT_MMIO
- 	default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
- 
-diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
-index 78ec2987ce..bce935d800 100644
---- a/src/soc/intel/apollolake/Kconfig
-+++ b/src/soc/intel/apollolake/Kconfig
-@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
- 	help
- 	  Name of file to store in the IFWI region.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 6
-diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
-index a42a3c365b..80237f9810 100644
---- a/src/soc/intel/cannonlake/Kconfig
-+++ b/src/soc/intel/cannonlake/Kconfig
-@@ -160,6 +160,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config NHLT_DMIC_1CH_16B
- 	bool
- 	depends on ACPI_NHLT
-diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
-index 3361c0ddb9..7f1c767379 100644
---- a/src/soc/intel/elkhartlake/Kconfig
-+++ b/src/soc/intel/elkhartlake/Kconfig
-@@ -104,6 +104,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x0
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 7
-diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
-index 3d84991e09..ff5def3263 100644
---- a/src/soc/intel/jasperlake/Kconfig
-+++ b/src/soc/intel/jasperlake/Kconfig
-@@ -106,6 +106,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 8
-diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
-index 590e8b80e1..48030a1911 100644
---- a/src/soc/intel/meteorlake/Kconfig
-+++ b/src/soc/intel/meteorlake/Kconfig
-@@ -197,6 +197,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- # Intel recommends reserving the PCIe TBT root port resources as below:
- # - 42 buses
- # - 194 MiB Non-prefetchable memory
-diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index e0df501460..d6a11363ee 100644
---- a/src/soc/intel/skylake/Kconfig
-+++ b/src/soc/intel/skylake/Kconfig
-@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
- 	help
- 	  If you set this option to n, will not use native SD controller.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
-index c07a0d8365..0a4b7bfdb8 100644
---- a/src/soc/intel/tigerlake/Kconfig
-+++ b/src/soc/intel/tigerlake/Kconfig
-@@ -152,6 +152,10 @@ config IED_REGION_SIZE
- config INTEL_TME
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x10000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 24 if SOC_INTEL_TIGERLAKE_PCH_H
-diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
-index e63bee5451..63ced01067 100644
---- a/src/soc/intel/xeon_sp/Kconfig
-+++ b/src/soc/intel/xeon_sp/Kconfig
-@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
- config ECAM_MMCONF_BUS_NUMBER
- 	default 256
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config HPET_MIN_TICKS
- 	hex
- 	default 0x80
-diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
-index ac166c3038..f54f7716b6 100644
---- a/src/soc/intel/xeon_sp/cpx/Kconfig
-+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
-@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
-index 5d843878e1..c2c3d4e2e8 100644
---- a/src/soc/intel/xeon_sp/skx/Kconfig
-+++ b/src/soc/intel/xeon_sp/skx/Kconfig
-@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
-index 43b87ade14..b1c4c783b7 100644
---- a/src/soc/intel/xeon_sp/spr/Kconfig
-+++ b/src/soc/intel/xeon_sp/spr/Kconfig
-@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x8c00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
-index 0ce92731c0..0eabb00752 100644
---- a/src/soc/qualcomm/ipq40xx/Kconfig
-+++ b/src/soc/qualcomm/ipq40xx/Kconfig
-@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
- 	help
- 	  Path for utils to combine SBL_ELF and bootblock
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- endif
--- 
-2.39.2
-

config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch

@@ -0,0 +1,187 @@
+From fc4c65f3bb807b9fc766745a70f92729b0b8d99e Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 21 Apr 2025 02:58:47 +0100
+Subject: [PATCH 25/37] nb/intel/*: Disable stack overflow debug options
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/northbridge/intel/e7505/Kconfig       |  9 +++++++++
+ src/northbridge/intel/gm45/Kconfig        |  9 +++++++++
+ src/northbridge/intel/haswell/Kconfig     |  9 +++++++++
+ src/northbridge/intel/i440bx/Kconfig      | 13 +++++++++++++
+ src/northbridge/intel/i945/Kconfig        |  9 +++++++++
+ src/northbridge/intel/ironlake/Kconfig    |  9 +++++++++
+ src/northbridge/intel/pineview/Kconfig    |  9 +++++++++
+ src/northbridge/intel/sandybridge/Kconfig |  9 +++++++++
+ src/northbridge/intel/x4x/Kconfig         |  9 +++++++++
+ 9 files changed, 85 insertions(+)
+
+diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
+index 039a7396f8..ddcb986f10 100644
+--- a/src/northbridge/intel/e7505/Kconfig
++++ b/src/northbridge/intel/e7505/Kconfig
+@@ -7,3 +7,12 @@ config NORTHBRIDGE_INTEL_E7505
+ 	select NO_CBFS_MCACHE
+ 	select SMM_TSEG
+ 	select NEED_SMALL_2MB_PAGE_TABLES
++
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
+diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
+index fc5df8b11a..95e3644b73 100644
+--- a/src/northbridge/intel/gm45/Kconfig
++++ b/src/northbridge/intel/gm45/Kconfig
+@@ -58,4 +58,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
+index 6191cb6ccf..0f5b5c7241 100644
+--- a/src/northbridge/intel/haswell/Kconfig
++++ b/src/northbridge/intel/haswell/Kconfig
+@@ -10,6 +10,15 @@ config NORTHBRIDGE_INTEL_HASWELL
+ 
+ if NORTHBRIDGE_INTEL_HASWELL
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ config USE_NATIVE_RAMINIT
+ 	bool "[NOT COMPLETE] Use native raminit"
+ 	default n
+diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
+index dbb2d7436b..5e9418b6a9 100644
+--- a/src/northbridge/intel/i440bx/Kconfig
++++ b/src/northbridge/intel/i440bx/Kconfig
+@@ -19,3 +19,16 @@ config SDRAMPWR_4DIMM
+ 	  If your board has 4 DIMM slots, you must use select this option, in
+ 	  your Kconfig file of the board. On boards with 3 DIMM slots,
+ 	  do _not_ select this option.
++
++if NORTHBRIDGE_INTEL_I440BX
++
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
++endif
+diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
+index 32eff1a611..9479d75c07 100644
+--- a/src/northbridge/intel/i945/Kconfig
++++ b/src/northbridge/intel/i945/Kconfig
+@@ -89,4 +89,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
+index 2bafebf92e..16b81705bb 100644
+--- a/src/northbridge/intel/ironlake/Kconfig
++++ b/src/northbridge/intel/ironlake/Kconfig
+@@ -63,4 +63,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
+index 59cfcd5e0a..a3ad8d3425 100644
+--- a/src/northbridge/intel/pineview/Kconfig
++++ b/src/northbridge/intel/pineview/Kconfig
+@@ -42,4 +42,13 @@ config FIXED_EPBAR_MMIO_BASE
+ config DOMAIN_RESOURCE_32BIT_LIMIT
+ 	default 0xfec00000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
+index 973eed8bbd..6387cf926d 100644
+--- a/src/northbridge/intel/sandybridge/Kconfig
++++ b/src/northbridge/intel/sandybridge/Kconfig
+@@ -208,4 +208,13 @@ config IGD_DEFAULT_UMA_INDEX
+ 	default 2 if IGD_DEFAULT_UMA_SIZE_96MB
+ 	default 3 if IGD_DEFAULT_UMA_SIZE_128MB
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
+index 6430319f6a..1803ef5733 100644
+--- a/src/northbridge/intel/x4x/Kconfig
++++ b/src/northbridge/intel/x4x/Kconfig
+@@ -53,4 +53,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+-- 
+2.39.5
+

config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch

@@ -1,77 +0,0 @@
-From 27bf50138af0c5267581f8cc1f80676fb1836572 Mon Sep 17 00:00:00 2001
-From: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
-Date: Mon, 27 Mar 2017 22:05:16 +0200
-Subject: [PATCH 1/1] sb/intel/ibexpeak/setup_heci_uma.c: Add timeouts when
- waiting for heci
-
-Since until now, the code running on the management engine is:
-- Signed by its manufacturer
-- Proprietary software, without corresponding source code
-It can desirable to run the least ammount possible of such
-code, which is what me_cleaner[1] enables.
-
-It does it by removing partitions of the management engine
-firmwares, however when doing so, the HECI interface might
-not be present anymore.
-
-So it is desirable not to have the RAM initialisation code
-wait forever for the HECI interface to appear.
-
-[1] https://github.com/corna/me_cleaner/
-
-MERGENOTE: Adapted from this patch:
-https://mail.coreboot.org/pipermail/coreboot/2017-March/083798.html
-Author on this version of the patch set to same author as in the
-linked one, with same date set, but the commit message is modified
-to match the new code path. Patch author Denis Carikli, but this
-versions of the patch was rebased from it by Leah Rowe on 29 Oct 2023.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/southbridge/intel/ibexpeak/setup_heci_uma.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/src/southbridge/intel/ibexpeak/setup_heci_uma.c b/src/southbridge/intel/ibexpeak/setup_heci_uma.c
-index 572e5e7a76..3a68344d97 100644
---- a/src/southbridge/intel/ibexpeak/setup_heci_uma.c
-+++ b/src/southbridge/intel/ibexpeak/setup_heci_uma.c
-@@ -8,28 +8,30 @@
- #include <southbridge/intel/ibexpeak/me.h>
- #include <southbridge/intel/ibexpeak/pch.h>
- #include <types.h>
-+#include <delay.h>
- 
- #define HECIDEV PCI_DEV(0, 0x16, 0)
- 
--/* FIXME: add timeout.  */
- static void wait_heci_ready(void)
- {
--	while (!(read32(DEFAULT_HECIBAR + 0xc) & 8))	// = 0x8000000c
--		;
-+	int i = 1000*1000;
- 
-+	while (i-- && !(read32(DEFAULT_HECIBAR + 0xc) & 8)) /* = 0x8000000c */
-+		udelay(1);
- 	write32((DEFAULT_HECIBAR + 0x4), (read32(DEFAULT_HECIBAR + 0x4) & ~0x10) | 0xc);
- }
- 
--/* FIXME: add timeout.  */
- static void wait_heci_cb_avail(int len)
- {
-+	int i = 1000*1000;
-+
- 	union {
- 		struct mei_csr csr;
- 		u32 raw;
- 	} csr;
- 
--	while (!(read32(DEFAULT_HECIBAR + 0xc) & 8))
--		;
-+	while (i-- && !(read32(DEFAULT_HECIBAR + 0xc) & 8))
-+		udelay(1);
- 
- 	do {
- 		csr.raw = read32(DEFAULT_HECIBAR + 0x4);
--- 
-2.39.2
-

config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch

@@ -0,0 +1,94 @@
+From 14002b2575d73d3edbc72584502a463e6802cba6 Mon Sep 17 00:00:00 2001
+From: Felix Singer <felixsinger@posteo.net>
+Date: Wed, 26 Jun 2024 04:24:31 +0200
+Subject: [PATCH 26/37] soc/intel/skylake: configure usb acpi
+
+Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
+Signed-off-by: Felix Singer <felixsinger@posteo.net>
+---
+ src/soc/intel/skylake/Kconfig    |  1 +
+ src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++-
+ 2 files changed, 56 insertions(+), 1 deletion(-)
+
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index 4ad33496b2..9191ed0ff8 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
+ 	select CPU_INTEL_COMMON
+ 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
+ 	select CPU_SUPPORTS_PM_TIMER_EMULATION
++	select DRIVERS_USB_ACPI
+ 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
+ 	select FSP_COMPRESS_FSP_S_LZ4
+ 	select FSP_M_XIP
+diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb
+index 6538a1475b..dfb81d496e 100644
+--- a/src/soc/intel/skylake/chipset.cb
++++ b/src/soc/intel/skylake/chipset.cb
+@@ -13,7 +13,61 @@ chip soc/intel/skylake
+ 		device pci 07.0 alias chap         off                     end
+ 		device pci 08.0 alias gmm          off                     end # Gaussian Mixture Model
+ 		device pci 13.0 alias ish          off                     end # SensorHub
+-		device pci 14.0 alias south_xhci   off ops usb_xhci_ops    end
++		device pci 14.0 alias south_xhci   off ops usb_xhci_ops
++			chip drivers/usb/acpi
++				register "type" = "UPC_TYPE_HUB"
++				device usb 0.0 alias xhci_root_hub off
++					chip drivers/usb/acpi
++						device usb 2.0 alias usb2_port1 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.1 alias usb2_port2 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.2 alias usb2_port3 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.3 alias usb2_port4 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.4 alias usb2_port5 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.5 alias usb2_port6 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.6 alias usb2_port7 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.7 alias usb2_port8 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.8 alias usb2_port9 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.9 alias usb2_port10 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.0 alias usb3_port1 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.1 alias usb3_port2 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.2 alias usb3_port3 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.3 alias usb3_port4 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.4 alias usb3_port5 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.5 alias usb3_port6 off end
++					end
++				end
++			end
++		end
+ 		device pci 14.1 alias south_xdci   off ops usb_xdci_ops    end
+ 		device pci 14.2 alias thermal      off                     end
+ 		device pci 14.3 alias cio          off                     end
+-- 
+2.39.5
+

config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch

@@ -0,0 +1,30 @@
+From 3bb65b7f2a02ecb93e15ae037da38ad8f812747b Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Fri, 22 Nov 2024 21:26:48 +0000
+Subject: [PATCH 27/37] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
+ bootblock
+
+Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
+---
+ src/soc/intel/skylake/bootblock/pch.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
+index df00bb85a9..beaece960b 100644
+--- a/src/soc/intel/skylake/bootblock/pch.c
++++ b/src/soc/intel/skylake/bootblock/pch.c
+@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void)
+ 
+ void pch_early_iorange_init(void)
+ {
+-	uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
+-			LPC_IOE_EC_62_66;
++	uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F |
++			LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66;
+ 
+ 	const config_t *config = config_of_soc();
+ 
+-- 
+2.39.5
+

config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch

@@ -0,0 +1,708 @@
+From 75cc0ea09234064318046624845b0afc5afb0ce5 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 30 Sep 2024 20:44:38 -0400
+Subject: [PATCH 29/37] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+
+Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/optiplex_780/Kconfig       |  40 ++++
+ src/mainboard/dell/optiplex_780/Kconfig.name  |   4 +
+ src/mainboard/dell/optiplex_780/Makefile.mk   |  10 +
+ src/mainboard/dell/optiplex_780/acpi/ec.asl   |   5 +
+ .../dell/optiplex_780/acpi/ich10_pci_irqs.asl |  32 ++++
+ .../dell/optiplex_780/acpi/superio.asl        |  18 ++
+ .../dell/optiplex_780/board_info.txt          |   6 +
+ src/mainboard/dell/optiplex_780/cmos.default  |   8 +
+ src/mainboard/dell/optiplex_780/cmos.layout   |  72 ++++++++
+ src/mainboard/dell/optiplex_780/cstates.c     |   8 +
+ src/mainboard/dell/optiplex_780/devicetree.cb |  63 +++++++
+ src/mainboard/dell/optiplex_780/dsdt.asl      |  26 +++
+ .../dell/optiplex_780/gma-mainboard.ads       |  16 ++
+ .../optiplex_780/variants/780_mt/data.vbt     | Bin 0 -> 1917 bytes
+ .../optiplex_780/variants/780_mt/early_init.c |  12 ++
+ .../dell/optiplex_780/variants/780_mt/gpio.c  | 174 ++++++++++++++++++
+ .../optiplex_780/variants/780_mt/hda_verb.c   |  26 +++
+ .../variants/780_mt/overridetree.cb           |  10 +
+ 18 files changed, 530 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_780/Kconfig
+ create mode 100644 src/mainboard/dell/optiplex_780/Kconfig.name
+ create mode 100644 src/mainboard/dell/optiplex_780/Makefile.mk
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/board_info.txt
+ create mode 100644 src/mainboard/dell/optiplex_780/cmos.default
+ create mode 100644 src/mainboard/dell/optiplex_780/cmos.layout
+ create mode 100644 src/mainboard/dell/optiplex_780/cstates.c
+ create mode 100644 src/mainboard/dell/optiplex_780/devicetree.cb
+ create mode 100644 src/mainboard/dell/optiplex_780/dsdt.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
+new file mode 100644
+index 0000000000..2d06c75c9a
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Kconfig
+@@ -0,0 +1,40 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_780_COMMON
++	def_bool n
++	select BOARD_ROMSIZE_KB_8192
++	select CPU_INTEL_SOCKET_LGA775
++	select DRIVERS_I2C_CK505
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select NORTHBRIDGE_INTEL_X4X
++	select PCIEXP_ASPM
++	select PCIEXP_CLK_PM
++	select SOUTHBRIDGE_INTEL_I82801JX
++
++config BOARD_DELL_OPTIPLEX_780_MT
++	select BOARD_DELL_OPTIPLEX_780_COMMON
++
++if BOARD_DELL_OPTIPLEX_780_COMMON
++
++config VGA_BIOS_ID
++	default "8086,2e22"
++
++config MAINBOARD_DIR
++	default "dell/optiplex_780"
++
++config MAINBOARD_PART_NUMBER
++	default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
++
++config OVERRIDE_DEVICETREE
++	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
++
++config VARIANT_DIR
++	default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
++
++endif # BOARD_DELL_OPTIPLEX_780_COMMON
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
+new file mode 100644
+index 0000000000..db7f2e8fe3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Kconfig.name
+@@ -0,0 +1,4 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_780_MT
++	bool "OptiPlex 780 MT"
+diff --git a/src/mainboard/dell/optiplex_780/Makefile.mk b/src/mainboard/dell/optiplex_780/Makefile.mk
+new file mode 100644
+index 0000000000..d462995d75
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Makefile.mk
+@@ -0,0 +1,10 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++ramstage-y += cstates.c
++romstage-y += variants/$(VARIANT_DIR)/gpio.c
++
++bootblock-y += variants/$(VARIANT_DIR)/early_init.c
++romstage-y += variants/$(VARIANT_DIR)/early_init.c
++
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+diff --git a/src/mainboard/dell/optiplex_780/acpi/ec.asl b/src/mainboard/dell/optiplex_780/acpi/ec.asl
+new file mode 100644
+index 0000000000..479296cb76
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/ec.asl
+@@ -0,0 +1,5 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
++
++/* dummy */
+diff --git a/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+new file mode 100644
+index 0000000000..b7588dcc41
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++/* This is board specific information:
++ * IRQ routing for the 0:1e.0 PCI bridge of the ICH10
++ */
++
++If (PICM) {
++	Return (Package() {
++		/* PCI slot */
++		Package() { 0x0001ffff, 0, 0, 0x14},
++		Package() { 0x0001ffff, 1, 0, 0x15},
++		Package() { 0x0001ffff, 2, 0, 0x16},
++		Package() { 0x0001ffff, 3, 0, 0x17},
++
++		Package() { 0x0002ffff, 0, 0, 0x15},
++		Package() { 0x0002ffff, 1, 0, 0x16},
++		Package() { 0x0002ffff, 2, 0, 0x17},
++		Package() { 0x0002ffff, 3, 0, 0x14},
++	})
++} Else {
++	Return (Package() {
++		Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
++		Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0},
++		Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKG, 0},
++		Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0},
++
++		Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKF, 0},
++		Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKG, 0},
++		Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKH, 0},
++		Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKE, 0},
++	})
++}
+diff --git a/src/mainboard/dell/optiplex_780/acpi/superio.asl b/src/mainboard/dell/optiplex_780/acpi/superio.asl
+new file mode 100644
+index 0000000000..9f3900b86c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/superio.asl
+@@ -0,0 +1,18 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#undef SUPERIO_DEV
++#undef SUPERIO_PNP_BASE
++#undef IT8720F_SHOW_SP1
++#undef IT8720F_SHOW_SP2
++#undef IT8720F_SHOW_EC
++#undef IT8720F_SHOW_KBCK
++#undef IT8720F_SHOW_KBCM
++#undef IT8720F_SHOW_GPIO
++#undef IT8720F_SHOW_CIR
++#define SUPERIO_DEV		SIO0
++#define SUPERIO_PNP_BASE	0x2e
++#define IT8720F_SHOW_EC		1
++#define IT8720F_SHOW_KBCK	1
++#define IT8720F_SHOW_KBCM	1
++#define IT8720F_SHOW_GPIO	1
++#include <superio/ite/it8720f/acpi/superio.asl>
+diff --git a/src/mainboard/dell/optiplex_780/board_info.txt b/src/mainboard/dell/optiplex_780/board_info.txt
+new file mode 100644
+index 0000000000..aaf657b583
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/board_info.txt
+@@ -0,0 +1,6 @@
++Category: desktop
++Board URL: https://www.acer.com/ac/en/GB/content/support-product/1137?b=1
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
+diff --git a/src/mainboard/dell/optiplex_780/cmos.default b/src/mainboard/dell/optiplex_780/cmos.default
+new file mode 100644
+index 0000000000..23f0e55f3e
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cmos.default
+@@ -0,0 +1,8 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++sata_mode=AHCI
++gfx_uma_size=64M
+diff --git a/src/mainboard/dell/optiplex_780/cmos.layout b/src/mainboard/dell/optiplex_780/cmos.layout
+new file mode 100644
+index 0000000000..9f5012adb4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cmos.layout
+@@ -0,0 +1,72 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++# coreboot config options: southbridge
++408	1	e	10	sata_mode
++409	2	e	7	power_on_after_fail
++411	1	e	1	nmi
++
++# coreboot config options: cpu
++
++# coreboot config options: northbridge
++432	4	e	11	gfx_uma_size
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++10	0	AHCI
++10	1	Compatible
++11	1	4M
++11	2	8M
++11	3	16M
++11	4	32M
++11	5	48M
++11	6	64M
++11	7	128M
++11	8	256M
++11	9	96M
++11	10	160M
++11	11	224M
++11	12	352M
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 983 984
+diff --git a/src/mainboard/dell/optiplex_780/cstates.c b/src/mainboard/dell/optiplex_780/cstates.c
+new file mode 100644
+index 0000000000..4adf0edc63
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cstates.c
+@@ -0,0 +1,8 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpigen.h>
++
++int get_cst_entries(const acpi_cstate_t **entries)
++{
++	return 0;
++}
+diff --git a/src/mainboard/dell/optiplex_780/devicetree.cb b/src/mainboard/dell/optiplex_780/devicetree.cb
+new file mode 100644
+index 0000000000..95e3bd517c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/devicetree.cb
+@@ -0,0 +1,63 @@
++# SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++	device cpu_cluster 0 on ops x4x_cpu_bus_ops end		# APIC cluster
++	device domain 0 on
++		ops x4x_pci_domain_ops		# PCI domain
++		subsystemid 0x8086 0x0028 inherit
++		device pci 0.0 on  end		# Host Bridge
++		device pci 1.0 on  end		# PCIe x16 2.0 slot
++		device pci 2.0 on  end		# Integrated graphics controller
++		device pci 2.1 on  end		# Integrated graphics controller 2
++		device pci 3.0 off end		# ME
++		device pci 3.1 off end		# ME
++		chip southbridge/intel/i82801jx	# ICH10
++			register "gpe0_en" = "0x40"
++
++			# Set AHCI mode.
++			register "sata_port_map"	= "0x3f"
++			register "sata_clock_request"	= "1"
++
++			# Enable PCIe ports 0,1 as slots.
++			register "pcie_slot_implemented" = "0x3"
++
++			device pci 19.0 on  end		# GBE
++			device pci 1a.0 on  end		# USB
++			device pci 1a.1 on  end		# USB
++			device pci 1a.2 on  end		# USB
++			device pci 1a.7 on  end		# USB
++			device pci 1b.0 on  end		# Audio
++			device pci 1c.0 off end		# PCIe 1
++			device pci 1c.1 off end		# PCIe 2
++			device pci 1c.2 off end		# PCIe 3
++			device pci 1c.3 off end		# PCIe 4
++			device pci 1c.4 off end		# PCIe 5
++			device pci 1c.5 off end		# PCIe 6
++			device pci 1d.0 on  end		# USB
++			device pci 1d.1 on  end		# USB
++			device pci 1d.2 on  end		# USB
++			device pci 1d.7 on  end		# USB
++			device pci 1e.0 on  end		# PCI bridge
++			device pci 1f.0 on  end		# LPC bridge
++			device pci 1f.2 on  end		# SATA (IDE: port 0-3, AHCI/RAID: 0-5)
++			device pci 1f.3 on		# SMBus
++				chip drivers/i2c/ck505	# IDT CV194
++					register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff }"
++					register "regs" = "{ 0x15, 0x82, 0xff, 0xff,
++							     0xff, 0x00, 0x00, 0x95,
++							     0x00, 0x65, 0x7d, 0x56,
++							     0x13, 0xc0, 0x00, 0x07,
++							     0x01, 0x0a, 0x64 }"
++					device i2c 69 on end
++				end
++			end
++			device pci 1f.4 off end
++			device pci 1f.5 off end		# SATA 2 (for port 4-5 in IDE mode)
++			device pci 1f.6 off end		# Thermal Subsystem
++		end
++	end
++end
+diff --git a/src/mainboard/dell/optiplex_780/dsdt.asl b/src/mainboard/dell/optiplex_780/dsdt.asl
+new file mode 100644
+index 0000000000..9ad70469de
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/dsdt.asl
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20090811	// OEM revision
++)
++{
++	#include <acpi/dsdt_top.asl>
++
++	OSYS = 2002
++	// global NVS and variables
++	#include <southbridge/intel/common/acpi/platform.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/x4x/acpi/x4x.asl>
++		#include <southbridge/intel/i82801jx/acpi/ich10.asl>
++	}
++
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++}
+diff --git a/src/mainboard/dell/optiplex_780/gma-mainboard.ads b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
+new file mode 100644
+index 0000000000..bc81cf4a40
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
+@@ -0,0 +1,16 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP2,
++      Analog,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..fefda9d6f226b88ab67c5b044de30a707df22fbf
+GIT binary patch
+literal 1917
+zcmd6nO>7%Q6vzLwGv0Mv$FUpJ*ik4iQd_wnX*X`M0y3~p?8a$~>ZXxZMU`4dc9RGb
+zTXq_i1Bwd~aNr{c4i)r(goF^M-nek+sY0sMa}Sk>xFFy_FTEfX^Y+7unt+OgkeJbX
+zznS;`v-5V=o<pVaS;}Q53%NpOI!8{cz{K0eVfK65_|*A}SF)Me%$4!N`H5-z90%~a
+zvGog3fe5LjnM&o#3$<#k{6>{ZwwmnN>gY?}>{`7^JBpP$l`EBIwbi0*k&aU)n@v)E
+znI_A1T57efS5MG<y}m-_+CrVKE#0VADDft%nb#Y<<ao9;Mf?!XvM)_$Xla>NN5_ut
+zt=x`G)EjR#mlhURC^2!A3p33TcBg4-d8JyTiF&hfk}|a#&Dfe2%~V^}=4!QavNzBh
+z0Pae^5`gfb?<R!YN+PQ)U7<%H;73qF3iyQT71$?W2s|f{69_4sRY(x>7Q)c(LsP)8
+zQy)2gw<F#IP`I}U>gG1S^>aw&0D}Z+-SCcJJF;s)yXJeQ|4N{SU?$I`#$HZa<Jq(M
+zbA{r}Z0XY6<@U{Y-d!KWR>9dWBuxA$6X;VK;%W?Y>I;0P`|*vwAK$S(VB2JSq6g4n
+z>oEf8XCt;_Y-iYBWz#<re{?il1^f{S#nht`VW!62^5R*KQ6_?#8e&Qw=9%`og2x!s
+z&J)wlZ=a<yoJkutfwu4%aVXlu?i^8v?R77IyGvKcD|M`CFG$6FUmK8q<|o>3T9EmJ
+z2x?*GPeN%?=Fj3+fv~4%I(nv~XF7VOqi5RsAt%13JtW>q=<<<Gei4)FzWqGEt6P8D
+zA9m}s>;0IkLPSUGL%_1h)2kjaZzuV;`43yCV;I=#Jcyyw@xKE8GGX39@am|0GKhH`
+zawsKv^FvHqm+<DDPT)%}_kZ8^eT88YGmG-#)X3=RRB|L^Uj_{yd%JeO<1HRZVz=Fz
+z+aqUCWdF3_={#Q&&k)eF1i=WV`AbSlzo*bP?x?ir5BVVO`R34f89jWL{Z}or^BwmG
+z-E;A_iWVUUWnWQl3L|~0xA@rHJRA-;7V)Y6B5=@E8R@?(?5{Eh23RefpSOGX_F{8A
+z1PtU+iNng^h#C7J<vufJ9>c8*FfFsu??w)Oed@;Mg~21%rCZ%d{x!>-zmv4AyWL1E
+xfz+CGUnQ7Y^TD}&c_cQRYlBC+`?m?k6Nuw??s04gg4@4`<@FO{XEbO(<xf!`#Pk3F
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+new file mode 100644
+index 0000000000..e2fa05cd8f
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <northbridge/intel/x4x/x4x.h>
++
++void mb_get_spd_map(u8 spd_map[4])
++{
++	// BTX form factor
++	spd_map[0] = 0x53;
++	spd_map[1] = 0x52;
++	spd_map[2] = 0x51;
++	spd_map[3] = 0x50;
++}
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+new file mode 100644
+index 0000000000..9993f17c55
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+@@ -0,0 +1,174 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0  = GPIO_MODE_NATIVE,
++	.gpio1  = GPIO_MODE_NATIVE,
++	.gpio2  = GPIO_MODE_GPIO,
++	.gpio3  = GPIO_MODE_GPIO,
++	.gpio4  = GPIO_MODE_GPIO,
++	.gpio5  = GPIO_MODE_GPIO,
++	.gpio6  = GPIO_MODE_GPIO,
++	.gpio7  = GPIO_MODE_NATIVE,
++	.gpio8  = GPIO_MODE_NATIVE,
++	.gpio9  = GPIO_MODE_GPIO,
++	.gpio10 = GPIO_MODE_GPIO,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_NATIVE,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_NATIVE,
++	.gpio18 = GPIO_MODE_GPIO,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_GPIO,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio2  = GPIO_DIR_INPUT,
++	.gpio3  = GPIO_DIR_INPUT,
++	.gpio4  = GPIO_DIR_INPUT,
++	.gpio5  = GPIO_DIR_INPUT,
++	.gpio6  = GPIO_DIR_INPUT,
++	.gpio9  = GPIO_DIR_OUTPUT,
++	.gpio10 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio18 = GPIO_DIR_OUTPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio20 = GPIO_DIR_OUTPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_INPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio9  = GPIO_LEVEL_HIGH,
++	.gpio18 = GPIO_LEVEL_HIGH,
++	.gpio20 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_NATIVE,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_OUTPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio56 = GPIO_DIR_OUTPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio35 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_HIGH,
++	.gpio56 = GPIO_LEVEL_HIGH,
++	.gpio60 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_NATIVE,
++	.gpio69 = GPIO_MODE_NATIVE,
++	.gpio70 = GPIO_MODE_NATIVE,
++	.gpio71 = GPIO_MODE_NATIVE,
++	.gpio72 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode      = &pch_gpio_set1_mode,
++		.direction = &pch_gpio_set1_direction,
++		.level     = &pch_gpio_set1_level,
++		.blink     = &pch_gpio_set1_blink,
++		.invert    = &pch_gpio_set1_invert,
++	},
++	.set2 = {
++		.mode      = &pch_gpio_set2_mode,
++		.direction = &pch_gpio_set2_direction,
++		.level     = &pch_gpio_set2_level,
++	},
++	.set3 = {
++		.mode      = &pch_gpio_set3_mode,
++		.direction = &pch_gpio_set3_direction,
++		.level     = &pch_gpio_set3_level,
++	},
++};
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+new file mode 100644
+index 0000000000..4158bcf899
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header */
++	0x11d4194a, /* Analog Devices AD1984A */
++	0xbfd40000, /*  Subsystem ID */
++	10,         /* Number of entries */
++
++	/* Pin Widget Verb Table */
++	AZALIA_PIN_CFG(0, 0x11, 0x032140f0),
++	AZALIA_PIN_CFG(0, 0x12, 0x21214010),
++	AZALIA_PIN_CFG(0, 0x13, 0x901701f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x03a190f0),
++	AZALIA_PIN_CFG(0, 0x15, 0xb7a70121),
++	AZALIA_PIN_CFG(0, 0x16, 0x9933012e),
++	AZALIA_PIN_CFG(0, 0x17, 0x97a601f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x90f301f0),
++	AZALIA_PIN_CFG(0, 0x1b, 0x014510f0),
++	AZALIA_PIN_CFG(0, 0x1c, 0x21a19020),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+new file mode 100644
+index 0000000000..555b1c1f5c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++	device domain 0 on
++		chip southbridge/intel/i82801jx
++			device pci 1c.0 on  end		# PCIe 1
++			device pci 1c.1 on  end		# PCIe 2
++		end
++	end
++end
+-- 
+2.39.5
+

config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch

@@ -0,0 +1,326 @@
+From 6725ec0bb976c61cbe87e61bf0e8b02e38d14de9 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 30 Oct 2024 20:55:25 -0600
+Subject: [PATCH 30/37] mb/dell/optiplex_780: Add USFF variant
+
+Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/optiplex_780/Kconfig       |   5 +
+ src/mainboard/dell/optiplex_780/Kconfig.name  |   3 +
+ .../optiplex_780/variants/780_usff/data.vbt   | Bin 0 -> 1917 bytes
+ .../variants/780_usff/early_init.c            |   9 +
+ .../optiplex_780/variants/780_usff/gpio.c     | 166 ++++++++++++++++++
+ .../optiplex_780/variants/780_usff/hda_verb.c |  26 +++
+ .../variants/780_usff/overridetree.cb         |  10 ++
+ 7 files changed, 219 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
+index 2d06c75c9a..fc649e35d5 100644
+--- a/src/mainboard/dell/optiplex_780/Kconfig
++++ b/src/mainboard/dell/optiplex_780/Kconfig
+@@ -20,6 +20,9 @@ config BOARD_DELL_OPTIPLEX_780_COMMON
+ config BOARD_DELL_OPTIPLEX_780_MT
+ 	select BOARD_DELL_OPTIPLEX_780_COMMON
+ 
++config BOARD_DELL_OPTIPLEX_780_USFF
++	select BOARD_DELL_OPTIPLEX_780_COMMON
++
+ if BOARD_DELL_OPTIPLEX_780_COMMON
+ 
+ config VGA_BIOS_ID
+@@ -30,11 +33,13 @@ config MAINBOARD_DIR
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
++	default "OptiPlex 780 USFF" if BOARD_DELL_OPTIPLEX_780_USFF
+ 
+ config OVERRIDE_DEVICETREE
+ 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+ 
+ config VARIANT_DIR
+ 	default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
++	default "780_usff" if BOARD_DELL_OPTIPLEX_780_USFF
+ 
+ endif # BOARD_DELL_OPTIPLEX_780_COMMON
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
+index db7f2e8fe3..bc84c82a79 100644
+--- a/src/mainboard/dell/optiplex_780/Kconfig.name
++++ b/src/mainboard/dell/optiplex_780/Kconfig.name
+@@ -2,3 +2,6 @@
+ 
+ config BOARD_DELL_OPTIPLEX_780_MT
+ 	bool "OptiPlex 780 MT"
++
++config BOARD_DELL_OPTIPLEX_780_USFF
++	bool "OptiPlex 780 USFF"
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..dbd764f285ed18f7ee9c54bc777560138bd9b5f7
+GIT binary patch
+literal 1917
+zcmd6nO>7%Q6vzLwGv3{}j$^l`v7@w1q*9sEq+2(b3K>`@c5#TSx@i<uQKf!)+gO;|
+zveT#>P+W+B10OwbsGtX=N(gc4jSGjKDkP+yIUo^nsel8$^ny^9H?td8Ra=EiCEn=G
+z@6DV4?!2AdojnUv^Rirgvs$heXUkGs9S+{Jc2WPhP0buTak^BTFP@&N9-E$(UtuSX
+zS{r`=b+EX|Ig`2a*^5oDdG>8jE-1BBxs`*jgrf_sj_fP;%L|PwURRcCFBMCroNRQv
+zmp$2TUhc}qJMB(u#jDG@x6(N85thC4%Z=8hiN}lj&zb2~``u3C;?lCrPQOTnInFqB
+zhvdwqWv?lxTb=fVEH;~RPHDPw&g*&|s$pU<Iv53Rb6YTgMPOY8;~P1Yglh^6Fgt1^
+zCTz|SVPcSpZ44F@&oNPUMO@&BE3y(57YP_Y!4SZhE?GXYa7k+b0(X|s7u3GDRf^1#
+zOd2ZCCPO|I&sHEt;p8UshhHtYQ>7!7x2m<d`Gu2<r+Qc4|6pwd8&zFboH_W7XE7uU
+zWW-@Cim&mdY2!O{JANR)OTJG2z>LBtAF!g>K`zPnkx!DpPHuk6{_zc*0qi7)Aet$T
+z1ks@8hWS#+6cI5)j1oD86{5PX8Zu2(^OC6M`<pE+J?KFZ=&_JVP1YL=#z<-Q*24K4
+zn+$YxrHNJJc`k?_8N=Kres26_#E8GLn2{jfW5P%ge`kL(Btkt=>xo)V)Ow=U6P12c
+z=U0uNC9T9v{)-|#h(mSX*hSA8)ZeocL7l4J&!{RSO{6~oTtyn535j!RQh#GA*wTF8
+zvasRbO~d!?*FbM3K`W?lHx=v*(jiARIhWyh4^io|;n?@1H>uqJy>0sjV-Dt)_=%bE
+zgNO3D@uE5m+7aqi?Y8b+inye%Z=HUmgBtaZ3Lc%OLt+bo+)5BjVwT<{mxT`nde$vb
+zV99s{>`r76L#Hr6XW6r|<iq#4Jr?XsxKyeJKEj7;e4SZ^1B12u&iV_9M0*Kem@fmn
+z1C>>HT47I`**Q#Vu0QW!^VP-9S{xXzpq_zS#9k-;aXz?b+S!Ne$Kkk6dq<Gj{q2D(
+z>&Hj-x+kx1W-4#E&beDT*S)=&NoSE?<-w!G@~aW()0ZN4O&=Q+nZa)p%Vd$k-_$a=
+T#w3FFBiyj<XAh$hb(enud`r7S
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+new file mode 100644
+index 0000000000..2a55fc3a6e
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <northbridge/intel/x4x/x4x.h>
++
++void mb_get_spd_map(u8 spd_map[4])
++{
++	spd_map[0] = 0x50;
++	spd_map[2] = 0x52;
++}
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+new file mode 100644
+index 0000000000..389f4077d7
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+@@ -0,0 +1,166 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0  = GPIO_MODE_NATIVE,
++	.gpio1  = GPIO_MODE_NATIVE,
++	.gpio2  = GPIO_MODE_GPIO,
++	.gpio3  = GPIO_MODE_GPIO,
++	.gpio4  = GPIO_MODE_GPIO,
++	.gpio5  = GPIO_MODE_GPIO,
++	.gpio6  = GPIO_MODE_GPIO,
++	.gpio7  = GPIO_MODE_NATIVE,
++	.gpio8  = GPIO_MODE_NATIVE,
++	.gpio9  = GPIO_MODE_GPIO,
++	.gpio10 = GPIO_MODE_GPIO,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_NATIVE,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_NATIVE,
++	.gpio18 = GPIO_MODE_GPIO,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_GPIO,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio2  = GPIO_DIR_INPUT,
++	.gpio3  = GPIO_DIR_INPUT,
++	.gpio4  = GPIO_DIR_INPUT,
++	.gpio5  = GPIO_DIR_INPUT,
++	.gpio6  = GPIO_DIR_INPUT,
++	.gpio9  = GPIO_DIR_OUTPUT,
++	.gpio10 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio18 = GPIO_DIR_OUTPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio20 = GPIO_DIR_OUTPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_INPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio9  = GPIO_LEVEL_HIGH,
++	.gpio18 = GPIO_LEVEL_HIGH,
++	.gpio20 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_NATIVE,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_OUTPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio56 = GPIO_DIR_OUTPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio35 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_HIGH,
++	.gpio56 = GPIO_LEVEL_HIGH,
++	.gpio60 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio72 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode      = &pch_gpio_set1_mode,
++		.direction = &pch_gpio_set1_direction,
++		.level     = &pch_gpio_set1_level,
++		.blink     = &pch_gpio_set1_blink,
++		.invert    = &pch_gpio_set1_invert,
++	},
++	.set2 = {
++		.mode      = &pch_gpio_set2_mode,
++		.direction = &pch_gpio_set2_direction,
++		.level     = &pch_gpio_set2_level,
++	},
++	.set3 = {
++		.mode      = &pch_gpio_set3_mode,
++		.direction = &pch_gpio_set3_direction,
++		.level     = &pch_gpio_set3_level,
++	},
++};
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+new file mode 100644
+index 0000000000..c94e06b156
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header */
++	0x11d4194a, /* Analog Devices AD1984A */
++	0x10280420, /*  Subsystem ID */
++	10,         /* Number of entries */
++
++	/* Pin Widget Verb Table */
++	AZALIA_PIN_CFG(0, 0x11, 0x02214040),
++	AZALIA_PIN_CFG(0, 0x12, 0x01014010),
++	AZALIA_PIN_CFG(0, 0x13, 0x991301f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x02a19020),
++	AZALIA_PIN_CFG(0, 0x15, 0x01813030),
++	AZALIA_PIN_CFG(0, 0x16, 0x413301f0),
++	AZALIA_PIN_CFG(0, 0x17, 0x41a601f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x41f301f0),
++	AZALIA_PIN_CFG(0, 0x1b, 0x414501f0),
++	AZALIA_PIN_CFG(0, 0x1c, 0x413301f0),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+new file mode 100644
+index 0000000000..555b1c1f5c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++	device domain 0 on
++		chip southbridge/intel/i82801jx
++			device pci 1c.0 on  end		# PCIe 1
++			device pci 1c.1 on  end		# PCIe 2
++		end
++	end
++end
+-- 
+2.39.5
+

config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch

@@ -0,0 +1,49 @@
+From 4ffaddc37d30d39f25faeaef73046a6e2ce525e8 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 11 Dec 2024 01:06:01 +0000
+Subject: [PATCH 31/37] dell/3050micro: disable nvme hotplug
+
+in my testing, when running my 3050micro for a few days,
+the nvme would sometimes randomly rename.
+
+e.g. nvme0n1 renamed to nvme0n2
+
+this might cause crashes in linux, if booting only from the
+nvme. in my case, i was booting from mdraid (sata+nvme) and
+every few days, the nvme would rename at least once, causing
+my RAID to become unsynced. since i'm using RAID1, this was
+OK and I could simply re-sync the array, but this is quite
+precarious indeed. if you're using raid0, that will potentially
+corrupt your RAID array indefinitely.
+
+this same issue manifested on the T480/T480 thinkpads, and
+S3 resume would break because of that, when booting from nvme,
+because the nvme would be "unplugged" and appear to linux as a
+new device (the one that you booted from).
+
+the fix there was to disable hotplugging on that pci-e slot
+for the nvme, so apply the same fix here for 3050 micro
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
+index da11085ab6..2a97306c5d 100644
+--- a/src/mainboard/dell/optiplex_3050/devicetree.cb
++++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
+@@ -45,7 +45,9 @@ chip soc/intel/skylake
+ 			register "PcieRpAdvancedErrorReporting[20]"     = "1"
+ 			register "PcieRpLtrEnable[20]"                  = "true"
+ 			register "PcieRpClkSrcNumber[20]"               = "3"
+-			register "PcieRpHotPlug[20]"                    = "1"
++# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2,
++# which could cause crashes in linux if booting from nvme
++			register "PcieRpHotPlug[20]"                    = "0"
+ 		end
+ 
+ 		# Realtek LAN
+-- 
+2.39.5
+

config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch

@@ -0,0 +1,78 @@
+From 5d8930edfa1d9537ba80e24c0cf8f0c9e4e9ec72 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 18 Dec 2024 02:06:18 +0000
+Subject: [PATCH 32/37] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
+
+This is used by lbmk to know where a tb.bin file goes,
+when extracting and padding TBT.bin from Lenovo ThunderBolt
+firmware updates on T480/T480s and other machines, grabbing
+Lenovo update files.
+
+Not used in any builds, so it's not relevant for ./mk inject
+
+However, the ThunderBolt firmware is now auto-downloaded on
+T480/T480s. This is not inserted, because it doesn't go in
+the main flash, but the resulting ROM image can be flashed
+on the TB controller's separate flash chip.
+
+Locations are as follows:
+
+vendorfiles/t480s/tb.bin
+vendorfiles/t480/tb.bin
+
+This can be used for other affected ThinkPads when they're
+added to Libreboot, but note that Lenovo provides different
+TB firmware files for each machine.
+
+Since I assume it's the same TB controller on all of those
+machines, I have to wonder: what difference is there between
+the various TBT.bin files provided by Lenovo, and how do they
+differ in terms of actual flashed configuration?
+
+We simply flash the padded TBT.bin when updating the firmware,
+flashing externally. That's what this patch is for, so that
+lbmk can auto-download them.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/lenovo/Kconfig | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
+index 2ffbaab85f..512b326381 100644
+--- a/src/mainboard/lenovo/Kconfig
++++ b/src/mainboard/lenovo/Kconfig
+@@ -18,4 +18,30 @@ config MAINBOARD_FAMILY
+ 	string
+ 	default MAINBOARD_PART_NUMBER
+ 
++config LENOVO_TBFW_BIN
++	string "Lenovo ThunderBolt firmware bin file"
++	default ""
++	help
++	  ThunderBolt firmware for certain ThinkPad models e.g. T480.
++	  Not used in the actual build. Libreboot's build system uses this
++	  along with config/vendor/*/pkg.cfg entries defining a URL to the
++	  Lenovo download link and hash. The resulting file when processed by
++	  lbmk can be flashed to the ThunderBolt firmware's 25XX NOR device.
++	  Earlier versions of this firmware had debug commands enabled that
++	  sent logs to said flash IC, and it would quickly fill up, bricking
++	  the ThunderBolt controller. With these updates, flashed externally,
++	  you can fix the issue if present or otherwise prevent it. The benefit
++	  here is that you then don't need to use Windows or a boot disk. You
++	  can flash the TB firmware while flashing Libreboot firmware. Easy!
++	  Look for these variables in lbmk:
++	  TBFW_url TBFW_url_bkup TBFW_hash and look at how it handles that and
++	  CONFIG_LENOVO_TBFW_BIN, in lbmk's include/vendor.sh file.
++	  The path set by CONFIG_LENOVO_TBFW_BIN is used by lbmk when extracting
++	  the firmware, putting it at that desired location. In this way, lbmk
++	  can auto-download such firmware. E.g. ./mk -d coreboot t480_fsp_16mb
++	  and it appears at vendorfiles/t480/tb.bin fully padded and everything!
++
++	  Just leave this blank if you don't care about this option. It's not
++	  useful for every ThinkPad, only certain models.
++
+ endif # VENDOR_LENOVO
+-- 
+2.39.5
+

config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch

@@ -0,0 +1,36 @@
+From 49cee334bc7fe9a78b9355b5256a37984bac385a Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Thu, 26 Dec 2024 19:45:20 +0000
+Subject: [PATCH 33/37] soc/intel/skylake: Don't compress FSP-S
+
+Build systems like lbmk need to reproducibly insert
+certain vendor files on release images.
+
+Compression isn't always reproducible, and making it
+so costs a lot more time than simply disabling compression.
+
+With this change, the FSP-S module will now be inserted
+without compression, which means that there will now be
+about 40KB of extra space used in the flash.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/soc/intel/skylake/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index 9191ed0ff8..d51ffaef7b 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
+ 	select CPU_SUPPORTS_PM_TIMER_EMULATION
+ 	select DRIVERS_USB_ACPI
+ 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
+-	select FSP_COMPRESS_FSP_S_LZ4
++#	select FSP_COMPRESS_FSP_S_LZ4
+ 	select FSP_M_XIP
+ 	select GENERIC_GPIO_LIB
+ 	select HAVE_FSP_GOP
+-- 
+2.39.5
+

config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch

@@ -0,0 +1,82 @@
+From 09740dc9d43a8dc24b7416b70476796515af6581 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 31 Dec 2024 01:40:42 +0000
+Subject: [PATCH 34/37] soc/intel/pmc: Hardcoded poweroff after power fail
+
+Coreboot can set the power state for power on after previous
+power failure, based on the option table. On the ThinkPad T480,
+we have no nvram and, due to coreboot's design, we therefore
+have no option table, so the default setting is enabled.
+
+In my testing, this seems to be that the system will turn on
+after a power failure. If your ThinkPad was previously in a state
+where it wouldn't turn on when plugging in the power, it'd be fine.
+
+If your battery ran out later on, this would be triggered and
+your ThinkPad would permanently turn on, when plugging in a charger,
+and there is currently no way to configure this behaviour.
+
+We currently only use the common SoC PMC code on the ThinkPad
+T480, T480s and the Dell OptiPlex 3050 Micro, at the time of
+this patch, and it is desirable that the system be set to power
+off after power fail anyway.
+
+In some cases, you might want the opposite, for example if you're
+running a server. This will be documented on the website, for that
+reason.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/soc/intel/common/block/pmc/pmclib.c | 36 +++----------------------
+ 1 file changed, 4 insertions(+), 32 deletions(-)
+
+diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
+index 64b9bb997c..7823775bcb 100644
+--- a/src/soc/intel/common/block/pmc/pmclib.c
++++ b/src/soc/intel/common/block/pmc/pmclib.c
+@@ -776,38 +776,10 @@ void pmc_clear_pmcon_sts(void)
+ 
+ void pmc_set_power_failure_state(const bool target_on)
+ {
+-	const unsigned int state = get_uint_option("power_on_after_fail",
+-					 CONFIG_MAINBOARD_POWER_FAILURE_STATE);
+-
+-	/*
+-	 * On the shutdown path (target_on == false), we only need to
+-	 * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For
+-	 * all other cases, we don't write the register to avoid clob-
+-	 * bering the value set on the boot path. This is necessary,
+-	 * for instance, when we can't access the option backend in SMM.
+-	 */
+-
+-	switch (state) {
+-	case MAINBOARD_POWER_STATE_OFF:
+-		if (!target_on)
+-			break;
+-		printk(BIOS_INFO, "Set power off after power failure.\n");
+-		pmc_soc_set_afterg3_en(false);
+-		break;
+-	case MAINBOARD_POWER_STATE_ON:
+-		if (!target_on)
+-			break;
+-		printk(BIOS_INFO, "Set power on after power failure.\n");
+-		pmc_soc_set_afterg3_en(true);
+-		break;
+-	case MAINBOARD_POWER_STATE_PREVIOUS:
+-		printk(BIOS_INFO, "Keep power state after power failure.\n");
+-		pmc_soc_set_afterg3_en(target_on);
+-		break;
+-	default:
+-		printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state);
+-		break;
+-	}
++	if (!target_on)
++		return;
++	printk(BIOS_INFO, "Set power off after power failure.\n");
++	pmc_soc_set_afterg3_en(false);
+ }
+ 
+ /* This function returns the highest assertion duration of the SLP_Sx assertion widths */
+-- 
+2.39.5
+

config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch

@@ -0,0 +1,61 @@
+From 18f4e970ebda43dd538f74398aea463a67040dd3 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 6 Jan 2025 01:36:23 +0000
+Subject: [PATCH 35/37] src/intel/skylake: Disable stack overflow debug options
+
+The option was appearing in T480/3050micro configs of lbmk,
+after updating on the coreboot/next uprev for 20241206 rev8:
+
+CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y
+
+I did some digging. See coreboot commit:
+
+commit 51cc2bacb6b07279b97e9934d079060475481fb6
+Author: Subrata Banik <subratabanik@google.com>
+Date:   Fri Dec 13 13:07:28 2024 +0530
+
+    soc/intel/pantherlake: Disable stack overflow debug options
+
+Well now:
+
+I'm disabling this behaviour on Skylake, for the same
+behaviour, because I want as few behaviour changes in general,
+as possible, for the rev8 release.
+
+According to Subrata's patch, which was for Pantherlake,
+without this change, stack corruption can occur on verstage
+and romstage early on. Please look at that coreboot patch,
+referenced above, for clarity.
+
+I see no harm in disabling this option for Skylake, since
+the behaviour that it otherwise enables was not present
+before.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/soc/intel/skylake/Kconfig | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index d51ffaef7b..42af82a5d8 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE
+ 	  The size of the cache-as-ram region required during bootblock
+ 	  and/or romstage.
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++	bool
++	default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++	bool
++	default n
++
+ config DCACHE_BSP_STACK_SIZE
+ 	hex
+ 	default 0x20400 if FSP_USES_CB_STACK
+-- 
+2.39.5
+

config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch

@@ -0,0 +1,33 @@
+From 8dcd86c34d92b9b17bcfe4c7c61793042dc97268 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 6 Jan 2025 01:53:53 +0000
+Subject: [PATCH 36/37] src/intel/x4x: Disable stack overflow debug
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/northbridge/intel/x4x/Kconfig | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
+index 1803ef5733..7129aabf72 100644
+--- a/src/northbridge/intel/x4x/Kconfig
++++ b/src/northbridge/intel/x4x/Kconfig
+@@ -32,6 +32,15 @@ config ECAM_MMCONF_BUS_NUMBER
+ 	int
+ 	default 256
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++	bool
++	default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++	bool
++	default n
++
+ # This number must be equal or lower than what's reported in ACPI PCI _CRS
+ config DOMAIN_RESOURCE_32BIT_LIMIT
+ 	default 0xfec00000
+-- 
+2.39.5
+

config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch

@@ -0,0 +1,37 @@
+From 9b547c2029611793f895117a807fa2d2c22a5332 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 21 Apr 2025 05:14:45 +0100
+Subject: [PATCH 37/37] Conditional TBFW setting for T480/T480S
+
+Otherwise, other boards will define it, which
+might trigger the vendor download script, and
+lead to a non-zero exit.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/lenovo/Kconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
+index 512b326381..3d3490b35d 100644
+--- a/src/mainboard/lenovo/Kconfig
++++ b/src/mainboard/lenovo/Kconfig
+@@ -18,6 +18,8 @@ config MAINBOARD_FAMILY
+ 	string
+ 	default MAINBOARD_PART_NUMBER
+ 
++if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S
++
+ config LENOVO_TBFW_BIN
+ 	string "Lenovo ThunderBolt firmware bin file"
+ 	default ""
+@@ -44,4 +46,6 @@ config LENOVO_TBFW_BIN
+ 	  Just leave this blank if you don't care about this option. It's not
+ 	  useful for every ThinkPad, only certain models.
+ 
++endif # BOARD LENOVO_T480 || BOARD_LENOVO_T480S
++
+ endif # VENDOR_LENOVO
+-- 
+2.39.5
+

config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch

@@ -0,0 +1,153 @@
+From 49204919e885dca2be45ffbaf2f5af62109ec3a7 Mon Sep 17 00:00:00 2001
+From: gaspar-ilom <gasparilom@riseup.net>
+Date: Thu, 6 Mar 2025 23:00:00 +0000
+Subject: [PATCH 1/1] do not break building other thinkpads with the hacks for
+ the t480/s made Mate Kukri
+
+still not fixing things properly but at least it should now be possible to build older thinkpads without regressions.
+prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives.
+heads should build all boards on this coreboot version from the same coreboot tree.
+
+Signed-off-by: gaspar-ilom <gasparilom@riseup.net>
+---
+ src/device/pci_rom.c         |  9 ++++++---
+ src/ec/lenovo/h8/acpi/ec.asl |  4 +++-
+ src/ec/lenovo/h8/bluetooth.c | 14 ++++++++++----
+ src/ec/lenovo/h8/wwan.c      | 14 ++++++++++----
+ 4 files changed, 29 insertions(+), 12 deletions(-)
+
+diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
+index bba98d9dea..db3dbbe2ce 100644
+--- a/src/device/pci_rom.c
++++ b/src/device/pci_rom.c
+@@ -396,16 +396,19 @@ void pci_rom_ssdt(const struct device *device)
+ 		rom = cbrom;
+ 	}
+ 
+-#if 0
++
++	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++	const char *scope = "\\_SB.PCI0.RP01.PEGP";
++	#else
+ 	const char *scope = acpi_device_path(device);
++	#endif
+ 	if (!scope) {
+ 		printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
+ 		return;
+ 	}
+-#endif
+ 
+ 	/* write _ROM method */
+-	acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
++	acpigen_write_scope(scope);
+ 	acpigen_write_rom((void *)rom, rom->size * 512);
+ 	acpigen_pop_len(); /* pop scope */
+ }
+diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
+index 8f4a8e1986..f80c15106c 100644
+--- a/src/ec/lenovo/h8/acpi/ec.asl
++++ b/src/ec/lenovo/h8/acpi/ec.asl
+@@ -331,7 +331,9 @@ Device(EC)
+ #include "sleepbutton.asl"
+ #include "lid.asl"
+ #include "beep.asl"
+-//#include "thermal.asl"
++#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++#include "thermal.asl"
++#endif
+ #include "systemstatus.asl"
+ #include "thinkpad.asl"
+ }
+diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
+index be71a24ced..e60b6c088c 100644
+--- a/src/ec/lenovo/h8/bluetooth.c
++++ b/src/ec/lenovo/h8/bluetooth.c
+@@ -1,6 +1,8 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-// #include <southbridge/intel/common/gpio.h>
++#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++#include <southbridge/intel/common/gpio.h>
++#endif
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -26,23 +28,27 @@ void h8_bluetooth_enable(int on)
+  */
+ bool h8_has_bdc(const struct device *dev)
+ {
++	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++	printk(BIOS_INFO, "H8: BDC detection not implemented. "
++			  "Assuming BDC installed\n");
++	return true;
++	#else
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (1 || !conf->has_bdc_detection) {
++	if (!conf->has_bdc_detection) {
+ 		printk(BIOS_INFO, "H8: BDC detection not implemented. "
+ 				  "Assuming BDC installed\n");
+ 		return true;
+ 	}
+ 
+-#if 0
+ 	if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: BDC installed\n");
+ 		return true;
+ 	}
+-#endif
+ 
+ 	printk(BIOS_INFO, "H8: BDC not installed\n");
+ 	return false;
++	#endif
+ }
+ 
+ /*
+diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
+index 5cdcf77406..b4f5787e01 100644
+--- a/src/ec/lenovo/h8/wwan.c
++++ b/src/ec/lenovo/h8/wwan.c
+@@ -1,6 +1,8 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-// #include <southbridge/intel/common/gpio.h>
++#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++#include <southbridge/intel/common/gpio.h>
++#endif
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -24,23 +26,27 @@ void h8_wwan_enable(int on)
+  */
+ bool h8_has_wwan(const struct device *dev)
+ {
++	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++	printk(BIOS_INFO, "H8: WWAN detection not implemented. "
++			  "Assuming WWAN installed\n");
++	return true;
++	#else
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (1 || !conf->has_wwan_detection) {
++	if (!conf->has_wwan_detection) {
+ 		printk(BIOS_INFO, "H8: WWAN detection not implemented. "
+ 				  "Assuming WWAN installed\n");
+ 		return true;
+ 	}
+ 
+-#if 0
+ 	if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: WWAN installed\n");
+ 		return true;
+ 	}
+-#endif
+ 
+ 	printk(BIOS_INFO, "H8: WWAN not installed\n");
+ 	return false;
++	#endif
+ }
+ 
+ /*
+-- 
+2.39.5
+

config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch

@@ -0,0 +1,42 @@
+From b313c1d4bae17fc6eb3a8217c503187d1cd5453d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 22 Apr 2025 10:21:59 +0100
+Subject: [PATCH 1/1] hp/8300cmt: remove xhci_overcurrent_mapping
+
+No longer needed, as per the following commit:
+
+commit a3d1e6c4806e6c0e2e744be3a03fce12f21778d1
+Author: Keith Hui <buurin@gmail.com>
+Date:   Tue Dec 31 18:19:31 2024 -0500
+
+    sb/intel/bd82x6x: Apply EHCI mapping to xhci_overcurrent_mapping
+
+Removing this from the devicetree also allows the
+board to compile, otherwise an error is thrown:
+
+build/mainboard/hp/compaq_elite_8300_cmt/static.c:147:10: error: 'const struct southbridge_intel_bd82x6x_config' has no member named 'xhci_overcurrent_mapping'
+  147 |         .xhci_overcurrent_mapping = 0x00000c03,
+      |          ^~~~~~~~~~~~~~~~~~~~~~~~
+build/mainboard/hp/compaq_elite_8300_cmt/static.c:147:37: error: excess elements in struct initializer [-Werror]
+  147 |         .xhci_overcurrent_mapping = 0x00000c03,
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+index 3d21739b72..3a0b6d5c59 100644
+--- a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+@@ -25,7 +25,6 @@ chip northbridge/intel/sandybridge
+ 			register "spi_lvscc" = "0x2005"
+ 			register "spi_uvscc" = "0x2005"
+ 			register "superspeed_capable_ports" = "0x0000000f"
+-			register "xhci_overcurrent_mapping" = "0x00000c03"
+ 			register "xhci_switchable_ports" = "0x0000000f"
+ 			register "usb_port_config" = "{
+ 				{ 1, 0, 0 },
+-- 
+2.39.5
+

config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch

@@ -0,0 +1,62 @@
+From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Tue, 29 Apr 2025 17:31:13 +0300
+Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler
+
+GCC 15 now considers the unterminated-string-initialization warning as
+part of -Werror by default. Coreboot compiles host utilities with the
+system compiler, which results in getting this error in some files.
+
+Mark a hexadecimal translation table in cbfstool code as "nonstring" to
+avoid the warning-turned-error.
+
+The bios log prefixes are non-null-terminated as well, but I couldn't
+figure out how to mark them as non-strings. Temporarily disable the
+warning with a pragma to avoid the error. That pragma causes an error on
+GCC 14, so disable pragma warnings along with it to avoid that as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ src/commonlib/include/commonlib/loglevel.h | 4 ++++
+ util/cbfstool/common.c                     | 2 +-
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
+index 79fbcfc6d92b..31438c945ff5 100644
+--- a/src/commonlib/include/commonlib/loglevel.h
++++ b/src/commonlib/include/commonlib/loglevel.h
+@@ -163,6 +163,9 @@
+  * When printing logs, lines should be printed with the following prefixes in
+  * front of them according to the BIOS_LOG_PREFIX_PATTERN printf() pattern.
+  */
++#pragma GCC diagnostic push
++#pragma GCC diagnostic ignored "-Wpragmas"
++#pragma GCC diagnostic ignored "-Wunterminated-string-initialization"
+ #define BIOS_LOG_PREFIX_PATTERN "[%.5s]  "
+ #define BIOS_LOG_PREFIX_MAX_LEVEL BIOS_SPEW
+ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
+@@ -177,6 +180,7 @@ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
+ 	[BIOS_DEBUG]   = "DEBUG",
+ 	[BIOS_SPEW]    = "SPEW ",
+ };
++#pragma GCC diagnostic pop
+ 
+ /*
+  * When printing to terminals supporting ANSI escape sequences, the following
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index 7154bc9d5425..cb08c9e8ec11 100644
+--- a/util/cbfstool/common.c
++++ b/util/cbfstool/common.c
+@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name)
+ 
+ char *bintohex(uint8_t *data, size_t len)
+ {
+-	static const char translate[16] = "0123456789abcdef";
++	static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
+ 
+ 	char *result = malloc(len * 2 + 1);
+ 	if (result == NULL)
+
+-- 
+2.49.0
+

config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch

@@ -0,0 +1,71 @@
+From ee3925486f3567b9fe45cb98a88b9acc64991127 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 21:15:22 +0100
+Subject: [PATCH 1/1] crossgcc/gmp: Add upstream fix for GCC 15
+
+See:
+https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html
+
+by default, upstream GCC-15 now defaults to -std=c23, instead
+of -std=c17, which can cause some build issues.
+
+GMP has this patch on their mailing list for GCC-15 (see link).
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ .../gmp-6.3.0_acinclude-m4-fix-std-c23.patch  | 43 +++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+new file mode 100644
+index 0000000000..b884b62df7
+--- /dev/null
++++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+@@ -0,0 +1,43 @@
++From b1b61bc8ab19659f0fb8c0f87edcd79ae1bfef7e Mon Sep 17 00:00:00 2001
++From: Rudi Heitbaum <rudi@heitbaum.com>
++Date: Wed, 22 Jan 2025 02:34:09 +0100
++Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure
++
++Add prototype to configure test function as c23 removes unprototyped
++functions.
++
++gcc-15 switched to -std=c23 by default:
++
++    https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212
++
++As a result `configure` fails with:
++    conftest.c: In function 'f':
++    conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6
++       12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}}
++          |                                                ^ ~
++    conftest.c:7:6: note: declared here
++        7 | void g(){}
++          |      ^
++
++Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html
++Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
++---
++ acinclude.m4 | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++diff --git a/acinclude.m4 b/acinclude.m4
++index 9cf9483..1eed843 100644
++--- a/acinclude.m4
+++++ b/acinclude.m4
++@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1],
++ 
++ #if defined (__GNUC__) && ! defined (__cplusplus)
++ typedef unsigned long long t1;typedef t1*t2;
++-void g(){}
+++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
++ void h(){}
++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
++-- 
++2.39.5
++
+-- 
+2.39.5
+

config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch

@@ -0,0 +1,54 @@
+From 983835d1470dde4559d9ee58c60e65c0bb3873c2 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 23:13:42 +0100
+Subject: [PATCH 1/1] further gcc-15 fix for compiling gmp
+
+same as the previous fix, but we needed to apply
+the exact same change to the configure file, in
+the appropriate place.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ ...6.3.0_acinclude-m4-fix-std-c23-extra.patch | 30 +++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+new file mode 100644
+index 0000000000..bee0159abf
+--- /dev/null
++++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+@@ -0,0 +1,30 @@
++From f1da82325f91ccf8f3a251c0f94388acf091c1fe Mon Sep 17 00:00:00 2001
++From: Leah Rowe <leah@libreboot.org>
++Date: Tue, 29 Apr 2025 23:11:25 +0100
++Subject: [PATCH 1/1] further gcc-15 -std=23 mitigation
++
++the same fix as in the previous revision, also needs
++to be applied here. this make the coreboot build process
++pass, when compiling gmp.
++
++Signed-off-by: Leah Rowe <leah@libreboot.org>
++---
++ configure | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++diff --git a/configure b/configure
++index 7910aa0..bd4342d 100755
++--- a/configure
+++++ b/configure
++@@ -6568,7 +6568,7 @@ if test "$gmp_prog_cc_works" = yes; then
++ 
++ #if defined (__GNUC__) && ! defined (__cplusplus)
++ typedef unsigned long long t1;typedef t1*t2;
++-void g(){}
+++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
++ void h(){}
++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
++-- 
++2.39.5
++
+-- 
+2.39.5
+

config/coreboot/default/target.cfg

@@ -1,4 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
-romtype="normal"
+rev="c247f62749b967143e58c33aa0e5e234711a628f"
-rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
-arch="x86_64"

config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb

@@ -0,0 +1,825 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=16
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode

@@ -0,0 +1,818 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=16
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell3050micro_vfsp_16mb/target.cfg

@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="3050micro"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+IFD_platform="sklkbl"
+payload_uboot_amd64="y"

config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode

@@ -0,0 +1,703 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 9010"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations"
+CONFIG_VGA_BIOS_ID="8086,0106"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="optiplex_9010_sff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9010=y
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
+CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
+CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH5545=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell7010sff_12mb/target.cfg

@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+vcfg="t1650"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb

@@ -0,0 +1,673 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode

@@ -0,0 +1,669 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780mt_8mb/target.cfg

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb

@@ -0,0 +1,673 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode

@@ -0,0 +1,669 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780mt_truncate_8mb/target.cfg

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb

@@ -0,0 +1,673 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode

@@ -0,0 +1,669 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780usff_8mb/target.cfg

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb

@@ -0,0 +1,673 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode

@@ -0,0 +1,669 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell780usff_truncate_8mb/target.cfg

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb

@@ -0,0 +1,689 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+CONFIG_UTIL_GENPARSER=y
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode

@@ -6,22 +6,23 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
+CONFIG_UTIL_GENPARSER=y
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -33,11 +34,10 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_NO_STAGE_CACHE=y
-CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,10 +55,11 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,23 +68,30 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -93,6 +101,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -103,110 +112,103 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
+# CONFIG_VENDOR_VIA is not set
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0416"
+CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
+# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
 CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="t440p"
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_PCIEXP_ASPM=y
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_PCIEXP_CLK_PM=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
 CONFIG_HAVE_IFD_BIN=y
-CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
+CONFIG_PS2K_EISAID="PNP0303"
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0036"
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -232,8 +235,6 @@ CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
 CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 # end of Mainboard
 
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
 #
 # Chipset
 #
@@ -249,6 +250,8 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,19 +261,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_MRC=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
+CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -293,6 +295,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -310,9 +313,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 # Northbridge
 #
 CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_NATIVE_RAMINIT=y
-# CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
 
 #
 # Southbridge
@@ -346,19 +347,11 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Super I/O
 #
+CONFIG_SUPERIO_SMSC_SCH555x=y
 
 #
 # Embedded Controllers
 #
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
 
 #
 # Intel Firmware
@@ -373,6 +366,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +377,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -392,6 +389,10 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -410,12 +411,13 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -423,8 +425,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -432,7 +432,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 # end of Devices
 
@@ -443,6 +443,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -455,15 +456,17 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -473,6 +476,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 CONFIG_INTEL_DDI=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -482,13 +489,14 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -509,16 +517,16 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -556,26 +564,48 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_EM100PRO_SPI_CONSOLE is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_NULL=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +638,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -615,10 +649,13 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_GDB_STUB is not set
 # CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
@@ -634,6 +671,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

config/coreboot/dell9020mt_nri_12mb/target.cfg

@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb

@@ -0,0 +1,689 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode

@@ -6,22 +6,23 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -33,11 +34,10 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_NO_STAGE_CACHE=y
-CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,10 +55,11 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,23 +68,30 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -93,6 +101,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -103,110 +112,103 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
+# CONFIG_VENDOR_VIA is not set
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
 CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
+# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
 CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+CONFIG_POST_DEVICE=y
-# CONFIG_VBOOT is not set
+CONFIG_POST_IO=y
-CONFIG_VARIANT_DIR="w541"
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_PCIEXP_ASPM=y
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_PCIEXP_CLK_PM=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
 CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_BOARD_LENOVO_THINKPAD_W541=y
+CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_BOARD_LENOVO_L520 is not set
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-# CONFIG_BOARD_LENOVO_S230U is not set
+CONFIG_TTYS0_BAUD=115200
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -232,8 +235,6 @@ CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
 CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
 # end of Mainboard
 
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
 #
 # Chipset
 #
@@ -249,6 +250,8 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,19 +261,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_MRC=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
+CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -293,6 +295,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -310,9 +313,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 # Northbridge
 #
 CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_NATIVE_RAMINIT=y
-# CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
 
 #
 # Southbridge
@@ -346,19 +347,11 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Super I/O
 #
+CONFIG_SUPERIO_SMSC_SCH555x=y
 
 #
 # Embedded Controllers
 #
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
 
 #
 # Intel Firmware
@@ -373,6 +366,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +377,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -392,6 +389,10 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -410,12 +411,13 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -423,8 +425,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -432,7 +432,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 # end of Devices
 
@@ -443,6 +443,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -455,15 +456,17 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -471,7 +474,12 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -481,13 +489,14 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -508,16 +517,16 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -555,10 +564,27 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_EM100PRO_SPI_CONSOLE is not set
@@ -574,6 +600,11 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
 CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
@@ -607,6 +638,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -614,8 +649,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_GDB_STUB is not set
 # CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
 # CONFIG_DEBUG_MALLOC is not set
@@ -634,6 +671,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

config/coreboot/dell9020sff_nri_12mb/target.cfg

@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

config/coreboot/e4300_4mb/config/libgfxinit_corebootfb

@@ -0,0 +1,650 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
+CONFIG_VGA_BIOS_ID="8086,2a42"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_VARIANT_DIR="e4300"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_E4300=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_SOCKET_P=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y