mirror of
https://codeberg.org/libreboot/lbmk.git
synced 2026-07-11 05:52:36 +02:00
coreboot/next: merge with coreboot/default
I also cherry-picked a patch from Heads, that fixes build issues caused by the hacks in the T480 port; several changes made by Mate are now ifdef'd based on whether a KabyLake ThinkPad is specified in defconfig. Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
@@ -1,7 +1,7 @@
|
||||
From 857f80c0f41908c2672bd71e161b421676c1f22b Mon Sep 17 00:00:00 2001
|
||||
From bd959c38f6ee21db1ff8f4fbb0675e38bfbe1147 Mon Sep 17 00:00:00 2001
|
||||
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
|
||||
Date: Wed, 27 Oct 2021 13:36:01 +0200
|
||||
Subject: [PATCH 01/24] add c3 and clockgen to apple/macbook21
|
||||
Subject: [PATCH 01/37] add c3 and clockgen to apple/macbook21
|
||||
|
||||
---
|
||||
src/mainboard/apple/macbook21/Kconfig | 1 +
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 055da4d70c9857b6e301a1fca61e7bf39b8ed788 Mon Sep 17 00:00:00 2001
|
||||
From e5eab4c8043b89a325b4a28bf7da456d68475144 Mon Sep 17 00:00:00 2001
|
||||
From: persmule <persmule@gmail.com>
|
||||
Date: Sun, 31 Oct 2021 23:33:26 +0000
|
||||
Subject: [PATCH 02/24] lenovo/t400: Enable all SATA ports
|
||||
Subject: [PATCH 02/37] lenovo/t400: Enable all SATA ports
|
||||
|
||||
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
|
||||
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From c0246706b784309729194a8e7dd12e130eb74130 Mon Sep 17 00:00:00 2001
|
||||
From fd398cc10600cccce3dd4931651a5294ffebde9a Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 3 Jan 2022 19:06:22 +0000
|
||||
Subject: [PATCH 03/24] lenovo/x230: set me_state=Disabled in cmos.default
|
||||
Subject: [PATCH 03/37] lenovo/x230: set me_state=Disabled in cmos.default
|
||||
|
||||
I only recently found out about this. It's possible to use me_cleaner to
|
||||
do the same thing, but some people might just flash coreboot and not do
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From b84b1d40d5fef3278d9ea218e92576c095d8814c Mon Sep 17 00:00:00 2001
|
||||
From 74230d8123cb7c31afd084658720084b1a5ac5d9 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Wed, 2 Mar 2022 21:50:01 +0000
|
||||
Subject: [PATCH 04/24] set me_state=Disabled on all cmos.default files!
|
||||
Subject: [PATCH 04/37] set me_state=Disabled on all cmos.default files!
|
||||
|
||||
yeah. why the hell isn't this the default
|
||||
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From f6593dd2146657ee39e2ac3f4b4bac5e7569df67 Mon Sep 17 00:00:00 2001
|
||||
From f592ac32892d7f99fa2e68504bb147e5d06184ca Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sun, 19 Feb 2023 18:21:43 +0000
|
||||
Subject: [PATCH 05/24] util/ifdtool: add --nuke flag (all 0xFF on region)
|
||||
Subject: [PATCH 05/37] util/ifdtool: add --nuke flag (all 0xFF on region)
|
||||
|
||||
When this option is used, the region's contents are overwritten
|
||||
with all ones (0xFF).
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From c730bc21c276376baa36956548af1e8412325a9e Mon Sep 17 00:00:00 2001
|
||||
From 18069af7c0c6beedfadb615cca9127e82a0d8007 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Sat, 6 May 2023 15:53:41 -0600
|
||||
Subject: [PATCH 06/24] mb/dell/e6400: Enable 01.0 device in devicetree for
|
||||
Subject: [PATCH 06/37] mb/dell/e6400: Enable 01.0 device in devicetree for
|
||||
dGPU models
|
||||
|
||||
Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From b109338522d997dd1b1f705891f000c2f8bfe457 Mon Sep 17 00:00:00 2001
|
||||
From 9563c107a4b40e66b610d7205a21590c7c181c78 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Fri, 12 May 2023 19:55:15 -0600
|
||||
Subject: [PATCH 07/24] Remove warning for coreboot images built without a
|
||||
Subject: [PATCH 07/37] Remove warning for coreboot images built without a
|
||||
payload
|
||||
|
||||
I added this in upstream to prevent people from accidentally flashing
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 243d3b1892d33b4eccc9c48333fbc137c4294a73 Mon Sep 17 00:00:00 2001
|
||||
From 7f650a19d30fe6157b150c5248d6086007323d72 Mon Sep 17 00:00:00 2001
|
||||
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
|
||||
Date: Thu, 22 Jun 2023 16:44:27 +0300
|
||||
Subject: [PATCH 08/24] HACK: Disable coreboot related BL31 features
|
||||
Subject: [PATCH 08/37] HACK: Disable coreboot related BL31 features
|
||||
|
||||
I don't know why, but removing this BL31 make argument lets gru-kevin
|
||||
power off properly when shut down from Linux. Needs investigation.
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From ef4f92299f18c5f28bfe8392cbc0e27d48c03415 Mon Sep 17 00:00:00 2001
|
||||
From 3f6f65ed6a435fe49534c8a0b5cb98c3eac71150 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Sun, 5 Nov 2023 11:41:41 +0000
|
||||
Subject: [PATCH 09/24] dell/e6430: use ME Soft Temporary Disable
|
||||
Subject: [PATCH 09/37] dell/e6430: use ME Soft Temporary Disable
|
||||
|
||||
i overlooked this. it's set on other boards.
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 0cf8b5be9187a6d54e100483943c72f550bc2690 Mon Sep 17 00:00:00 2001
|
||||
From b4d48233a8d829d7285501f662d999aad898be21 Mon Sep 17 00:00:00 2001
|
||||
From: Riku Viitanen <riku.viitanen@protonmail.com>
|
||||
Date: Sat, 23 Dec 2023 19:02:10 +0200
|
||||
Subject: [PATCH 10/24] mb/hp: Add Compaq Elite 8300 CMT port
|
||||
Subject: [PATCH 10/37] mb/hp: Add Compaq Elite 8300 CMT port
|
||||
|
||||
Based on autoport and Z220 SuperIO code.
|
||||
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From a4ffe8da011550fdeacae85ebf642ff57ffb08cc Mon Sep 17 00:00:00 2001
|
||||
From a16ff494adb1f706d402a2e167d0d53c775d0897 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 2 Mar 2024 22:51:09 +0000
|
||||
Subject: [PATCH 11/24] nb/intel/haswell: make IOMMU a runtime option
|
||||
Subject: [PATCH 11/37] nb/intel/haswell: make IOMMU a runtime option
|
||||
|
||||
When I tested graphics cards on a coreboot port for Dell
|
||||
OptiPlex 9020 SFF, I could not use a graphics card unless
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From bcb2017f4c583742bc60179e6f7c7381e1fa0a39 Mon Sep 17 00:00:00 2001
|
||||
From 4b0536ce7cd55eedc52d13497bea59d91e8924d8 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 2 Mar 2024 23:00:09 +0000
|
||||
Subject: [PATCH 12/24] dell/optiplex_9020: Disable IOMMU by default
|
||||
Subject: [PATCH 12/37] dell/optiplex_9020: Disable IOMMU by default
|
||||
|
||||
Needed to make graphics cards work. Turning it on is
|
||||
recommended if only using iGPU, otherwise leave it off
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 1515f6f416a75ecf6de0615f30fc1c5c6696e4d8 Mon Sep 17 00:00:00 2001
|
||||
From c8329f84b2d06581dcbeecedc38b7c4715a9cba7 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 6 Apr 2024 01:22:47 +0100
|
||||
Subject: [PATCH 13/24] nb/haswell: Fully disable iGPU when dGPU is used
|
||||
Subject: [PATCH 13/37] nb/haswell: Fully disable iGPU when dGPU is used
|
||||
|
||||
My earlier patch disabled decode *and* disabled the iGPU itself, but
|
||||
a subsequent revision disabled only VGA decode. Upon revisiting, I
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 7eb31625fc82a8f697a2f7972b24a4dd19effe5b Mon Sep 17 00:00:00 2001
|
||||
From 73dbf291631fdbae2d8e8a761c147523c8d9e65c Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Fri, 3 May 2024 11:03:32 -0600
|
||||
Subject: [PATCH 14/24] ec/dell/mec5035: Add S3 suspend SMI handler
|
||||
Subject: [PATCH 14/37] ec/dell/mec5035: Add S3 suspend SMI handler
|
||||
|
||||
This is necessary for S3 resume to work on SNB and newer Dell Latitude
|
||||
laptops. If a command isn't sent, the EC cuts power to the DIMMs,
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 961814da316a7bd760cd4aa3acd8e176a9ff2cf1 Mon Sep 17 00:00:00 2001
|
||||
From a507fe609a2e99c95218ec430916eaf4c3cb61d9 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 4 May 2024 02:00:53 +0100
|
||||
Subject: [PATCH 15/24] nb/haswell: lock policy regs when disabling IOMMU
|
||||
Subject: [PATCH 15/37] nb/haswell: lock policy regs when disabling IOMMU
|
||||
|
||||
Angel Pons told me I should do it. See comments here:
|
||||
https://review.coreboot.org/c/coreboot/+/81016
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 24e8c088fbe14b598e588383d331f06f21d87190 Mon Sep 17 00:00:00 2001
|
||||
From 9e0a6aa376db81f9409eda92b6783a8262c1fedb Mon Sep 17 00:00:00 2001
|
||||
From: Angel Pons <th3fanbus@gmail.com>
|
||||
Date: Mon, 10 May 2021 22:40:59 +0200
|
||||
Subject: [PATCH 16/24] nb/intel/gm45: Make DDR2 raminit work
|
||||
Subject: [PATCH 16/37] nb/intel/gm45: Make DDR2 raminit work
|
||||
|
||||
List of changes:
|
||||
- Update some timing and ODT values
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From b0ff2cc0470a44078e87bff6226d34b7ac652508 Mon Sep 17 00:00:00 2001
|
||||
From 6acc310c1d695d47c148296da9da189de21d58be Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Tue, 6 Aug 2024 00:50:24 +0100
|
||||
Subject: [PATCH 17/24] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
|
||||
Subject: [PATCH 17/37] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
|
||||
|
||||
We add this patch:
|
||||
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 8926fcba34f6d6ea59bcddbbebf1830df38106d2 Mon Sep 17 00:00:00 2001
|
||||
From 7461210ecc7c8e41f3f941bd5ce7943e5f66c711 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Mon, 20 May 2024 10:24:16 -0600
|
||||
Subject: [PATCH 18/24] mb/dell/e6400: Use 100 MHz reference clock for display
|
||||
Subject: [PATCH 18/37] mb/dell/e6400: Use 100 MHz reference clock for display
|
||||
|
||||
The E6400 uses a 100 MHz reference clock for spread spectrum support on
|
||||
LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From a80e71ba4cd7dc7c131c9649de1424899fddddb1 Mon Sep 17 00:00:00 2001
|
||||
From a683dffd774dbbe25cc77c0f7d3853232c17c2bf Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Mon, 12 Aug 2024 02:15:24 +0100
|
||||
Subject: [PATCH 19/24] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
|
||||
Subject: [PATCH 19/37] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
|
||||
|
||||
set it to 96MHz. fixes the following build error when
|
||||
building for x4x boards e.g. gigabyte ga-g41m-es2l:
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 1d62741f0f069241c2d1497c7faf0b31249e706d Mon Sep 17 00:00:00 2001
|
||||
From a48ba23bb4a24730fa49b5a10b56c9de873dea8a Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Thu, 26 Sep 2024 19:48:26 -0600
|
||||
Subject: [PATCH 20/24] mb/dell: Convert E6400 into a variant
|
||||
Subject: [PATCH 20/37] mb/dell: Convert E6400 into a variant
|
||||
|
||||
All the GM45 Dell Latitudes should be nearly identical, so convert the
|
||||
E6400 port into a variant so that future ports for the other systems can
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 031aca7160b8258bd16d5c5a3481c6ee900111e1 Mon Sep 17 00:00:00 2001
|
||||
From b87e6774f0407ea48610c83ea54ab6a4b4a78a24 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Thu, 26 Sep 2024 19:51:25 -0600
|
||||
Subject: [PATCH 21/24] mb/dell/gm45_latitudes: Add E4300 variant
|
||||
Subject: [PATCH 21/37] mb/dell/gm45_latitudes: Add E4300 variant
|
||||
|
||||
Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From e6a153dbaf95b034f75dd6717c6d250d1cc21635 Mon Sep 17 00:00:00 2001
|
||||
From 0bc9ca409793836dcdb386db97b7a9464d92a973 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Fri, 3 May 2024 16:31:12 -0600
|
||||
Subject: [PATCH 22/24] mb/dell: Add S3 SMI handler for Dell Latitudes
|
||||
Subject: [PATCH 22/37] mb/dell: Add S3 SMI handler for Dell Latitudes
|
||||
|
||||
Integrate the previously added mec5035_smi_sleep() function into
|
||||
mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 41fab69e70eb78b93e1998396bf85a5afbaa61ef Mon Sep 17 00:00:00 2001
|
||||
From d91dc168d6b8eca5e78aef9e48571d6edb156d45 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Tue, 18 Jun 2024 21:31:08 -0600
|
||||
Subject: [PATCH 23/24] ec/dell/mec5035: Route power button event to host
|
||||
Subject: [PATCH 23/37] ec/dell/mec5035: Route power button event to host
|
||||
|
||||
If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
|
||||
power button results in the EC powering off the system without letting
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 1380f0f6f3c73bbd994228acdbcbbc06da7c6cb2 Mon Sep 17 00:00:00 2001
|
||||
From b6bd33b0430f72c2fce16a3b1e41927ef540923b Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Tue, 31 Dec 2024 14:42:24 +0000
|
||||
Subject: [PATCH 24/24] Disable compression on refcode insertion
|
||||
Subject: [PATCH 24/37] Disable compression on refcode insertion
|
||||
|
||||
Compression is not reliably reproducible. In an lbmk release
|
||||
context, this means we cannot rely on vendorfile insertion.
|
||||
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 3400b3e7c31e45506bb060db0164fa9390366d27 Mon Sep 17 00:00:00 2001
|
||||
From fc4c65f3bb807b9fc766745a70f92729b0b8d99e Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 21 Apr 2025 02:58:47 +0100
|
||||
Subject: [PATCH 1/1] nb/intel/*: Disable stack overflow debug options
|
||||
Subject: [PATCH 25/37] nb/intel/*: Disable stack overflow debug options
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
|
||||
+3
-3
@@ -1,7 +1,7 @@
|
||||
From 0a28ea805e3dddfaa89e6c4255506a390bc7ce04 Mon Sep 17 00:00:00 2001
|
||||
From 14002b2575d73d3edbc72584502a463e6802cba6 Mon Sep 17 00:00:00 2001
|
||||
From: Felix Singer <felixsinger@posteo.net>
|
||||
Date: Wed, 26 Jun 2024 04:24:31 +0200
|
||||
Subject: [PATCH 01/11] soc/intel/skylake: configure usb acpi
|
||||
Subject: [PATCH 26/37] soc/intel/skylake: configure usb acpi
|
||||
|
||||
Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
|
||||
Signed-off-by: Felix Singer <felixsinger@posteo.net>
|
||||
@@ -11,7 +11,7 @@ Signed-off-by: Felix Singer <felixsinger@posteo.net>
|
||||
2 files changed, 56 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
|
||||
index 22017c848b..c24df2ef75 100644
|
||||
index 4ad33496b2..9191ed0ff8 100644
|
||||
--- a/src/soc/intel/skylake/Kconfig
|
||||
+++ b/src/soc/intel/skylake/Kconfig
|
||||
@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From aa6dd7aa4693bd9ce1fe7f35b9532e5411fc1098 Mon Sep 17 00:00:00 2001
|
||||
From 3bb65b7f2a02ecb93e15ae037da38ad8f812747b Mon Sep 17 00:00:00 2001
|
||||
From: Mate Kukri <km@mkukri.xyz>
|
||||
Date: Fri, 22 Nov 2024 21:26:48 +0000
|
||||
Subject: [PATCH 02/11] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
|
||||
Subject: [PATCH 27/37] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
|
||||
bootblock
|
||||
|
||||
Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
|
||||
+6
-11
@@ -1,7 +1,7 @@
|
||||
From 1652c22825d3001e77159aa539dfa49d2389c775 Mon Sep 17 00:00:00 2001
|
||||
From b515ba5b0cd02dc1771f27eaa716582b0827a638 Mon Sep 17 00:00:00 2001
|
||||
From: Mate Kukri <km@mkukri.xyz>
|
||||
Date: Tue, 31 Dec 2024 22:49:15 +0000
|
||||
Subject: [PATCH 03/11] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
|
||||
Subject: [PATCH 28/37] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
|
||||
|
||||
These machine have BootGuard fused and requires deguard to
|
||||
boot coreboot.
|
||||
@@ -117,11 +117,11 @@ Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
|
||||
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin
|
||||
|
||||
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
|
||||
index d60720eb49..cc6b9b068a 100644
|
||||
index dc41ef14ce..bba98d9dea 100644
|
||||
--- a/src/device/pci_rom.c
|
||||
+++ b/src/device/pci_rom.c
|
||||
@@ -304,11 +304,13 @@ void pci_rom_ssdt(const struct device *device)
|
||||
return;
|
||||
@@ -396,14 +396,16 @@ void pci_rom_ssdt(const struct device *device)
|
||||
rom = cbrom;
|
||||
}
|
||||
|
||||
+#if 0
|
||||
@@ -132,15 +132,10 @@ index d60720eb49..cc6b9b068a 100644
|
||||
}
|
||||
+#endif
|
||||
|
||||
/* Supports up to four devices. */
|
||||
if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) {
|
||||
@@ -336,7 +338,7 @@ void pci_rom_ssdt(const struct device *device)
|
||||
memcpy(cbrom, rom, cbrom_length);
|
||||
|
||||
/* write _ROM method */
|
||||
- acpigen_write_scope(scope);
|
||||
+ acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
|
||||
acpigen_write_rom(cbrom, cbrom_length);
|
||||
acpigen_write_rom((void *)rom, rom->size * 512);
|
||||
acpigen_pop_len(); /* pop scope */
|
||||
}
|
||||
diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 2527c4a5131d7b33e43bbc03a94921e7e59b4b02 Mon Sep 17 00:00:00 2001
|
||||
From 75cc0ea09234064318046624845b0afc5afb0ce5 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Mon, 30 Sep 2024 20:44:38 -0400
|
||||
Subject: [PATCH 04/11] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
|
||||
Subject: [PATCH 29/37] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
|
||||
|
||||
Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 41b93b8786ba14830648cd166f86b6317d655359 Mon Sep 17 00:00:00 2001
|
||||
From 6725ec0bb976c61cbe87e61bf0e8b02e38d14de9 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Wed, 30 Oct 2024 20:55:25 -0600
|
||||
Subject: [PATCH 07/11] mb/dell/optiplex_780: Add USFF variant
|
||||
Subject: [PATCH 30/37] mb/dell/optiplex_780: Add USFF variant
|
||||
|
||||
Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
+4
-4
@@ -1,7 +1,7 @@
|
||||
From c8192c52b2bfa93aeb6c6639476ca217e33c4313 Mon Sep 17 00:00:00 2001
|
||||
From 4ffaddc37d30d39f25faeaef73046a6e2ce525e8 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Wed, 11 Dec 2024 01:06:01 +0000
|
||||
Subject: [PATCH 08/11] dell/3050micro: disable nvme hotplug
|
||||
Subject: [PATCH 31/37] dell/3050micro: disable nvme hotplug
|
||||
|
||||
in my testing, when running my 3050micro for a few days,
|
||||
the nvme would sometimes randomly rename.
|
||||
@@ -30,12 +30,12 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
1 file changed, 3 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
|
||||
index 039709aa4a..0678ed1765 100644
|
||||
index da11085ab6..2a97306c5d 100644
|
||||
--- a/src/mainboard/dell/optiplex_3050/devicetree.cb
|
||||
+++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
|
||||
@@ -45,7 +45,9 @@ chip soc/intel/skylake
|
||||
register "PcieRpAdvancedErrorReporting[20]" = "1"
|
||||
register "PcieRpLtrEnable[20]" = "1"
|
||||
register "PcieRpLtrEnable[20]" = "true"
|
||||
register "PcieRpClkSrcNumber[20]" = "3"
|
||||
- register "PcieRpHotPlug[20]" = "1"
|
||||
+# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2,
|
||||
+2
-2
@@ -1,7 +1,7 @@
|
||||
From 35295d97b08ee659b6770ce39003732a4bdfb6a0 Mon Sep 17 00:00:00 2001
|
||||
From 5d8930edfa1d9537ba80e24c0cf8f0c9e4e9ec72 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Wed, 18 Dec 2024 02:06:18 +0000
|
||||
Subject: [PATCH 09/11] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
|
||||
Subject: [PATCH 32/37] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
|
||||
|
||||
This is used by lbmk to know where a tb.bin file goes,
|
||||
when extracting and padding TBT.bin from Lenovo ThunderBolt
|
||||
+3
-3
@@ -1,7 +1,7 @@
|
||||
From f08dbaacf747eb198bbc8f83e0220ca803f19116 Mon Sep 17 00:00:00 2001
|
||||
From 49cee334bc7fe9a78b9355b5256a37984bac385a Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Thu, 26 Dec 2024 19:45:20 +0000
|
||||
Subject: [PATCH 10/11] soc/intel/skylake: Don't compress FSP-S
|
||||
Subject: [PATCH 33/37] soc/intel/skylake: Don't compress FSP-S
|
||||
|
||||
Build systems like lbmk need to reproducibly insert
|
||||
certain vendor files on release images.
|
||||
@@ -19,7 +19,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
|
||||
index c24df2ef75..8e25f796ed 100644
|
||||
index 9191ed0ff8..d51ffaef7b 100644
|
||||
--- a/src/soc/intel/skylake/Kconfig
|
||||
+++ b/src/soc/intel/skylake/Kconfig
|
||||
@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
|
||||
+4
-4
@@ -1,7 +1,7 @@
|
||||
From 12ff6e798d1cefc5b888e6035e52bf6d70c9ca47 Mon Sep 17 00:00:00 2001
|
||||
From 09740dc9d43a8dc24b7416b70476796515af6581 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Tue, 31 Dec 2024 01:40:42 +0000
|
||||
Subject: [PATCH 11/11] soc/intel/pmc: Hardcoded poweroff after power fail
|
||||
Subject: [PATCH 34/37] soc/intel/pmc: Hardcoded poweroff after power fail
|
||||
|
||||
Coreboot can set the power state for power on after previous
|
||||
power failure, based on the option table. On the ThinkPad T480,
|
||||
@@ -31,10 +31,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
|
||||
1 file changed, 4 insertions(+), 32 deletions(-)
|
||||
|
||||
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
|
||||
index 0fadd6e409..843581b285 100644
|
||||
index 64b9bb997c..7823775bcb 100644
|
||||
--- a/src/soc/intel/common/block/pmc/pmclib.c
|
||||
+++ b/src/soc/intel/common/block/pmc/pmclib.c
|
||||
@@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void)
|
||||
@@ -776,38 +776,10 @@ void pmc_clear_pmcon_sts(void)
|
||||
|
||||
void pmc_set_power_failure_state(const bool target_on)
|
||||
{
|
||||
+4
-4
@@ -1,7 +1,7 @@
|
||||
From 00b6459a9b360b16529036d9b1e10c977228a7ff Mon Sep 17 00:00:00 2001
|
||||
From 18f4e970ebda43dd538f74398aea463a67040dd3 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 6 Jan 2025 01:36:23 +0000
|
||||
Subject: [PATCH 1/1] src/intel/skylake: Disable stack overflow debug options
|
||||
Subject: [PATCH 35/37] src/intel/skylake: Disable stack overflow debug options
|
||||
|
||||
The option was appearing in T480/3050micro configs of lbmk,
|
||||
after updating on the coreboot/next uprev for 20241206 rev8:
|
||||
@@ -37,10 +37,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
|
||||
index 8e25f796ed..7d324e15ea 100644
|
||||
index d51ffaef7b..42af82a5d8 100644
|
||||
--- a/src/soc/intel/skylake/Kconfig
|
||||
+++ b/src/soc/intel/skylake/Kconfig
|
||||
@@ -130,6 +130,15 @@ config DCACHE_RAM_SIZE
|
||||
@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE
|
||||
The size of the cache-as-ram region required during bootblock
|
||||
and/or romstage.
|
||||
|
||||
+4
-4
@@ -1,7 +1,7 @@
|
||||
From 5671d54d347b110ffade5b8b6e2d052612a8716c Mon Sep 17 00:00:00 2001
|
||||
From 8dcd86c34d92b9b17bcfe4c7c61793042dc97268 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 6 Jan 2025 01:53:53 +0000
|
||||
Subject: [PATCH 1/1] src/intel/x4x: Disable stack overflow debug
|
||||
Subject: [PATCH 36/37] src/intel/x4x: Disable stack overflow debug
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
@@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
|
||||
index 097e11126c..7e4e14cf94 100644
|
||||
index 1803ef5733..7129aabf72 100644
|
||||
--- a/src/northbridge/intel/x4x/Kconfig
|
||||
+++ b/src/northbridge/intel/x4x/Kconfig
|
||||
@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER
|
||||
@@ -32,6 +32,15 @@ config ECAM_MMCONF_BUS_NUMBER
|
||||
int
|
||||
default 256
|
||||
|
||||
@@ -0,0 +1,37 @@
|
||||
From 9b547c2029611793f895117a807fa2d2c22a5332 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 21 Apr 2025 05:14:45 +0100
|
||||
Subject: [PATCH 37/37] Conditional TBFW setting for T480/T480S
|
||||
|
||||
Otherwise, other boards will define it, which
|
||||
might trigger the vendor download script, and
|
||||
lead to a non-zero exit.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/mainboard/lenovo/Kconfig | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
|
||||
index 512b326381..3d3490b35d 100644
|
||||
--- a/src/mainboard/lenovo/Kconfig
|
||||
+++ b/src/mainboard/lenovo/Kconfig
|
||||
@@ -18,6 +18,8 @@ config MAINBOARD_FAMILY
|
||||
string
|
||||
default MAINBOARD_PART_NUMBER
|
||||
|
||||
+if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S
|
||||
+
|
||||
config LENOVO_TBFW_BIN
|
||||
string "Lenovo ThunderBolt firmware bin file"
|
||||
default ""
|
||||
@@ -44,4 +46,6 @@ config LENOVO_TBFW_BIN
|
||||
Just leave this blank if you don't care about this option. It's not
|
||||
useful for every ThinkPad, only certain models.
|
||||
|
||||
+endif # BOARD LENOVO_T480 || BOARD_LENOVO_T480S
|
||||
+
|
||||
endif # VENDOR_LENOVO
|
||||
--
|
||||
2.39.5
|
||||
|
||||
+153
@@ -0,0 +1,153 @@
|
||||
From 49204919e885dca2be45ffbaf2f5af62109ec3a7 Mon Sep 17 00:00:00 2001
|
||||
From: gaspar-ilom <gasparilom@riseup.net>
|
||||
Date: Thu, 6 Mar 2025 23:00:00 +0000
|
||||
Subject: [PATCH 1/1] do not break building other thinkpads with the hacks for
|
||||
the t480/s made Mate Kukri
|
||||
|
||||
still not fixing things properly but at least it should now be possible to build older thinkpads without regressions.
|
||||
prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives.
|
||||
heads should build all boards on this coreboot version from the same coreboot tree.
|
||||
|
||||
Signed-off-by: gaspar-ilom <gasparilom@riseup.net>
|
||||
---
|
||||
src/device/pci_rom.c | 9 ++++++---
|
||||
src/ec/lenovo/h8/acpi/ec.asl | 4 +++-
|
||||
src/ec/lenovo/h8/bluetooth.c | 14 ++++++++++----
|
||||
src/ec/lenovo/h8/wwan.c | 14 ++++++++++----
|
||||
4 files changed, 29 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
|
||||
index bba98d9dea..db3dbbe2ce 100644
|
||||
--- a/src/device/pci_rom.c
|
||||
+++ b/src/device/pci_rom.c
|
||||
@@ -396,16 +396,19 @@ void pci_rom_ssdt(const struct device *device)
|
||||
rom = cbrom;
|
||||
}
|
||||
|
||||
-#if 0
|
||||
+
|
||||
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+ const char *scope = "\\_SB.PCI0.RP01.PEGP";
|
||||
+ #else
|
||||
const char *scope = acpi_device_path(device);
|
||||
+ #endif
|
||||
if (!scope) {
|
||||
printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
|
||||
return;
|
||||
}
|
||||
-#endif
|
||||
|
||||
/* write _ROM method */
|
||||
- acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
|
||||
+ acpigen_write_scope(scope);
|
||||
acpigen_write_rom((void *)rom, rom->size * 512);
|
||||
acpigen_pop_len(); /* pop scope */
|
||||
}
|
||||
diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
|
||||
index 8f4a8e1986..f80c15106c 100644
|
||||
--- a/src/ec/lenovo/h8/acpi/ec.asl
|
||||
+++ b/src/ec/lenovo/h8/acpi/ec.asl
|
||||
@@ -331,7 +331,9 @@ Device(EC)
|
||||
#include "sleepbutton.asl"
|
||||
#include "lid.asl"
|
||||
#include "beep.asl"
|
||||
-//#include "thermal.asl"
|
||||
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+#include "thermal.asl"
|
||||
+#endif
|
||||
#include "systemstatus.asl"
|
||||
#include "thinkpad.asl"
|
||||
}
|
||||
diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
|
||||
index be71a24ced..e60b6c088c 100644
|
||||
--- a/src/ec/lenovo/h8/bluetooth.c
|
||||
+++ b/src/ec/lenovo/h8/bluetooth.c
|
||||
@@ -1,6 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
-// #include <southbridge/intel/common/gpio.h>
|
||||
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+#include <southbridge/intel/common/gpio.h>
|
||||
+#endif
|
||||
#include <console/console.h>
|
||||
#include <device/device.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
@@ -26,23 +28,27 @@ void h8_bluetooth_enable(int on)
|
||||
*/
|
||||
bool h8_has_bdc(const struct device *dev)
|
||||
{
|
||||
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+ printk(BIOS_INFO, "H8: BDC detection not implemented. "
|
||||
+ "Assuming BDC installed\n");
|
||||
+ return true;
|
||||
+ #else
|
||||
struct ec_lenovo_h8_config *conf = dev->chip_info;
|
||||
|
||||
- if (1 || !conf->has_bdc_detection) {
|
||||
+ if (!conf->has_bdc_detection) {
|
||||
printk(BIOS_INFO, "H8: BDC detection not implemented. "
|
||||
"Assuming BDC installed\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
-#if 0
|
||||
if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
|
||||
printk(BIOS_INFO, "H8: BDC installed\n");
|
||||
return true;
|
||||
}
|
||||
-#endif
|
||||
|
||||
printk(BIOS_INFO, "H8: BDC not installed\n");
|
||||
return false;
|
||||
+ #endif
|
||||
}
|
||||
|
||||
/*
|
||||
diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
|
||||
index 5cdcf77406..b4f5787e01 100644
|
||||
--- a/src/ec/lenovo/h8/wwan.c
|
||||
+++ b/src/ec/lenovo/h8/wwan.c
|
||||
@@ -1,6 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
-// #include <southbridge/intel/common/gpio.h>
|
||||
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+#include <southbridge/intel/common/gpio.h>
|
||||
+#endif
|
||||
#include <console/console.h>
|
||||
#include <device/device.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
@@ -24,23 +26,27 @@ void h8_wwan_enable(int on)
|
||||
*/
|
||||
bool h8_has_wwan(const struct device *dev)
|
||||
{
|
||||
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+ printk(BIOS_INFO, "H8: WWAN detection not implemented. "
|
||||
+ "Assuming WWAN installed\n");
|
||||
+ return true;
|
||||
+ #else
|
||||
struct ec_lenovo_h8_config *conf = dev->chip_info;
|
||||
|
||||
- if (1 || !conf->has_wwan_detection) {
|
||||
+ if (!conf->has_wwan_detection) {
|
||||
printk(BIOS_INFO, "H8: WWAN detection not implemented. "
|
||||
"Assuming WWAN installed\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
-#if 0
|
||||
if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
|
||||
printk(BIOS_INFO, "H8: WWAN installed\n");
|
||||
return true;
|
||||
}
|
||||
-#endif
|
||||
|
||||
printk(BIOS_INFO, "H8: WWAN not installed\n");
|
||||
return false;
|
||||
+ #endif
|
||||
}
|
||||
|
||||
/*
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
@@ -88,6 +89,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -152,8 +154,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_USE_PM_ACPI_TIMER=y
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
@@ -179,7 +182,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
|
||||
@@ -188,6 +190,7 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
@@ -289,6 +292,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y
|
||||
CONFIG_SKYLAKE_SOC_PCH_H=y
|
||||
CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
|
||||
CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FSP_T_LOCATION=0xfffe0000
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
||||
@@ -330,10 +334,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
|
||||
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
|
||||
CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
|
||||
CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
|
||||
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
|
||||
CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
|
||||
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
|
||||
CONFIG_SOC_INTEL_CSE_RW_FILE=""
|
||||
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
|
||||
@@ -433,6 +434,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -482,6 +484,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_UDK_BASE=y
|
||||
CONFIG_UDK_2017_BINDING=y
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
@@ -584,6 +587,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -594,7 +598,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_FSP_USE_REPO is not set
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
CONFIG_PLATFORM_USES_FSP2_X86_32=y
|
||||
CONFIG_HAVE_INTEL_FSP_REPO=y
|
||||
@@ -604,7 +607,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
# CONFIG_FSP_FULL_FD is not set
|
||||
CONFIG_FSP_T_RESERVED_SIZE=0x0
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
|
||||
CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
|
||||
CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
|
||||
@@ -807,6 +809,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
@@ -88,6 +89,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -150,8 +152,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_USE_PM_ACPI_TIMER=y
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
@@ -177,7 +180,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
|
||||
@@ -186,6 +188,7 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
@@ -287,6 +290,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y
|
||||
CONFIG_SKYLAKE_SOC_PCH_H=y
|
||||
CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
|
||||
CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FSP_T_LOCATION=0xfffe0000
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
||||
@@ -328,10 +332,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
|
||||
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
|
||||
CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
|
||||
CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
|
||||
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
|
||||
CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
|
||||
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
|
||||
CONFIG_SOC_INTEL_CSE_RW_FILE=""
|
||||
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
|
||||
@@ -431,6 +432,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -480,6 +482,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_UDK_BASE=y
|
||||
CONFIG_UDK_2017_BINDING=y
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
@@ -576,6 +579,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -586,7 +590,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_FSP_USE_REPO is not set
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
CONFIG_PLATFORM_USES_FSP2_X86_32=y
|
||||
CONFIG_HAVE_INTEL_FSP_REPO=y
|
||||
@@ -596,7 +599,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
# CONFIG_FSP_FULL_FD is not set
|
||||
CONFIG_FSP_T_RESERVED_SIZE=0x0
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
|
||||
CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
|
||||
CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
|
||||
@@ -800,6 +802,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="next"
|
||||
tree="default"
|
||||
xarch="i386-elf"
|
||||
payload_seabios="y"
|
||||
payload_grub="y"
|
||||
|
||||
@@ -158,6 +158,8 @@ CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="next"
|
||||
tree="default"
|
||||
xarch="i386-elf"
|
||||
payload_seabios="y"
|
||||
payload_grub="y"
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="next"
|
||||
tree="default"
|
||||
xarch="i386-elf"
|
||||
payload_seabios="y"
|
||||
payload_grub="y"
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="next"
|
||||
tree="default"
|
||||
xarch="i386-elf"
|
||||
payload_seabios="y"
|
||||
payload_grub="y"
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfeff8000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="next"
|
||||
tree="default"
|
||||
xarch="i386-elf"
|
||||
payload_seabios="y"
|
||||
payload_grub="y"
|
||||
|
||||
@@ -159,6 +159,8 @@ CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -159,6 +159,8 @@ CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -156,6 +156,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_BOARD_DELL_E4300=y
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -154,6 +154,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_BOARD_DELL_E4300=y
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
CONFIG_BOARD_DELL_LATITUDE_E5420=y
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
CONFIG_BOARD_DELL_LATITUDE_E5420=y
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -156,6 +156,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
CONFIG_BOARD_DELL_E6400=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -154,6 +154,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
CONFIG_BOARD_DELL_E6400=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -153,6 +153,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
CONFIG_BOARD_DELL_E6400=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
-205
@@ -1,205 +0,0 @@
|
||||
From 27b2f2bc24e5e860b87119c963e534fb0d3e55f2 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sun, 19 Feb 2023 18:21:43 +0000
|
||||
Subject: [PATCH 05/11] util/ifdtool: add --nuke flag (all 0xFF on region)
|
||||
|
||||
When this option is used, the region's contents are overwritten
|
||||
with all ones (0xFF).
|
||||
|
||||
Example:
|
||||
|
||||
./ifdtool --nuke gbe coreboot.rom
|
||||
./ifdtool --nuke bios coreboot.com
|
||||
./ifdtool --nuke me coreboot.com
|
||||
|
||||
Rebased since the last revision update in lbmk.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
|
||||
1 file changed, 83 insertions(+), 31 deletions(-)
|
||||
|
||||
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
|
||||
index 94105efe52..0706496af2 100644
|
||||
--- a/util/ifdtool/ifdtool.c
|
||||
+++ b/util/ifdtool/ifdtool.c
|
||||
@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
|
||||
" tgl - Tiger Lake\n"
|
||||
" wbg - Wellsburg\n"
|
||||
" -S | --setpchstrap Write a PCH strap\n"
|
||||
+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n"
|
||||
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
|
||||
" -v | --version: print the version\n"
|
||||
" -h | --help: print this help\n\n"
|
||||
@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
|
||||
"\n");
|
||||
}
|
||||
|
||||
+static int
|
||||
+get_region_type_string(const char *region_type_string)
|
||||
+{
|
||||
+ if (!strcasecmp("Descriptor", region_type_string))
|
||||
+ return 0;
|
||||
+ else if (!strcasecmp("BIOS", region_type_string))
|
||||
+ return 1;
|
||||
+ else if (!strcasecmp("ME", region_type_string))
|
||||
+ return 2;
|
||||
+ else if (!strcasecmp("GbE", region_type_string))
|
||||
+ return 3;
|
||||
+ else if (!strcasecmp("Platform Data", region_type_string))
|
||||
+ return 4;
|
||||
+ else if (!strcasecmp("Device Exp1", region_type_string))
|
||||
+ return 5;
|
||||
+ else if (!strcasecmp("Secondary BIOS", region_type_string))
|
||||
+ return 6;
|
||||
+ else if (!strcasecmp("Reserved", region_type_string))
|
||||
+ return 7;
|
||||
+ else if (!strcasecmp("EC", region_type_string))
|
||||
+ return 8;
|
||||
+ else if (!strcasecmp("Device Exp2", region_type_string))
|
||||
+ return 9;
|
||||
+ else if (!strcasecmp("IE", region_type_string))
|
||||
+ return 10;
|
||||
+ else if (!strcasecmp("10GbE_0", region_type_string))
|
||||
+ return 11;
|
||||
+ else if (!strcasecmp("10GbE_1", region_type_string))
|
||||
+ return 12;
|
||||
+ else if (!strcasecmp("PTT", region_type_string))
|
||||
+ return 15;
|
||||
+ return -1;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+nuke(const char *filename, char *image, int size, int region_type)
|
||||
+{
|
||||
+ int i;
|
||||
+ struct region region;
|
||||
+ const struct frba *frba = find_frba(image, size);
|
||||
+ if (!frba)
|
||||
+ exit(EXIT_FAILURE);
|
||||
+
|
||||
+ region = get_region(frba, region_type);
|
||||
+ if (region.size > 0) {
|
||||
+ for (i = region.base; i <= region.limit; i++) {
|
||||
+ if ((i + 1) > (size))
|
||||
+ break;
|
||||
+ image[i] = 0xFF;
|
||||
+ }
|
||||
+ write_image(filename, image, size);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int opt, option_index = 0;
|
||||
@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
|
||||
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
|
||||
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
|
||||
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
|
||||
+ int mode_nuke = 0;
|
||||
int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
|
||||
char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
|
||||
char *new_filename = NULL;
|
||||
@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
|
||||
{"validate", 0, NULL, 't'},
|
||||
{"setpchstrap", 1, NULL, 'S'},
|
||||
{"newvalue", 1, NULL, 'V'},
|
||||
+ {"nuke", 1, NULL, 'N'},
|
||||
{0, 0, 0, 0}
|
||||
};
|
||||
|
||||
@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
|
||||
region_fname++;
|
||||
// Descriptor, BIOS, ME, GbE, Platform
|
||||
// valid type?
|
||||
- if (!strcasecmp("Descriptor", region_type_string))
|
||||
- region_type = 0;
|
||||
- else if (!strcasecmp("BIOS", region_type_string))
|
||||
- region_type = 1;
|
||||
- else if (!strcasecmp("ME", region_type_string))
|
||||
- region_type = 2;
|
||||
- else if (!strcasecmp("GbE", region_type_string))
|
||||
- region_type = 3;
|
||||
- else if (!strcasecmp("Platform Data", region_type_string))
|
||||
- region_type = 4;
|
||||
- else if (!strcasecmp("Device Exp1", region_type_string))
|
||||
- region_type = 5;
|
||||
- else if (!strcasecmp("Secondary BIOS", region_type_string))
|
||||
- region_type = 6;
|
||||
- else if (!strcasecmp("Reserved", region_type_string))
|
||||
- region_type = 7;
|
||||
- else if (!strcasecmp("EC", region_type_string))
|
||||
- region_type = 8;
|
||||
- else if (!strcasecmp("Device Exp2", region_type_string))
|
||||
- region_type = 9;
|
||||
- else if (!strcasecmp("IE", region_type_string))
|
||||
- region_type = 10;
|
||||
- else if (!strcasecmp("10GbE_0", region_type_string))
|
||||
- region_type = 11;
|
||||
- else if (!strcasecmp("10GbE_1", region_type_string))
|
||||
- region_type = 12;
|
||||
- else if (!strcasecmp("PTT", region_type_string))
|
||||
- region_type = 15;
|
||||
- if (region_type == -1) {
|
||||
+ if ((region_type =
|
||||
+ get_region_type_string(region_type_string)) == -1) {
|
||||
fprintf(stderr, "No such region type: '%s'\n\n",
|
||||
region_type_string);
|
||||
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
|
||||
@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
|
||||
case 't':
|
||||
mode_validate = 1;
|
||||
break;
|
||||
+ case 'N':
|
||||
+ region_type_string = strdup(optarg);
|
||||
+ if (!region_type_string) {
|
||||
+ fprintf(stderr, "No region specified\n");
|
||||
+ print_usage(argv[0]);
|
||||
+ exit(EXIT_FAILURE);
|
||||
+ }
|
||||
+ if ((region_type =
|
||||
+ get_region_type_string(region_type_string)) == -1) {
|
||||
+ fprintf(stderr, "No such region type: '%s'\n\n",
|
||||
+ region_type_string);
|
||||
+ print_usage(argv[0]);
|
||||
+ exit(EXIT_FAILURE);
|
||||
+ }
|
||||
+ mode_nuke = 1;
|
||||
+ break;
|
||||
case 'v':
|
||||
print_version();
|
||||
exit(EXIT_SUCCESS);
|
||||
@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
|
||||
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
|
||||
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
|
||||
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
|
||||
- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
|
||||
+ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
|
||||
+ mode_nuke) > 1) {
|
||||
fprintf(stderr, "You may not specify more than one mode.\n\n");
|
||||
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
|
||||
exit(EXIT_FAILURE);
|
||||
@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
|
||||
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
|
||||
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
|
||||
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
|
||||
- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
|
||||
+ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
|
||||
+ mode_nuke) == 0) {
|
||||
fprintf(stderr, "You need to specify a mode.\n\n");
|
||||
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
|
||||
exit(EXIT_FAILURE);
|
||||
@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
|
||||
write_image(new_filename, image, size);
|
||||
}
|
||||
|
||||
+ if (mode_nuke) {
|
||||
+ nuke(new_filename, image, size, region_type);
|
||||
+ }
|
||||
+
|
||||
if (mode_altmedisable) {
|
||||
struct fpsba *fpsba = find_fpsba(image, size);
|
||||
struct fmsba *fmsba = find_fmsba(image, size);
|
||||
--
|
||||
2.39.5
|
||||
|
||||
-39
@@ -1,39 +0,0 @@
|
||||
From 8230acfb9e1f692202b306ffb10fe89f783ab4e8 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Fri, 12 May 2023 19:55:15 -0600
|
||||
Subject: [PATCH 06/11] Remove warning for coreboot images built without a
|
||||
payload
|
||||
|
||||
I added this in upstream to prevent people from accidentally flashing
|
||||
roms without a payload resulting in a no boot situation, but in
|
||||
libreboot lbmk handles the payload and thus this warning always comes
|
||||
up. This has caused confusion and concern so just patch it out.
|
||||
---
|
||||
payloads/Makefile.mk | 13 +------------
|
||||
1 file changed, 1 insertion(+), 12 deletions(-)
|
||||
|
||||
diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
|
||||
index 5f988dac1b..516133880f 100644
|
||||
--- a/payloads/Makefile.mk
|
||||
+++ b/payloads/Makefile.mk
|
||||
@@ -50,16 +50,5 @@ distclean-payloads:
|
||||
print-repo-info-payloads:
|
||||
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
|
||||
|
||||
-ifeq ($(CONFIG_PAYLOAD_NONE),y)
|
||||
-show_notices:: warn_no_payload
|
||||
-endif
|
||||
-
|
||||
-warn_no_payload:
|
||||
- printf "\n\t** WARNING **\n"
|
||||
- printf "coreboot has been built without a payload. Writing\n"
|
||||
- printf "a coreboot image without a payload to your board's\n"
|
||||
- printf "flash chip will result in a non-booting system. You\n"
|
||||
- printf "can use cbfstool to add a payload to the image.\n\n"
|
||||
-
|
||||
.PHONY: force-payload coreinfo nvramcui
|
||||
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
|
||||
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,32 +0,0 @@
|
||||
From 916c7b027faba625b922e74e45e50f9ceab64a64 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 6 Jan 2025 01:16:01 +0000
|
||||
Subject: [PATCH 1/1] ec/dasharo: Comment EC_DASHARO_EC_FLASH_SIZE
|
||||
|
||||
We don't use anything dasharo in Libreboot.
|
||||
|
||||
This patch prevents the following config item appearing
|
||||
in T480 and 3050 Micro configs:
|
||||
|
||||
CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000
|
||||
|
||||
Otherwise, make-oldconfig adds it automatically.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/ec/dasharo/ec/Kconfig | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/ec/dasharo/ec/Kconfig b/src/ec/dasharo/ec/Kconfig
|
||||
index 901d3ce514..071e37f95e 100644
|
||||
--- a/src/ec/dasharo/ec/Kconfig
|
||||
+++ b/src/ec/dasharo/ec/Kconfig
|
||||
@@ -28,4 +28,4 @@ config EC_DASHARO_EC_UPDATE_FILE
|
||||
|
||||
config EC_DASHARO_EC_FLASH_SIZE
|
||||
hex
|
||||
- default 0x20000
|
||||
+ # default 0x20000
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,4 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="next"
|
||||
rev="2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a"
|
||||
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
CONFIG_BOARD_LENOVO_R400=y
|
||||
|
||||
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
CONFIG_BOARD_LENOVO_R400=y
|
||||
|
||||
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
CONFIG_BOARD_LENOVO_R400=y
|
||||
|
||||
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
CONFIG_BOARD_LENOVO_R400=y
|
||||
|
||||
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
CONFIG_BOARD_LENOVO_R400=y
|
||||
|
||||
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
CONFIG_BOARD_LENOVO_R400=y
|
||||
|
||||
@@ -184,6 +184,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
|
||||
@@ -182,6 +182,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
|
||||
@@ -158,6 +158,8 @@ CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
|
||||
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
CONFIG_BOARD_LENOVO_T400=y
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
|
||||
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
CONFIG_BOARD_LENOVO_T400=y
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user