Merge branch 'master' into 25.06_branch

Revert "inject.sh: simplify remktar()"
This reverts commit 28f03d39cb. The commit that this reverts, broke building release roms. Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-07-11 14:02:52 +02:00 · 2025-05-27 21:49:01 +01:00 · 2025-05-27 21:44:45 +01:00 · 2025-05-27 14:32:34 +01:00 · 2025-05-27 14:31:57 +01:00 · 2025-05-27 13:49:13 +01:00
653 changed files with 5235 additions and 36609 deletions
@@ -44,4 +44,3 @@
 /r
 /e
 /xbmkpath/
-/xbmkwd/
@@ -213,7 +213,6 @@ CONFIG_BOARD_INTEL_D510MO=y
 # Ptlrvp
 #
 # CONFIG_BOARD_INTEL_PTLRVP is not set
-# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -272,7 +271,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -319,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -374,6 +373,7 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
 # Embedded Controllers
 #
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -450,8 +450,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -213,7 +213,6 @@ CONFIG_BOARD_INTEL_D510MO=y
 # Ptlrvp
 #
 # CONFIG_BOARD_INTEL_PTLRVP is not set
-# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -272,7 +271,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -319,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -374,6 +373,7 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
 # Embedded Controllers
 #
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -450,8 +450,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -214,7 +214,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # Ptlrvp
 #
 # CONFIG_BOARD_INTEL_PTLRVP is not set
-# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -271,7 +270,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -318,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -373,6 +372,7 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
 # Embedded Controllers
 #
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -445,8 +445,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -214,7 +214,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # Ptlrvp
 #
 # CONFIG_BOARD_INTEL_PTLRVP is not set
-# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -271,7 +270,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -318,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -373,6 +372,7 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
 # Embedded Controllers
 #
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -445,8 +445,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -1,4 +1,5 @@
 3rdparty/fsp/EagleStreamFspBinPkg
+3rdparty/fsp/AlderLakeFspBinPkg
 3rdparty/fsp/MeteorLakeFspBinPkg
 3rdparty/fsp/IceLakeFspBinPkg
 3rdparty/fsp/AmberLakeFspBinPkg
@@ -1,7 +1,7 @@
-From 7436b357fbe12233f3fbc5d360f296e6e15d3c2d Mon Sep 17 00:00:00 2001
+From bd959c38f6ee21db1ff8f4fbb0675e38bfbe1147 Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 01/40] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 01/37] add c3 and clockgen to apple/macbook21

 ---
 src/mainboard/apple/macbook21/Kconfig       |  1 +
@@ -64,5 +64,5 @@ index fd86e939b9..263fbabcd1 100644
 	end
 end
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 7d2e54028f5558f0ccea5ecd8f5f812e28597a47 Mon Sep 17 00:00:00 2001
+From e5eab4c8043b89a325b4a28bf7da456d68475144 Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 02/40] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 02/37] lenovo/t400: Enable all SATA ports

 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -15,7 +15,7 @@ This patch unmasked all SATA ports found within t400s with factory firmware.
 1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
-index 9e056772e9..9361f330d2 100644
+index 259c3e1b21..3d007533a4 100644
 --- a/src/mainboard/lenovo/t400/devicetree.cb
 +++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
@@ -30,5 +30,5 @@ index 9e056772e9..9361f330d2 100644
 			register "sata_traffic_monitor"		= "0"
 
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 61051fbf9f1da48932930b512527626d1cf5bfbd Mon Sep 17 00:00:00 2001
+From fd398cc10600cccce3dd4931651a5294ffebde9a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 03/40] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 03/37] lenovo/x230: set me_state=Disabled in cmos.default

 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
@@ -33,5 +33,5 @@ index 732e214b32..8454f0eac0 100644
 -me_state=Normal
 +me_state=Disabled
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From be0124d69fef77370eff57cfdfb2d6eae4b0cec3 Mon Sep 17 00:00:00 2001
+From 74230d8123cb7c31afd084658720084b1a5ac5d9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 04/40] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 04/37] set me_state=Disabled on all cmos.default files!

 yeah. why the hell isn't this the default

@@ -120,5 +120,5 @@ index d61046df6b..8c793fd1c3 100644
 -me_state=Enable
 +me_state=Disabled
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From d97018fc490daf106582b0b7885a497cc2daba5a Mon Sep 17 00:00:00 2001
+From f592ac32892d7f99fa2e68504bb147e5d06184ca Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 05/40] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 05/37] util/ifdtool: add --nuke flag (all 0xFF on region)

 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -201,5 +201,5 @@ index b21a89c0e1..fc91d4c239 100644
 		struct fpsba *fpsba = find_fpsba(image, size);
 		struct fmsba *fmsba = find_fmsba(image, size);
 -- 
-2.47.3
+2.39.5

@@ -1,20 +1,20 @@
-From 1acdf1d0ff0c7a7ab5f2a0d7e5b57e21bdfaa1ae Mon Sep 17 00:00:00 2001
+From 18069af7c0c6beedfadb615cca9127e82a0d8007 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 06/40] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 06/37] mb/dell/e6400: Enable 01.0 device in devicetree for
 dGPU models

 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 ---
- src/mainboard/dell/gm45_latitude/devicetree.cb | 2 +-
+ src/mainboard/dell/e6400/devicetree.cb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-diff --git a/src/mainboard/dell/gm45_latitude/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
-index 5919803be2..76dae87153 100644
--- a/src/mainboard/dell/gm45_latitude/devicetree.cb
-+++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
-@@ -18,7 +18,7 @@ chip northbridge/intel/gm45
+diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
+index bb954cbd7b..e9f3915d17 100644
+--- a/src/mainboard/dell/e6400/devicetree.cb
+++ b/src/mainboard/dell/e6400/devicetree.cb
+@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
 		ops gm45_pci_domain_ops
 
 		device pci 00.0 on end # host bridge
@@ -24,5 +24,5 @@ index 5919803be2..76dae87153 100644
 		device pci 02.1 on end # Display
 		device pci 03.0 on end # ME
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From aab9296997bd88a86bbb40079a9caf504db81cea Mon Sep 17 00:00:00 2001
+From 9563c107a4b40e66b610d7205a21590c7c181c78 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 07/40] Remove warning for coreboot images built without a
+Subject: [PATCH 07/37] Remove warning for coreboot images built without a
 payload

 I added this in upstream to prevent people from accidentally flashing
@@ -35,5 +35,5 @@ index 5f988dac1b..516133880f 100644
 -.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
 +.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 319a77d9eeaaf1e344a380b1b449e6a56b3dc92c Mon Sep 17 00:00:00 2001
+From 7f650a19d30fe6157b150c5248d6086007323d72 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 08/40] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 08/37] HACK: Disable coreboot related BL31 features

 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
@@ -24,5 +24,5 @@ index f54c6d22fc..b075abfd42 100644
 BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
 
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From d9066d7f51d5742ae8ed1c7ab096ee857358cc48 Mon Sep 17 00:00:00 2001
+From 3f6f65ed6a435fe49534c8a0b5cb98c3eac71150 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 09/40] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 09/37] dell/e6430: use ME Soft Temporary Disable

 i overlooked this. it's set on other boards.

@@ -26,5 +26,5 @@ index 2a5b30f2b7..279415dfd1 100644
 -me_state=Normal
 +me_state=Disabled
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 922357b7d5b0b5304b0d4296b2f03961a17288a6 Mon Sep 17 00:00:00 2001
+From b4d48233a8d829d7285501f662d999aad898be21 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 10/40] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 10/37] mb/hp: Add Compaq Elite 8300 CMT port

 Based on autoport and Z220 SuperIO code.

@@ -868,5 +868,5 @@ index 0000000000..8dbd95ef96
 +	.enable_dev = mainboard_enable,
 +};
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 41256272a7637426c9e68fd633ceb1c108f183c9 Mon Sep 17 00:00:00 2001
+From a16ff494adb1f706d402a2e167d0d53c775d0897 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 11/40] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 11/37] nb/intel/haswell: make IOMMU a runtime option

 When I tested graphics cards on a coreboot port for Dell
 OptiPlex 9020 SFF, I could not use a graphics card unless
@@ -288,5 +288,5 @@ index e47deb5da6..1a7e0b1076 100644
 	if (capid0_a & VTD_DISABLE)
 		return;
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From b243452bf1ed7c9aee1e6685091e98f52d7229c7 Mon Sep 17 00:00:00 2001
+From 4b0536ce7cd55eedc52d13497bea59d91e8924d8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 12/40] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 12/37] dell/optiplex_9020: Disable IOMMU by default

 Needed to make graphics cards work. Turning it on is
 recommended if only using iGPU, otherwise leave it off
@@ -25,5 +25,5 @@ index 8000eea8c0..0700f971ee 100644
 -iommu=Enable
 +iommu=Disable
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 215661dbe631c21a2533cc93bdd1e9f82aa9601e Mon Sep 17 00:00:00 2001
+From c8329f84b2d06581dcbeecedc38b7c4715a9cba7 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 13/40] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 13/37] nb/haswell: Fully disable iGPU when dGPU is used

 My earlier patch disabled decode *and* disabled the iGPU itself, but
 a subsequent revision disabled only VGA decode. Upon revisiting, I
@@ -47,5 +47,5 @@ index f7fad3183d..1b188e92e1 100644
 
 static struct device_operations gma_func0_ops = {
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From aadef041f002b9f0504fcc67df39654680d67bdd Mon Sep 17 00:00:00 2001
+From 73dbf291631fdbae2d8e8a761c147523c8d9e65c Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH 14/40] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 14/37] ec/dell/mec5035: Add S3 suspend SMI handler

 This is necessary for S3 resume to work on SNB and newer Dell Latitude
 laptops. If a command isn't sent, the EC cuts power to the DIMMs,
@@ -143,5 +143,5 @@ index 0000000000..958733bf97
 +	}
 +}
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 4a24221fc735117e521cbd7e08d71b6e6a061517 Mon Sep 17 00:00:00 2001
+From a507fe609a2e99c95218ec430916eaf4c3cb61d9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 15/40] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 15/37] nb/haswell: lock policy regs when disabling IOMMU

 Angel Pons told me I should do it. See comments here:
 https://review.coreboot.org/c/coreboot/+/81016
@@ -51,5 +51,5 @@ index 1a7e0b1076..e9506ee830 100644
 	/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
 	u32 reg32;
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 20921eb7165b23e7b78e4c4126ff5bab8725404b Mon Sep 17 00:00:00 2001
+From 9e0a6aa376db81f9409eda92b6783a8262c1fedb Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 16/40] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 16/37] nb/intel/gm45: Make DDR2 raminit work

 List of changes:
 - Update some timing and ODT values
@@ -219,5 +219,5 @@ index aef863f05a..b74765fd9c 100644
 +	mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
 }
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From b5fe5366a03f934df87c5537b12f006ccee0d695 Mon Sep 17 00:00:00 2001
+From 6acc310c1d695d47c148296da9da189de21d58be Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 6 Aug 2024 00:50:24 +0100
-Subject: [PATCH 17/40] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+Subject: [PATCH 17/37] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards

 We add this patch:

@@ -236,5 +236,5 @@ index b74765fd9c..5d4505e063 100644
 +	}
 }
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From c075c12d5549cc6cfaa4fbb6bb3abd5e17503b04 Mon Sep 17 00:00:00 2001
+From 7461210ecc7c8e41f3f941bd5ce7943e5f66c711 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
-Subject: [PATCH 18/40] mb/dell/e6400: Use 100 MHz reference clock for display
+Subject: [PATCH 18/37] mb/dell/e6400: Use 100 MHz reference clock for display

 The E6400 uses a 100 MHz reference clock for spread spectrum support on
 LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
@@ -14,23 +14,24 @@ display in the pre-OS graphics environment provided by libgfxinit.

 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 ---
- src/mainboard/dell/gm45_latitude/Kconfig | 2 ++
- src/northbridge/intel/gm45/Kconfig       | 4 ++++
- 2 files changed, 6 insertions(+)
+ src/mainboard/dell/e6400/Kconfig   | 3 +++
+ src/northbridge/intel/gm45/Kconfig | 4 ++++
+ 2 files changed, 7 insertions(+)

-diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
-index 98ad18849c..4b026be2ba 100644
--- a/src/mainboard/dell/gm45_latitude/Kconfig
-+++ b/src/mainboard/dell/gm45_latitude/Kconfig
-@@ -21,6 +21,8 @@ config BOARD_DELL_E6400
- 	select BOARD_DELL_GM45_LATITUDE_COMMON
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
+index 417d95fd5d..6fe1b1c456 100644
+--- a/src/mainboard/dell/e6400/Kconfig
+++ b/src/mainboard/dell/e6400/Kconfig
+@@ -19,6 +19,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select EC_DELL_MEC5035
 
- if BOARD_DELL_GM45_LATITUDE_COMMON
 +config INTEL_GMA_DPLL_REF_FREQ
 +	default 100000000
- 
+
 config MAINBOARD_DIR
- 	default "dell/gm45_latitude"
+ 	default "dell/e6400"
+ 
 diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
 index fef0d735b3..fc5df8b11a 100644
 --- a/src/northbridge/intel/gm45/Kconfig
@@ -47,5 +48,5 @@ index fef0d735b3..fc5df8b11a 100644
 	select VBOOT_STARTS_IN_BOOTBLOCK
 
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 5833266cabd5dd38596b20d3353eb7b105ffd235 Mon Sep 17 00:00:00 2001
+From a683dffd774dbbe25cc77c0f7d3853232c17c2bf Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Mon, 12 Aug 2024 02:15:24 +0100
-Subject: [PATCH 19/40] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+Subject: [PATCH 19/37] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ

 set it to 96MHz. fixes the following build error when
 building for x4x boards e.g. gigabyte ga-g41m-es2l:
@@ -48,5 +48,5 @@ index 097e11126c..6430319f6a 100644
 	default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
 
 -- 
-2.47.3
+2.39.5

@@ -0,0 +1,243 @@
+From a48ba23bb4a24730fa49b5a10b56c9de873dea8a Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Sep 2024 19:48:26 -0600
+Subject: [PATCH 20/37] mb/dell: Convert E6400 into a variant
+
+All the GM45 Dell Latitudes should be nearly identical, so convert the
+E6400 port into a variant so that future ports for the other systems can
+share code with each other.
+
+Change-Id: I8094fce56eaaadb20aef173644cd3b2c0b008e95
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/Makefile.mk          |  10 --------
+ .../dell/{e6400 => gm45_latitude}/Kconfig     |  22 +++++++++++++-----
+ .../{e6400 => gm45_latitude}/Kconfig.name     |   0
+ src/mainboard/dell/gm45_latitude/Makefile.mk  |  11 +++++++++
+ .../dell/{e6400 => gm45_latitude}/acpi/ec.asl |   0
+ .../acpi/ich9_pci_irqs.asl                    |   0
+ .../{e6400 => gm45_latitude}/acpi/superio.asl |   0
+ .../dell/{e6400 => gm45_latitude}/blc.c       |   0
+ .../{e6400 => gm45_latitude}/board_info.txt   |   0
+ .../dell/{e6400 => gm45_latitude}/bootblock.c |   0
+ .../{e6400 => gm45_latitude}/cmos.default     |   0
+ .../dell/{e6400 => gm45_latitude}/cmos.layout |   0
+ .../dell/{e6400 => gm45_latitude}/cstates.c   |   0
+ .../{e6400 => gm45_latitude}/devicetree.cb    |   1 -
+ .../dell/{e6400 => gm45_latitude}/dsdt.asl    |   0
+ .../dell/{e6400 => gm45_latitude}/mainboard.c |   0
+ .../dell/{e6400 => gm45_latitude}/romstage.c  |   0
+ .../variants}/e6400/data.vbt                  | Bin
+ .../variants}/e6400/gma-mainboard.ads         |   0
+ .../{ => gm45_latitude/variants}/e6400/gpio.c |   0
+ .../variants}/e6400/hda_verb.c                |   0
+ .../variants/e6400/overridetree.cb            |   7 ++++++
+ 22 files changed, 34 insertions(+), 17 deletions(-)
+ delete mode 100644 src/mainboard/dell/e6400/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig (64%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig.name (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ec.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ich9_pci_irqs.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/superio.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/blc.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/board_info.txt (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/bootblock.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.default (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.layout (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cstates.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/devicetree.cb (98%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/dsdt.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/mainboard.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/romstage.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/data.vbt (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gma-mainboard.ads (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gpio.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/hda_verb.c (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+
+diff --git a/src/mainboard/dell/e6400/Makefile.mk b/src/mainboard/dell/e6400/Makefile.mk
+deleted file mode 100644
+index ca3a82db48..0000000000
+--- a/src/mainboard/dell/e6400/Makefile.mk
+++ /dev/null
+@@ -1,10 +0,0 @@
+-## SPDX-License-Identifier: GPL-2.0-only
+-
+-bootblock-y += bootblock.c
+-
+-romstage-y += gpio.c
+-
+-ramstage-y += cstates.c
+-ramstage-y += blc.c
+-
+-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
+similarity index 64%
+rename from src/mainboard/dell/e6400/Kconfig
+rename to src/mainboard/dell/gm45_latitude/Kconfig
+index 6fe1b1c456..ba76fb6e8c 100644
+--- a/src/mainboard/dell/e6400/Kconfig
+++ b/src/mainboard/dell/gm45_latitude/Kconfig
+@@ -1,9 +1,7 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
+-if BOARD_DELL_E6400
+-
+-config BOARD_SPECIFIC_OPTIONS
+-	def_bool y
+config BOARD_DELL_GM45_LATITUDE_COMMON
+	def_bool n
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select CPU_INTEL_SOCKET_P
+ 	select NORTHBRIDGE_INTEL_GM45
+@@ -19,19 +17,31 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select EC_DELL_MEC5035
+ 
+
+config BOARD_DELL_E6400
+	select BOARD_DELL_GM45_LATITUDE_COMMON
+
+if BOARD_DELL_GM45_LATITUDE_COMMON
+
+ config INTEL_GMA_DPLL_REF_FREQ
+ 	default 100000000
+ 
+ config MAINBOARD_DIR
+-	default "dell/e6400"
+	default "dell/gm45_latitude"
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6400" if BOARD_DELL_E6400
+ 
+config OVERRIDE_DEVICETREE
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+config VARIANT_DIR
+	default "e6400" if BOARD_DELL_E6400
+
+ config USBDEBUG_HCD_INDEX
+ 	default 1
+ 
+ config CBFS_SIZE
+ 	default 0x1A0000
+ 
+-endif # BOARD_DELL_E6400
+endif # BOARD_DELL_GM45_LATITUDE_COMMON
+diff --git a/src/mainboard/dell/e6400/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
+similarity index 100%
+rename from src/mainboard/dell/e6400/Kconfig.name
+rename to src/mainboard/dell/gm45_latitude/Kconfig.name
+diff --git a/src/mainboard/dell/gm45_latitude/Makefile.mk b/src/mainboard/dell/gm45_latitude/Makefile.mk
+new file mode 100644
+index 0000000000..5295d5be22
+--- /dev/null
+++ b/src/mainboard/dell/gm45_latitude/Makefile.mk
+@@ -0,0 +1,11 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-y += bootblock.c
+
+romstage-y += variants/$(VARIANT_DIR)/gpio.c
+
+ramstage-y += cstates.c
+ramstage-y += blc.c
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/acpi/ec.asl b/src/mainboard/dell/gm45_latitude/acpi/ec.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ec.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ec.asl
+diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+diff --git a/src/mainboard/dell/e6400/acpi/superio.asl b/src/mainboard/dell/gm45_latitude/acpi/superio.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/superio.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/superio.asl
+diff --git a/src/mainboard/dell/e6400/blc.c b/src/mainboard/dell/gm45_latitude/blc.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/blc.c
+rename to src/mainboard/dell/gm45_latitude/blc.c
+diff --git a/src/mainboard/dell/e6400/board_info.txt b/src/mainboard/dell/gm45_latitude/board_info.txt
+similarity index 100%
+rename from src/mainboard/dell/e6400/board_info.txt
+rename to src/mainboard/dell/gm45_latitude/board_info.txt
+diff --git a/src/mainboard/dell/e6400/bootblock.c b/src/mainboard/dell/gm45_latitude/bootblock.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/bootblock.c
+rename to src/mainboard/dell/gm45_latitude/bootblock.c
+diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/gm45_latitude/cmos.default
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.default
+rename to src/mainboard/dell/gm45_latitude/cmos.default
+diff --git a/src/mainboard/dell/e6400/cmos.layout b/src/mainboard/dell/gm45_latitude/cmos.layout
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.layout
+rename to src/mainboard/dell/gm45_latitude/cmos.layout
+diff --git a/src/mainboard/dell/e6400/cstates.c b/src/mainboard/dell/gm45_latitude/cstates.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/cstates.c
+rename to src/mainboard/dell/gm45_latitude/cstates.c
+diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
+similarity index 98%
+rename from src/mainboard/dell/e6400/devicetree.cb
+rename to src/mainboard/dell/gm45_latitude/devicetree.cb
+index e9f3915d17..76dae87153 100644
+--- a/src/mainboard/dell/e6400/devicetree.cb
+++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
+@@ -15,7 +15,6 @@ chip northbridge/intel/gm45
+ 	register "pci_mmio_size" = "2048"
+ 
+ 	device domain 0 on
+-		subsystemid 0x1028 0x0233 inherit
+ 		ops gm45_pci_domain_ops
+ 
+ 		device pci 00.0 on end # host bridge
+diff --git a/src/mainboard/dell/e6400/dsdt.asl b/src/mainboard/dell/gm45_latitude/dsdt.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/dsdt.asl
+rename to src/mainboard/dell/gm45_latitude/dsdt.asl
+diff --git a/src/mainboard/dell/e6400/mainboard.c b/src/mainboard/dell/gm45_latitude/mainboard.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/mainboard.c
+rename to src/mainboard/dell/gm45_latitude/mainboard.c
+diff --git a/src/mainboard/dell/e6400/romstage.c b/src/mainboard/dell/gm45_latitude/romstage.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/romstage.c
+rename to src/mainboard/dell/gm45_latitude/romstage.c
+diff --git a/src/mainboard/dell/e6400/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+similarity index 100%
+rename from src/mainboard/dell/e6400/data.vbt
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+diff --git a/src/mainboard/dell/e6400/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+similarity index 100%
+rename from src/mainboard/dell/e6400/gma-mainboard.ads
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/gpio.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+diff --git a/src/mainboard/dell/e6400/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/hda_verb.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+new file mode 100644
+index 0000000000..acc34a2252
+--- /dev/null
+++ b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+@@ -0,0 +1,7 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/gm45
+	device domain 0 on
+		subsystemid 0x1028 0x0233 inherit
+	end
+end
+-- 
+2.39.5
+
@@ -1,7 +1,7 @@
-From 75620139fe2bd6898d51dd7bd02e1031369feeec Mon Sep 17 00:00:00 2001
+From b87e6774f0407ea48610c83ea54ab6a4b4a78a24 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:51:25 -0600
-Subject: [PATCH 20/40] mb/dell/gm45_latitudes: Add E4300 variant
+Subject: [PATCH 21/37] mb/dell/gm45_latitudes: Add E4300 variant

 Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -21,10 +21,10 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb

 diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
-index 4b026be2ba..9f0f56e304 100644
+index ba76fb6e8c..144f9bcdf0 100644
 --- a/src/mainboard/dell/gm45_latitude/Kconfig
 +++ b/src/mainboard/dell/gm45_latitude/Kconfig
-@@ -20,6 +20,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON
+@@ -21,6 +21,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON
 config BOARD_DELL_E6400
 	select BOARD_DELL_GM45_LATITUDE_COMMON
 
@@ -32,9 +32,9 @@ index 4b026be2ba..9f0f56e304 100644
 +	select BOARD_DELL_GM45_LATITUDE_COMMON
 +
 if BOARD_DELL_GM45_LATITUDE_COMMON
+ 
 config INTEL_GMA_DPLL_REF_FREQ
- 	default 100000000
-@@ -29,12 +32,14 @@ config MAINBOARD_DIR
+@@ -31,12 +34,14 @@ config MAINBOARD_DIR
 
 config MAINBOARD_PART_NUMBER
 	default "Latitude E6400" if BOARD_DELL_E6400
@@ -328,5 +328,5 @@ index 0000000000..20dfa245fb
 +	end
 +end
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 26862554523e08ea1d1cd18cfd09e3434b12e2a3 Mon Sep 17 00:00:00 2001
+From 0bc9ca409793836dcdb386db97b7a9464d92a973 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH 21/40] mb/dell: Add S3 SMI handler for Dell Latitudes
+Subject: [PATCH 22/37] mb/dell: Add S3 SMI handler for Dell Latitudes

 Integrate the previously added mec5035_smi_sleep() function into
 mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
@@ -12,19 +12,19 @@ the power LED while in S3. Without it, all LEDs turn off during S3.
 Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 ---
+ src/mainboard/dell/e7240/smihandler.c            | 9 +++++++++
 src/mainboard/dell/gm45_latitude/smihandler.c    | 9 +++++++++
- src/mainboard/dell/haswell_latitude/smihandler.c | 9 +++++++++
 src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
 3 files changed, 27 insertions(+)
+ create mode 100644 src/mainboard/dell/e7240/smihandler.c
 create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c
- create mode 100644 src/mainboard/dell/haswell_latitude/smihandler.c
 create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c

-diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
+diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c
 new file mode 100644
 index 0000000000..00e55b51db
 --- /dev/null
-+++ b/src/mainboard/dell/gm45_latitude/smihandler.c
+++ b/src/mainboard/dell/e7240/smihandler.c
@@ -0,0 +1,9 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
@@ -35,11 +35,11 @@ index 0000000000..00e55b51db
 +{
 +	mec5035_smi_sleep(slp_typ);
 +}
-diff --git a/src/mainboard/dell/haswell_latitude/smihandler.c b/src/mainboard/dell/haswell_latitude/smihandler.c
+diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
 new file mode 100644
 index 0000000000..00e55b51db
 --- /dev/null
-+++ b/src/mainboard/dell/haswell_latitude/smihandler.c
+++ b/src/mainboard/dell/gm45_latitude/smihandler.c
@@ -0,0 +1,9 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
@@ -66,5 +66,5 @@ index 0000000000..00e55b51db
 +	mec5035_smi_sleep(slp_typ);
 +}
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 849f0aba544d135e2028092862e5f030813c868e Mon Sep 17 00:00:00 2001
+From d91dc168d6b8eca5e78aef9e48571d6edb156d45 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Tue, 18 Jun 2024 21:31:08 -0600
-Subject: [PATCH 22/40] ec/dell/mec5035: Route power button event to host
+Subject: [PATCH 23/37] ec/dell/mec5035: Route power button event to host

 If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
 power button results in the EC powering off the system without letting
@@ -88,5 +88,5 @@ index 8d4fded28b..51422598c4 100644
 void mec5035_sleep_enable(void);
 
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 89ecd79ab46f56c65c0b5720d1c84b12698a02b4 Mon Sep 17 00:00:00 2001
+From b6bd33b0430f72c2fce16a3b1e41927ef540923b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 31 Dec 2024 14:42:24 +0000
-Subject: [PATCH 23/40] Disable compression on refcode insertion
+Subject: [PATCH 24/37] Disable compression on refcode insertion

 Compression is not reliably reproducible. In an lbmk release
 context, this means we cannot rely on vendorfile insertion.
@@ -14,7 +14,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/Makefile.mk b/Makefile.mk
-index 218e388bb5..a2163c4644 100644
+index 3969bfbd05..15346569f8 100644
 --- a/Makefile.mk
 +++ b/Makefile.mk
@@ -1392,7 +1392,7 @@ endif
@@ -27,5 +27,5 @@ index 218e388bb5..a2163c4644 100644
 cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin
 vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE)
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From df60dac9dbaf0c71008dbead7dc1a8c8881c5e33 Mon Sep 17 00:00:00 2001
+From fc4c65f3bb807b9fc766745a70f92729b0b8d99e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 21 Apr 2025 02:58:47 +0100
-Subject: [PATCH 24/40] nb/intel/*: Disable stack overflow debug options
+Subject: [PATCH 25/37] nb/intel/*: Disable stack overflow debug options

 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -183,5 +183,5 @@ index 6430319f6a..1803ef5733 100644
 +
 endif
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 819fe0e89e426d3d875cf8ab4d2de439ba716848 Mon Sep 17 00:00:00 2001
+From 14002b2575d73d3edbc72584502a463e6802cba6 Mon Sep 17 00:00:00 2001
 From: Felix Singer <felixsinger@posteo.net>
 Date: Wed, 26 Jun 2024 04:24:31 +0200
-Subject: [PATCH 30/40] soc/intel/skylake: configure usb acpi
+Subject: [PATCH 26/37] soc/intel/skylake: configure usb acpi

 Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
 Signed-off-by: Felix Singer <felixsinger@posteo.net>
@@ -90,5 +90,5 @@ index 6538a1475b..dfb81d496e 100644
 		device pci 14.2 alias thermal      off                     end
 		device pci 14.3 alias cio          off                     end
 -- 
-2.47.3
+2.39.5

@@ -0,0 +1,30 @@
+From 3bb65b7f2a02ecb93e15ae037da38ad8f812747b Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Fri, 22 Nov 2024 21:26:48 +0000
+Subject: [PATCH 27/37] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
+ bootblock
+
+Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
+---
+ src/soc/intel/skylake/bootblock/pch.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
+index df00bb85a9..beaece960b 100644
+--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
+@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void)
+ 
+ void pch_early_iorange_init(void)
+ {
+-	uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
+-			LPC_IOE_EC_62_66;
+	uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F |
+			LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66;
+ 
+ 	const config_t *config = config_of_soc();
+ 
+-- 
+2.39.5
+
@@ -1,7 +1,7 @@
-From c3af549f5b6431475f3d180eb3b3041d9bfc5d81 Mon Sep 17 00:00:00 2001
+From 75cc0ea09234064318046624845b0afc5afb0ce5 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 25/40] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 29/37] mb/dell: Add Optiplex 780 MT (x4x/ICH10)

 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -704,5 +704,5 @@ index 0000000000..555b1c1f5c
 +	end
 +end
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From bb14741af8e4a16d3d098d79fb8df0c3a45e6ccb Mon Sep 17 00:00:00 2001
+From 6725ec0bb976c61cbe87e61bf0e8b02e38d14de9 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 26/40] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 30/37] mb/dell/optiplex_780: Add USFF variant

 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -322,5 +322,5 @@ index 0000000000..555b1c1f5c
 +	end
 +end
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 17c67799604e0e29192415e97293d71deb457cb2 Mon Sep 17 00:00:00 2001
+From 4ffaddc37d30d39f25faeaef73046a6e2ce525e8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 11 Dec 2024 01:06:01 +0000
-Subject: [PATCH 29/40] dell/3050micro: disable nvme hotplug
+Subject: [PATCH 31/37] dell/3050micro: disable nvme hotplug

 in my testing, when running my 3050micro for a few days,
 the nvme would sometimes randomly rename.
@@ -30,10 +30,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 3 insertions(+), 1 deletion(-)

 diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
-index 0d2adff74a..829acacab3 100644
+index da11085ab6..2a97306c5d 100644
 --- a/src/mainboard/dell/optiplex_3050/devicetree.cb
 +++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
-@@ -44,7 +44,9 @@ chip soc/intel/skylake
+@@ -45,7 +45,9 @@ chip soc/intel/skylake
 			register "PcieRpAdvancedErrorReporting[20]"     = "1"
 			register "PcieRpLtrEnable[20]"                  = "true"
 			register "PcieRpClkSrcNumber[20]"               = "3"
@@ -45,5 +45,5 @@ index 0d2adff74a..829acacab3 100644
 
 		# Realtek LAN
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 25ff99ff021312387734a10836232a5f3a2d2a12 Mon Sep 17 00:00:00 2001
+From 5d8930edfa1d9537ba80e24c0cf8f0c9e4e9ec72 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 18 Dec 2024 02:06:18 +0000
-Subject: [PATCH 33/40] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
+Subject: [PATCH 32/37] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN

 This is used by lbmk to know where a tb.bin file goes,
 when extracting and padding TBT.bin from Lenovo ThunderBolt
@@ -74,5 +74,5 @@ index 2ffbaab85f..512b326381 100644
 +
 endif # VENDOR_LENOVO
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 81360b8c28293856e964934d1f356b1312b39ff2 Mon Sep 17 00:00:00 2001
+From 49cee334bc7fe9a78b9355b5256a37984bac385a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Thu, 26 Dec 2024 19:45:20 +0000
-Subject: [PATCH 32/40] soc/intel/skylake: Don't compress FSP-S
+Subject: [PATCH 33/37] soc/intel/skylake: Don't compress FSP-S

 Build systems like lbmk need to reproducibly insert
 certain vendor files on release images.
@@ -19,7 +19,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index 493a2d835a..42af82a5d8 100644
+index 9191ed0ff8..d51ffaef7b 100644
 --- a/src/soc/intel/skylake/Kconfig
 +++ b/src/soc/intel/skylake/Kconfig
@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
@@ -32,5 +32,5 @@ index 493a2d835a..42af82a5d8 100644
 	select GENERIC_GPIO_LIB
 	select HAVE_FSP_GOP
 -- 
-2.47.3
+2.39.5

@@ -0,0 +1,82 @@
+From 09740dc9d43a8dc24b7416b70476796515af6581 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 31 Dec 2024 01:40:42 +0000
+Subject: [PATCH 34/37] soc/intel/pmc: Hardcoded poweroff after power fail
+
+Coreboot can set the power state for power on after previous
+power failure, based on the option table. On the ThinkPad T480,
+we have no nvram and, due to coreboot's design, we therefore
+have no option table, so the default setting is enabled.
+
+In my testing, this seems to be that the system will turn on
+after a power failure. If your ThinkPad was previously in a state
+where it wouldn't turn on when plugging in the power, it'd be fine.
+
+If your battery ran out later on, this would be triggered and
+your ThinkPad would permanently turn on, when plugging in a charger,
+and there is currently no way to configure this behaviour.
+
+We currently only use the common SoC PMC code on the ThinkPad
+T480, T480s and the Dell OptiPlex 3050 Micro, at the time of
+this patch, and it is desirable that the system be set to power
+off after power fail anyway.
+
+In some cases, you might want the opposite, for example if you're
+running a server. This will be documented on the website, for that
+reason.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/soc/intel/common/block/pmc/pmclib.c | 36 +++----------------------
+ 1 file changed, 4 insertions(+), 32 deletions(-)
+
+diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
+index 64b9bb997c..7823775bcb 100644
+--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
+@@ -776,38 +776,10 @@ void pmc_clear_pmcon_sts(void)
+ 
+ void pmc_set_power_failure_state(const bool target_on)
+ {
+-	const unsigned int state = get_uint_option("power_on_after_fail",
+-					 CONFIG_MAINBOARD_POWER_FAILURE_STATE);
+-
+-	/*
+-	 * On the shutdown path (target_on == false), we only need to
+-	 * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For
+-	 * all other cases, we don't write the register to avoid clob-
+-	 * bering the value set on the boot path. This is necessary,
+-	 * for instance, when we can't access the option backend in SMM.
+-	 */
+-
+-	switch (state) {
+-	case MAINBOARD_POWER_STATE_OFF:
+-		if (!target_on)
+-			break;
+-		printk(BIOS_INFO, "Set power off after power failure.\n");
+-		pmc_soc_set_afterg3_en(false);
+-		break;
+-	case MAINBOARD_POWER_STATE_ON:
+-		if (!target_on)
+-			break;
+-		printk(BIOS_INFO, "Set power on after power failure.\n");
+-		pmc_soc_set_afterg3_en(true);
+-		break;
+-	case MAINBOARD_POWER_STATE_PREVIOUS:
+-		printk(BIOS_INFO, "Keep power state after power failure.\n");
+-		pmc_soc_set_afterg3_en(target_on);
+-		break;
+-	default:
+-		printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state);
+-		break;
+-	}
+	if (!target_on)
+		return;
+	printk(BIOS_INFO, "Set power off after power failure.\n");
+	pmc_soc_set_afterg3_en(false);
+ }
+ 
+ /* This function returns the highest assertion duration of the SLP_Sx assertion widths */
+-- 
+2.39.5
+
@@ -1,106 +0,0 @@
-From 0a98ff0cbd20484ced53b15f16f8b77d881ffb9e Mon Sep 17 00:00:00 2001
-From: Riku Viitanen <riku.viitanen@protonmail.com>
-Date: Thu, 25 Sep 2025 22:45:37 +0300
-Subject: [PATCH 35/40] mb/topton/adl: Add TWL variant (X2E_N150)
-
-Seems to be the same board but with a Twin Lake processor.
-VBT extracted from vendor firmware. This makes HDMI and
-DisplayPort work.
-
-Change-Id: I1018042802cbb8010888847226a2117fd9dfaeb0
-Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
- src/mainboard/topton/adl/Kconfig      |  12 +++++++++---
- src/mainboard/topton/adl/Kconfig.name |   3 +++
- src/mainboard/topton/adl/data_twl.vbt | Bin 0 -> 9216 bytes
- 3 files changed, 12 insertions(+), 3 deletions(-)
- create mode 100644 src/mainboard/topton/adl/data_twl.vbt
-
-diff --git a/src/mainboard/topton/adl/Kconfig b/src/mainboard/topton/adl/Kconfig
-index ffdfae1eee..331e1d624d 100644
--- a/src/mainboard/topton/adl/Kconfig
-+++ b/src/mainboard/topton/adl/Kconfig
-@@ -1,6 +1,6 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
-if BOARD_TOPTON_X2F_N100
-+if BOARD_TOPTON_X2F_N100 || BOARD_TOPTON_X2E_N150
- 
- config BOARD_SPECIFIC_OPTIONS
- 	def_bool y
-@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select SUPERIO_ITE_IT8625E
- 	select DRIVERS_UART_8250IO
- 	select SOC_INTEL_ALDERLAKE_PCH_N
-+	select SOC_INTEL_TWINLAKE if BOARD_TOPTON_X2E_N150
- 	select INTEL_GMA_HAVE_VBT
- 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
- 	select HAVE_INTEL_PTT
-@@ -20,7 +21,12 @@ config BOARD_SPECIFIC_OPTIONS
- config MAINBOARD_DIR
- 	default "topton/adl"
- 
-+config INTEL_GMA_VBT_FILE
-+	default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" if BOARD_TOPTON_X2F_N100
-+	default "src/mainboard/\$(MAINBOARDDIR)/data_twl.vbt" if BOARD_TOPTON_X2E_N150
-+
- config MAINBOARD_PART_NUMBER
-	default "X2F_N100"
-+	default "X2F_N100" if BOARD_TOPTON_X2F_N100
-+	default "X2E_N150" if BOARD_TOPTON_X2E_N150
- 
-endif # BOARD_TOPTON_X2F_N100
-+endif # BOARD_TOPTON_X2F_N100 || BOARD_TOPTON_X2E_N150
-diff --git a/src/mainboard/topton/adl/Kconfig.name b/src/mainboard/topton/adl/Kconfig.name
-index 5b8b5ff602..db0eef29be 100644
--- a/src/mainboard/topton/adl/Kconfig.name
-+++ b/src/mainboard/topton/adl/Kconfig.name
-@@ -2,3 +2,6 @@
- 
- config BOARD_TOPTON_X2F_N100
- 	bool "X2F_N100"
-+
-+config BOARD_TOPTON_X2E_N150
-+	bool "X2E_N150"
-diff --git a/src/mainboard/topton/adl/data_twl.vbt b/src/mainboard/topton/adl/data_twl.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..05fbd5807365b3343e55ecedbd12fabb8a3199e9
-GIT binary patch
-literal 9216
-zcmeHML2MgE6#cVnZ(QS$EeWj~+AvA0;DjbwJ8eiKOI^oKsN1BmoiuVKP~6mpM!1bh
-zQ<Ng4E+U6qkoHnYD<ljO5(<}a;EYcw2q9TTAPykqMyWV})EjNgpV_rtrwuVJg{InX
-z{oV2WH*f#{GdnZ8yKlUIj0T261F@mNv4M^VMM;7J%`Is>-Yxy%k<p1zU@S1vKQt0N
-zMuF^r-<#KN03-?7<?<?uH+*h3mG;Ei=<xL9R65laN}Ydgb~-~N!7vS+KAlRZW=_qf
-zl5}+Z#Q<e|wa)$vQ|Tl<e&Ot7YNn4OiGpbAJ<!>GfKuNJT}pSCPw^f^OP{x=@8F?Y
-zXJ{ZeG8_pH1;)Z7$LUCnhQgzP(b0k7{-KjJ5*s-Z?hlU*gle4?Aq1y07iXqkJu^!^
-z!8Yo{>vV8l?lKKd&ty7jAf2W$hB;4Tsq?9sH&V&YS|=mQfx|`sh!g5^fCVPE`#}a9
-zsHlL)`xD_Z5wN|-v938@Q^cwq64R22!kSk4V-#wPQx09BB@^Ooa4i9{41s33Sk2r<
-zK0;0ZS^b&{U!7sNmrWe<2^=R^;wVES?xKmSE&7)*aR%uczZ&8$o4D-&c5Imgt&)#j
-zgz<fD;_3k;j?*h~oECB4nmE=BB?lQ3$FhWR@J>P8uj_HJ4#(k}A8x&g7&B1>2or#(
-ziF#Md@5Pn7>QZ(mOru^zeFybj)b~+8Lj4T&3)C-BzefEI^=H&yQ2#*v6Lnh>DFxmU
-z59?S!aef1(d!$e(MzK{(u6j6%x1#9q&+q23oB$|%*suhW@fW~f4DlZ4N5b|@r<kvC
-zLcZoES*U+BOZQ0K236&8v;n}XwleU58Su1#Aa+-fESXZSY#+C4!Ya|WKgriD$BYZ_
-zu(;sj=bJ>vv%T&)C=`C!rs;HbkL*aa7_FOnF5%qI$}TF#h0PhVbrihu-PEHslo*T|
-z99(Q}+MFS|3)BF#D(;0IgTdW%N#t7rWUzycG5B%K+c*lP9TuaYs7eOcR3;b&He@B&
-zoV~FshB+E-lvVi-2BNcNyjq4&yXID-jjd{YvFroU*#ZwPRa&mXha-noWpdf4s<|?Q
-z1bnyS8n;)I$yb`km!i<54C-cIuuSTFpM|belZUrD^=zWCNmZ!X7nn(#zKutr)l?IO
-z$FF5G%X^WbowYLhLg$OFD{G&xVmw@J%jTo=ElT9d&Ju$NPp~p(vKj`ZU0q4cClz;;
-zj{)w3h=YkS+~=6YJcxihK*nIFRYY;45wa1wQ*kLl*2?ff$NLc(w3=Q%9@rq?cvK60
-zn)~(M4mI9U?h6s>I0HC9+Wfv~Qz4;2eL|LTPs)TxA+wTeXfQGnIdv|TK7Q(K>M{7k
-zf_m6eC_L{a($N)=;!6+j$o8psiXaG2p_YVgTOUN(ob({-SSOoheg7o<Hi)1wZoN-H
-z1d_0yya(4sTz(9}aJcMPC#-%m@}j*{A+S)Atx+_5FNXM^pS$_AZa8tE2d5$(X9hk=
-z7L#h83x&hHC)jk%yv&<V;B0cOyY%eg2JBeY!5fL+4-Vf{>tGLoy;J9W`0zO4@q-WH
-z{1Fq+)|Jb-v$Fl~kFcA>_$}1`^HRBIDoYZV-fPCLpwhO*{~d}sCBEO<;&E8+TN$u2
-zU}eC{fRzC&16BsC4E&E7==)gM4KGasXo8NfuM)6I_LyJ%*vCx(^#cGZ0`Y(bal{hi
-z4KBA`zl{K!O5Cu3Z?s$S#hJuI(eSwX3BIqkFA@bZh*7W|KFgxyP?>GcPKk`RMw?t=
-z(|=;NRT76qw6#{)@^b>Hk|L<cvTXBJ*lrCI7`HExLD12cCbSuE88y7#k9h*Rlm!JS
-zayFIx%%M#`DS%dE*p_X3F?QoqB(vGF1hV!#iNF<@7h90ic*bTn7K19SfE%J{OENU7
-z5#L66$)SB;Ez3(5AL-E>aVNGa=cOUUd~sv!9nfp*sPOaZ+xVs0fuGXx2U0!y!oLUb
-SeEwbkJq|WZn<bBL2L1wR4t_2G
-
-literal 0
-HcmV?d00001
-
-- 
-2.47.3
-
@@ -1,7 +1,7 @@
-From 7194444fbddcf6567d0c82f0986e5deeacaea680 Mon Sep 17 00:00:00 2001
+From 18f4e970ebda43dd538f74398aea463a67040dd3 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 01:36:23 +0000
-Subject: [PATCH 31/40] src/intel/skylake: Disable stack overflow debug options
+Subject: [PATCH 35/37] src/intel/skylake: Disable stack overflow debug options

 The option was appearing in T480/3050micro configs of lbmk,
 after updating on the coreboot/next uprev for 20241206 rev8:
@@ -37,7 +37,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 9 insertions(+)

 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index 9191ed0ff8..493a2d835a 100644
+index d51ffaef7b..42af82a5d8 100644
 --- a/src/soc/intel/skylake/Kconfig
 +++ b/src/soc/intel/skylake/Kconfig
@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE
@@ -57,5 +57,5 @@ index 9191ed0ff8..493a2d835a 100644
 	hex
 	default 0x20400 if FSP_USES_CB_STACK
 -- 
-2.47.3
+2.39.5

@@ -1,30 +0,0 @@
-From 8e191c71f11de4cb3d08fe585537f15043cacb1b Mon Sep 17 00:00:00 2001
-From: Riku Viitanen <riku.viitanen@protonmail.com>
-Date: Sat, 27 Sep 2025 23:30:46 +0300
-Subject: [PATCH 36/40] soc/intel/alderlake: Disable
- MRC_CACHE_USING_MRC_VERSION
-
-There's some issue with building against the FSP headers in src/vendorcode.
-Headers in 3rdparty/fsp work, but since FspProducerDataHeaer.h is missing
-from there, we need to disable MRC_CACHE_USING_MRC_VERSION by force.
-
-Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
- src/soc/intel/alderlake/Kconfig | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 51bdf98b9d..739faa3808 100644
--- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -34,7 +34,6 @@ config SOC_INTEL_ALDERLAKE
- 	select INTEL_GMA_VERSION_2
- 	select INTEL_TXT_LIB
- 	select MP_SERVICES_PPI_V2
-	select MRC_CACHE_USING_MRC_VERSION if (SOC_INTEL_ALDERLAKE_PCH_N || SOC_INTEL_RAPTORLAKE) && !FSP_USE_REPO
- 	select MRC_SETTINGS_PROTECT
- 	select PARALLEL_MP_AP_WORK
- 	select PLATFORM_USES_FSP2_2
-- 
-2.47.3
-
@@ -1,7 +1,7 @@
-From 1685de1beee49456e9f6f578ca6e37219fe7dfff Mon Sep 17 00:00:00 2001
+From 8dcd86c34d92b9b17bcfe4c7c61793042dc97268 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 01:53:53 +0000
-Subject: [PATCH 27/40] src/intel/x4x: Disable stack overflow debug
+Subject: [PATCH 36/37] src/intel/x4x: Disable stack overflow debug

 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -29,5 +29,5 @@ index 1803ef5733..7129aabf72 100644
 config DOMAIN_RESOURCE_32BIT_LIMIT
 	default 0xfec00000
 -- 
-2.47.3
+2.39.5

@@ -1,7 +1,7 @@
-From 57630265c7ba2429a8215757330348733c087db3 Mon Sep 17 00:00:00 2001
+From 9b547c2029611793f895117a807fa2d2c22a5332 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 21 Apr 2025 05:14:45 +0100
-Subject: [PATCH 34/40] Conditional TBFW setting for T480/T480S
+Subject: [PATCH 37/37] Conditional TBFW setting for T480/T480S

 Otherwise, other boards will define it, which
 might trigger the vendor download script, and
@@ -33,5 +33,5 @@ index 512b326381..3d3490b35d 100644
 +
 endif # VENDOR_LENOVO
 -- 
-2.47.3
+2.39.5

@@ -1,76 +0,0 @@
-From 8ab86ffd25fc013790c260e564c8b770c13a5342 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 28 Sep 2025 03:17:50 +0100
-Subject: [PATCH 37/40] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)
-
-if you pass -k (keep fptr modules), don't use -r, don't
-use -t, you can essentially just use me_cleaner to
-extract a ME image without changing it. this is useful
-when for example, you just want to set the HAP bit.
-
-however, me_cleaner still performs a FPTR check.
-
-on some newer ME versions, it's always invalid according
-to me_cleaner, because for example it doesn't handle
-ME16 very well yet.
-
-this patch adds an option to override the FPTR check
-
-either pass -p or --pass-fptr
-
-NOTE: we probably won't use this on coreboot's me_cleaner,
-which is the corna version. we only need it on the newer
-me_cleaner versions for e.g. ME16, on certain setups.
-still, it's best to have the patch here too, just in case.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- util/me_cleaner/me_cleaner.py | 14 ++++++++++----
- 1 file changed, 10 insertions(+), 4 deletions(-)
-
-diff --git a/util/me_cleaner/me_cleaner.py b/util/me_cleaner/me_cleaner.py
-index fae5e56732..228bac899f 100755
--- a/util/me_cleaner/me_cleaner.py
-+++ b/util/me_cleaner/me_cleaner.py
-@@ -246,8 +246,10 @@ def check_partition_signature(f, offset):
-     return "{:#x}".format(decrypted_sig).endswith(sha256.hexdigest())   # FIXME
- 
- 
-def print_check_partition_signature(f, offset):
-    if check_partition_signature(f, offset):
-+def print_check_partition_signature(f, offset, pass_fptr):
-+    if pass_fptr:
-+        print("Skipping FPTR checks because the user told us to")
-+    elif check_partition_signature(f, offset):
-         print("VALID")
-     else:
-         print("INVALID!!")
-@@ -486,6 +488,8 @@ if __name__ == "__main__":
-                         "--extract-me)", action="store_true")
-     parser.add_argument("-k", "--keep-modules", help="don't remove the FTPR "
-                         "modules, even when possible", action="store_true")
-+    parser.add_argument("-p", "--pass-fptr", help="skip FTPR signature checks"
-+                        "regardless of other operations", action="store_true")
-     bw_list.add_argument("-w", "--whitelist", metavar="whitelist",
-                          help="Comma separated list of additional partitions "
-                          "to keep in the final image. This can be used to "
-@@ -871,12 +875,14 @@ if __name__ == "__main__":
-             print("Checking the FTPR RSA signature of the extracted ME "
-                   "image... ", end="")
-             print_check_partition_signature(mef_copy,
-                                            ftpr_offset + ftpr_mn2_offset)
-+                                            ftpr_offset + ftpr_mn2_offset,
-+                                                args.pass_fptr)
-         mef_copy.close()
- 
-     if not me6_ignition:
-         print("Checking the FTPR RSA signature... ", end="")
-        print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset)
-+        print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset,
-+                                                args.pass_fptr)
- 
-     f.close()
- 
-- 
-2.47.3
-
@@ -0,0 +1,153 @@
+From 49204919e885dca2be45ffbaf2f5af62109ec3a7 Mon Sep 17 00:00:00 2001
+From: gaspar-ilom <gasparilom@riseup.net>
+Date: Thu, 6 Mar 2025 23:00:00 +0000
+Subject: [PATCH 1/1] do not break building other thinkpads with the hacks for
+ the t480/s made Mate Kukri
+
+still not fixing things properly but at least it should now be possible to build older thinkpads without regressions.
+prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives.
+heads should build all boards on this coreboot version from the same coreboot tree.
+
+Signed-off-by: gaspar-ilom <gasparilom@riseup.net>
+---
+ src/device/pci_rom.c         |  9 ++++++---
+ src/ec/lenovo/h8/acpi/ec.asl |  4 +++-
+ src/ec/lenovo/h8/bluetooth.c | 14 ++++++++++----
+ src/ec/lenovo/h8/wwan.c      | 14 ++++++++++----
+ 4 files changed, 29 insertions(+), 12 deletions(-)
+
+diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
+index bba98d9dea..db3dbbe2ce 100644
+--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
+@@ -396,16 +396,19 @@ void pci_rom_ssdt(const struct device *device)
+ 		rom = cbrom;
+ 	}
+ 
+-#if 0
+
+	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+	const char *scope = "\\_SB.PCI0.RP01.PEGP";
+	#else
+ 	const char *scope = acpi_device_path(device);
+	#endif
+ 	if (!scope) {
+ 		printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
+ 		return;
+ 	}
+-#endif
+ 
+ 	/* write _ROM method */
+-	acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
+	acpigen_write_scope(scope);
+ 	acpigen_write_rom((void *)rom, rom->size * 512);
+ 	acpigen_pop_len(); /* pop scope */
+ }
+diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
+index 8f4a8e1986..f80c15106c 100644
+--- a/src/ec/lenovo/h8/acpi/ec.asl
+++ b/src/ec/lenovo/h8/acpi/ec.asl
+@@ -331,7 +331,9 @@ Device(EC)
+ #include "sleepbutton.asl"
+ #include "lid.asl"
+ #include "beep.asl"
+-//#include "thermal.asl"
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+#include "thermal.asl"
+#endif
+ #include "systemstatus.asl"
+ #include "thinkpad.asl"
+ }
+diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
+index be71a24ced..e60b6c088c 100644
+--- a/src/ec/lenovo/h8/bluetooth.c
+++ b/src/ec/lenovo/h8/bluetooth.c
+@@ -1,6 +1,8 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-// #include <southbridge/intel/common/gpio.h>
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+#include <southbridge/intel/common/gpio.h>
+#endif
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -26,23 +28,27 @@ void h8_bluetooth_enable(int on)
+  */
+ bool h8_has_bdc(const struct device *dev)
+ {
+	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+	printk(BIOS_INFO, "H8: BDC detection not implemented. "
+			  "Assuming BDC installed\n");
+	return true;
+	#else
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (1 || !conf->has_bdc_detection) {
+	if (!conf->has_bdc_detection) {
+ 		printk(BIOS_INFO, "H8: BDC detection not implemented. "
+ 				  "Assuming BDC installed\n");
+ 		return true;
+ 	}
+ 
+-#if 0
+ 	if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: BDC installed\n");
+ 		return true;
+ 	}
+-#endif
+ 
+ 	printk(BIOS_INFO, "H8: BDC not installed\n");
+ 	return false;
+	#endif
+ }
+ 
+ /*
+diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
+index 5cdcf77406..b4f5787e01 100644
+--- a/src/ec/lenovo/h8/wwan.c
+++ b/src/ec/lenovo/h8/wwan.c
+@@ -1,6 +1,8 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-// #include <southbridge/intel/common/gpio.h>
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+#include <southbridge/intel/common/gpio.h>
+#endif
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -24,23 +26,27 @@ void h8_wwan_enable(int on)
+  */
+ bool h8_has_wwan(const struct device *dev)
+ {
+	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+	printk(BIOS_INFO, "H8: WWAN detection not implemented. "
+			  "Assuming WWAN installed\n");
+	return true;
+	#else
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (1 || !conf->has_wwan_detection) {
+	if (!conf->has_wwan_detection) {
+ 		printk(BIOS_INFO, "H8: WWAN detection not implemented. "
+ 				  "Assuming WWAN installed\n");
+ 		return true;
+ 	}
+ 
+-#if 0
+ 	if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: WWAN installed\n");
+ 		return true;
+ 	}
+-#endif
+ 
+ 	printk(BIOS_INFO, "H8: WWAN not installed\n");
+ 	return false;
+	#endif
+ }
+ 
+ /*
+-- 
+2.39.5
+
@@ -1,35 +0,0 @@
-From c36ed52f7573563a9eaeeedd6e6c0ee75973a39d Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sat, 4 Oct 2025 21:57:43 +0100
-Subject: [PATCH 38/40] soc/intel/alderlake: Don't compress FSP-S
-
-Build systems like lbmk need to reproducibly insert
-certain vendor files on release images.
-
-Compression isn't always reproducible, and making it
-so costs a lot more time than simply disabling compression.
-
-With this change, FSP-S uses slightly more space inside
-the flash, but it's not that much.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- src/soc/intel/alderlake/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 739faa3808..1f6a1dca7d 100644
--- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -14,7 +14,7 @@ config SOC_INTEL_ALDERLAKE
- 	select DISPLAY_FSP_VERSION_INFO
- 	select DRIVERS_USB_ACPI
- 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
-	select FSP_COMPRESS_FSP_S_LZ4
-+#	select FSP_COMPRESS_FSP_S_LZ4
- 	select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
- 	select FSP_M_XIP
- 	select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN
-- 
-2.47.3
-
@@ -1,33 +0,0 @@
-From e564490781b0b829da43534c6c2a1b26aeb3282f Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sat, 4 Oct 2025 22:20:11 +0100
-Subject: [PATCH 39/40] alderlake: don't require full fsp repo for fd path
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- src/soc/intel/alderlake/Kconfig | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 1f6a1dca7d..3979d9e162 100644
--- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -415,7 +415,14 @@ config FSP_HEADER_PATH
- 
- config FSP_FD_PATH
- 	string
-	depends on FSP_USE_REPO
-+#	dependency removed for lbmk purposes, so that the path is present
-+#	in the config regardless of whether it's used. this is for ./mk -d
-+#	on alderlake boards, which is used by lbmk to manually split fsp,
-+#	even though the result is identical to what coreboot produces, because
-+#	this enables lbmk to strip the fsp in release archives, and re-insert
-+#	for compliance reasons (due to technicalities in intel's licensing),
-+#	and to enable lbmk's advanced checksum verification of vendor files
-+#	depends on FSP_USE_REPO
- 	default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd"   if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE
- 	default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd"   if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S
- 	default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd"     if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P
-- 
-2.47.3
-
@@ -1,7 +1,7 @@
-From 6f54ed4b0622c7772561760ea4b435bd236ac834 Mon Sep 17 00:00:00 2001
+From b313c1d4bae17fc6eb3a8217c503187d1cd5453d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 22 Apr 2025 10:21:59 +0100
-Subject: [PATCH 28/40] hp/8300cmt: remove xhci_overcurrent_mapping
+Subject: [PATCH 1/1] hp/8300cmt: remove xhci_overcurrent_mapping

 No longer needed, as per the following commit:

@@ -38,5 +38,5 @@ index 3d21739b72..3a0b6d5c59 100644
 			register "usb_port_config" = "{
 				{ 1, 0, 0 },
 -- 
-2.47.3
+2.39.5

@@ -0,0 +1,62 @@
+From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Tue, 29 Apr 2025 17:31:13 +0300
+Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler
+
+GCC 15 now considers the unterminated-string-initialization warning as
+part of -Werror by default. Coreboot compiles host utilities with the
+system compiler, which results in getting this error in some files.
+
+Mark a hexadecimal translation table in cbfstool code as "nonstring" to
+avoid the warning-turned-error.
+
+The bios log prefixes are non-null-terminated as well, but I couldn't
+figure out how to mark them as non-strings. Temporarily disable the
+warning with a pragma to avoid the error. That pragma causes an error on
+GCC 14, so disable pragma warnings along with it to avoid that as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ src/commonlib/include/commonlib/loglevel.h | 4 ++++
+ util/cbfstool/common.c                     | 2 +-
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
+index 79fbcfc6d92b..31438c945ff5 100644
+--- a/src/commonlib/include/commonlib/loglevel.h
+++ b/src/commonlib/include/commonlib/loglevel.h
+@@ -163,6 +163,9 @@
+  * When printing logs, lines should be printed with the following prefixes in
+  * front of them according to the BIOS_LOG_PREFIX_PATTERN printf() pattern.
+  */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wpragmas"
+#pragma GCC diagnostic ignored "-Wunterminated-string-initialization"
+ #define BIOS_LOG_PREFIX_PATTERN "[%.5s]  "
+ #define BIOS_LOG_PREFIX_MAX_LEVEL BIOS_SPEW
+ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
+@@ -177,6 +180,7 @@ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
+ 	[BIOS_DEBUG]   = "DEBUG",
+ 	[BIOS_SPEW]    = "SPEW ",
+ };
+#pragma GCC diagnostic pop
+ 
+ /*
+  * When printing to terminals supporting ANSI escape sequences, the following
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index 7154bc9d5425..cb08c9e8ec11 100644
+--- a/util/cbfstool/common.c
+++ b/util/cbfstool/common.c
+@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name)
+ 
+ char *bintohex(uint8_t *data, size_t len)
+ {
+-	static const char translate[16] = "0123456789abcdef";
+	static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
+ 
+ 	char *result = malloc(len * 2 + 1);
+ 	if (result == NULL)
+
+-- 
+2.49.0
+
@@ -1,184 +0,0 @@
-From 0fdb23e899e31b17a774ae9151410b11ccf13022 Mon Sep 17 00:00:00 2001
-From: Ron Nazarov <ron@noisytoot.org>
-Date: Tue, 30 Sep 2025 22:36:53 +0100
-Subject: [PATCH 40/40] Haswell NRI: Implement SMBIOS type 16/17
-
-Based on the implementation from Ivy/Sandy Bridge NRI.
-
-Tested on a Dell OptiPlex 9020 SFF with libreboot.
-
-Change-Id: I5e153258f9f88726f54c98baac0b1788a839f934
-Signed-off-by: Ron Nazarov <ron@noisytoot.org>
---
- .../haswell/native_raminit/raminit_main.c     |  6 +-
- .../haswell/native_raminit/raminit_native.c   | 83 +++++++++++++++++--
- .../haswell/native_raminit/raminit_native.h   |  2 +-
- 3 files changed, 81 insertions(+), 10 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 84db33ebdf..328f777ee1 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -245,7 +245,7 @@ static enum raminit_status try_raminit(
- 	return status;
- }
- 
-void raminit_main(const enum raminit_boot_mode bootmode)
-+const struct sysinfo *raminit_main(const enum raminit_boot_mode bootmode)
- {
- 	/*
- 	 * The mighty_ctrl struct. Will happily nuke the pre-RAM stack
-@@ -261,7 +261,7 @@ void raminit_main(const enum raminit_boot_mode bootmode)
- 	if (bootmode != BOOTMODE_COLD) {
- 		status = try_raminit(&mighty_ctrl, fast_boot, ARRAY_SIZE(fast_boot));
- 		if (status == RAMINIT_STATUS_SUCCESS)
-			return;
-+			return &mighty_ctrl;
- 	}
- 
- 	/** TODO: Try more than once **/
-@@ -269,4 +269,6 @@ void raminit_main(const enum raminit_boot_mode bootmode)
- 
- 	if (status != RAMINIT_STATUS_SUCCESS)
- 		die("Memory initialization was met with utmost failure and misery\n");
-+
-+	return &mighty_ctrl;
- }
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 3ad8ce29e7..73532592e8 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -16,6 +16,73 @@
- 
- #include "raminit_native.h"
- 
-+static uint8_t nb_get_ecc_type(const uint32_t capid0_a)
-+{
-+	return capid0_a & CAPID_ECCDIS ? MEMORY_ARRAY_ECC_NONE : MEMORY_ARRAY_ECC_SINGLE_BIT;
-+}
-+
-+static uint16_t nb_slots_per_channel(const uint32_t capid0_a)
-+{
-+	return !(capid0_a & CAPID_DDPCD) + 1;
-+}
-+
-+static uint16_t nb_number_of_channels(const uint32_t capid0_a)
-+{
-+	return !(capid0_a & CAPID_PDCD) + 1;
-+}
-+
-+static uint32_t nb_max_chan_capacity_mib(const uint32_t capid0_a)
-+{
-+	uint32_t ddrsz;
-+
-+	/* Values from documentation, which assume two DIMMs per channel */
-+	switch (CAPID_DDRSZ(capid0_a)) {
-+	case 1:
-+		ddrsz = 8192;
-+		break;
-+	case 2:
-+		ddrsz = 2048;
-+		break;
-+	case 3:
-+		ddrsz = 512;
-+		break;
-+	default:
-+		ddrsz = 16384;
-+		break;
-+	}
-+
-+	/* Account for the maximum number of DIMMs per channel */
-+	return (ddrsz / 2) * nb_slots_per_channel(capid0_a);
-+}
-+
-+/* Fill cbmem with information for SMBIOS type 16 and type 17 */
-+static void setup_sdram_meminfo(const struct sysinfo *ctrl)
-+{
-+	const u16 ddr_freq = (1000 << 8) / ctrl->tCK;
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			enum cb_err ret = spd_add_smbios17(channel, slot, ddr_freq,
-+						&ctrl->dimms[channel][slot].data);
-+			if (ret != CB_SUCCESS)
-+				printk(BIOS_ERR, "RAMINIT: Failed to add SMBIOS17\n");
-+		}
-+	}
-+
-+	/* The 'spd_add_smbios17' function allocates this CBMEM area */
-+	struct memory_info *m = cbmem_find(CBMEM_ID_MEMINFO);
-+	if (!m)
-+		return;
-+
-+	const uint32_t capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
-+
-+	const uint16_t channels = nb_number_of_channels(capid0_a);
-+
-+	m->ecc_type = nb_get_ecc_type(capid0_a);
-+	m->max_capacity_mib = channels * nb_max_chan_capacity_mib(capid0_a);
-+	m->number_of_devices = channels * nb_slots_per_channel(capid0_a);
-+}
-+
- static void wait_txt_clear(void)
- {
- 	const struct cpuid_result cpuid = cpuid_ext(1, 0);
-@@ -90,7 +157,8 @@ static void raminit_reset(void)
- static enum raminit_boot_mode do_actual_raminit(
- 	const bool s3resume,
- 	const bool cpu_replaced,
-	const enum raminit_boot_mode orig_bootmode)
-+	const enum raminit_boot_mode orig_bootmode,
-+	const struct sysinfo **ctrl)
- {
- 	struct mrc_data md = prepare_mrc_cache();
- 
-@@ -158,7 +226,7 @@ static enum raminit_boot_mode do_actual_raminit(
- 	 * And now, the actual memory initialization thing.
- 	 */
- 	printk(RAM_DEBUG, "\nStarting native raminit\n");
-	raminit_main(bootmode);
-+	*ctrl = raminit_main(bootmode);
- 
- 	return bootmode;
- }
-@@ -176,8 +244,9 @@ void perform_raminit(const int s3resume)
- 	wait_txt_clear();
- 	wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0});
- 
-+	const struct sysinfo *ctrl;
- 	const enum raminit_boot_mode bootmode =
-			do_actual_raminit(s3resume, cpu_replaced, orig_bootmode);
-+			do_actual_raminit(s3resume, cpu_replaced, orig_bootmode, &ctrl);
- 
- 	/** TODO: report_memory_config **/
- 
-@@ -204,9 +273,9 @@ void perform_raminit(const int s3resume)
- 		system_reset();
- 	}
- 
-	/* Save training data on non-S3 resumes */
-	if (!s3resume)
-+	/* Save training data and set up SMBIOS type 16/17 on non-S3 resumes */
-+	if (!s3resume) {
- 		save_mrc_data();
-
-	/** TODO: setup_sdram_meminfo **/
-+		setup_sdram_meminfo(ctrl);
-+	}
- }
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index b9e84a11df..1401feedc5 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -476,7 +476,7 @@ static inline void mchbar_write64(const uintptr_t x, const uint64_t v)
- 		  "m"(mmxsave));
- }
- 
-void raminit_main(enum raminit_boot_mode bootmode);
-+const struct sysinfo *raminit_main(enum raminit_boot_mode bootmode);
- 
- enum raminit_status collect_spd_info(struct sysinfo *ctrl);
- enum raminit_status initialise_mpll(struct sysinfo *ctrl);
-- 
-2.47.3
-
@@ -0,0 +1,71 @@
+From ee3925486f3567b9fe45cb98a88b9acc64991127 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 21:15:22 +0100
+Subject: [PATCH 1/1] crossgcc/gmp: Add upstream fix for GCC 15
+
+See:
+https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html
+
+by default, upstream GCC-15 now defaults to -std=c23, instead
+of -std=c17, which can cause some build issues.
+
+GMP has this patch on their mailing list for GCC-15 (see link).
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ .../gmp-6.3.0_acinclude-m4-fix-std-c23.patch  | 43 +++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+new file mode 100644
+index 0000000000..b884b62df7
+--- /dev/null
+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+@@ -0,0 +1,43 @@
+From b1b61bc8ab19659f0fb8c0f87edcd79ae1bfef7e Mon Sep 17 00:00:00 2001
+From: Rudi Heitbaum <rudi@heitbaum.com>
+Date: Wed, 22 Jan 2025 02:34:09 +0100
+Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure
+
+Add prototype to configure test function as c23 removes unprototyped
+functions.
+
+gcc-15 switched to -std=c23 by default:
+
+    https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212
+
+As a result `configure` fails with:
+    conftest.c: In function 'f':
+    conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6
+       12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}}
+          |                                                ^ ~
+    conftest.c:7:6: note: declared here
+        7 | void g(){}
+          |      ^
+
+Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html
+Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
+---
+ acinclude.m4 | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/acinclude.m4 b/acinclude.m4
+index 9cf9483..1eed843 100644
+--- a/acinclude.m4
++++ b/acinclude.m4
+@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1],
+ 
+ #if defined (__GNUC__) && ! defined (__cplusplus)
+ typedef unsigned long long t1;typedef t1*t2;
+-void g(){}
++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
+ void h(){}
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
+-- 
+2.39.5
+
+-- 
+2.39.5
+
@@ -1,46 +0,0 @@
-From 9936228e74ef8bccbf6adb8640040901d395cda0 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 6 Oct 2025 04:47:06 +0100
-Subject: [PATCH 1/1] soc/alderlake: disable stack overflow debug option
-
-same as on other boards. based on this commit:
-
-commit 51cc2bacb6b07279b97e9934d079060475481fb6
-Author: Subrata Banik <subratabanik@google.com>
-Author: Subrata Banik <subratabanik@google.com>
-Date:   Fri Dec 13 13:07:28 2024 +0530
-
-    soc/intel/pantherlake: Disable stack overflow debug options
-
-yeah, i've been replicating this change per platform.
-
-we do alderlake now in libreboot, so let's set that here too.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- src/soc/intel/alderlake/Kconfig | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 3979d9e162..a47a27dfaf 100644
--- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -329,6 +329,15 @@ config SOC_INTEL_UFS_CLK_FREQ_HZ
- 	int
- 	default 19200000
- 
-+# Override DEBUG Kconfig to avoid false alarm about stack overflow.
-+config DEBUG_STACK_OVERFLOW_BREAKPOINTS
-+	bool
-+	default n
-+
-+config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
-+	bool
-+	default n
-+
- config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
- 	int
- 	default 133
-- 
-2.47.3
-
@@ -0,0 +1,54 @@
+From 983835d1470dde4559d9ee58c60e65c0bb3873c2 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 23:13:42 +0100
+Subject: [PATCH 1/1] further gcc-15 fix for compiling gmp
+
+same as the previous fix, but we needed to apply
+the exact same change to the configure file, in
+the appropriate place.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ ...6.3.0_acinclude-m4-fix-std-c23-extra.patch | 30 +++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+new file mode 100644
+index 0000000000..bee0159abf
+--- /dev/null
+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+@@ -0,0 +1,30 @@
+From f1da82325f91ccf8f3a251c0f94388acf091c1fe Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 23:11:25 +0100
+Subject: [PATCH 1/1] further gcc-15 -std=23 mitigation
+
+the same fix as in the previous revision, also needs
+to be applied here. this make the coreboot build process
+pass, when compiling gmp.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ configure | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/configure b/configure
+index 7910aa0..bd4342d 100755
+--- a/configure
++++ b/configure
+@@ -6568,7 +6568,7 @@ if test "$gmp_prog_cc_works" = yes; then
+ 
+ #if defined (__GNUC__) && ! defined (__cplusplus)
+ typedef unsigned long long t1;typedef t1*t2;
+-void g(){}
++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
+ void h(){}
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
+-- 
+2.39.5
+
+-- 
+2.39.5
+
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later

 tree="default"
-rev="9e41c7cec791d84b079251065add7dba66662913"
+rev="c247f62749b967143e58c33aa0e5e234711a628f"
@@ -16,10 +16,9 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 # CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
-CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -155,9 +154,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -253,7 +252,6 @@ CONFIG_SMM_RESERVED_SIZE=0x200000
 CONFIG_SMM_MODULE_STACK_SIZE=0x800
 CONFIG_ACPI_BERT_SIZE=0x0
 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
@@ -436,6 +434,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -485,6 +484,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -16,10 +16,9 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 # CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
-CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -153,9 +152,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +250,6 @@ CONFIG_SMM_RESERVED_SIZE=0x200000
 CONFIG_SMM_MODULE_STACK_SIZE=0x800
 CONFIG_ACPI_BERT_SIZE=0x0
 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
@@ -434,6 +432,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -483,6 +482,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -6,8 +6,8 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
-grubtree="xhci_nvme"
+grubtree="xhci"
 vcfg="3050micro"
-build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
 payload_uboot="amd64"
@@ -154,9 +154,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -255,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -300,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -384,6 +384,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -460,8 +461,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -250,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -441,8 +442,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -248,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -437,8 +438,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -250,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -441,8 +442,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -248,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -437,8 +438,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -250,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -441,8 +442,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -248,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -437,8 +438,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -250,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -441,8 +442,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -248,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -437,8 +438,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -155,9 +155,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -298,6 +297,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -369,6 +369,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -443,8 +444,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -367,6 +367,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -439,8 +440,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -6,7 +6,7 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
-grubtree="xhci_nvme"
+grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 payload_uboot="amd64"
@@ -155,9 +155,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -298,6 +297,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -369,6 +369,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -443,8 +444,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -367,6 +367,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -439,8 +440,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -6,7 +6,7 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
-grubtree="xhci_nvme"
+grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 payload_uboot="amd64"
@@ -152,9 +152,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -248,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -293,6 +292,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -357,6 +357,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -437,8 +438,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -150,9 +150,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -246,7 +246,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
@@ -291,6 +290,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -355,6 +355,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -433,8 +434,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -250,7 +250,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -295,6 +294,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -378,6 +378,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -456,8 +457,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -248,7 +248,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -293,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -376,6 +376,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -452,8 +453,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -250,7 +250,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -295,6 +294,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -378,6 +378,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -456,8 +457,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -248,7 +248,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -293,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -376,6 +376,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -452,8 +453,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -250,7 +250,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -295,6 +294,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -378,6 +378,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -456,8 +457,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -248,7 +248,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -293,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -376,6 +376,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -452,8 +453,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -294,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -379,6 +379,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,8 +456,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -294,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -379,6 +379,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,8 +456,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -294,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -379,6 +379,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,8 +456,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -294,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -379,6 +379,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,8 +456,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -152,9 +152,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -359,6 +359,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -441,8 +442,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -150,9 +150,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -247,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
@@ -293,6 +292,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -357,6 +357,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -437,8 +438,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -149,9 +149,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -245,7 +245,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
@@ -291,6 +290,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -355,6 +355,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -424,8 +425,6 @@ CONFIG_USE_DDR2=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 # CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -294,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -379,6 +379,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,8 +456,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -294,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -379,6 +379,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,8 +456,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -151,9 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -249,7 +249,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -294,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -379,6 +379,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,8 +456,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
@@ -153,9 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -251,7 +251,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
-CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,8 +460,6 @@ CONFIG_USE_DDR3=y
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
--- a/Show More
+++ b/Show More