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update the thinkpad x270 patch

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Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2026-02-21 07:53:17 +00:00
parent 712145a91c
commit 7f2e1ce86f
48 changed files with 142 additions and 124 deletions
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config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
+2 -2
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@@ -1,7 +1,7 @@
From 7a5010bedeaf420af47d06fe33b7f78b354567ef Mon Sep 17 00:00:00 2001
From 03e8f5f33723fd291e30c5305fa2f5eb22bdf656 Mon Sep 17 00:00:00 2001
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
Date: Wed, 27 Oct 2021 13:36:01 +0200
Subject: [PATCH 01/45] add c3 and clockgen to apple/macbook21
Subject: [PATCH 01/48] add c3 and clockgen to apple/macbook21
---
src/mainboard/apple/macbook21/Kconfig | 1 +
config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
+2 -2
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@@ -1,7 +1,7 @@
From 6c04d0ed7ffcbb4f15ab5c8b588665068bfd2842 Mon Sep 17 00:00:00 2001
From da742084f51bb7e97472605d6eff0726fd7a5863 Mon Sep 17 00:00:00 2001
From: persmule <persmule@gmail.com>
Date: Sun, 31 Oct 2021 23:33:26 +0000
Subject: [PATCH 02/45] lenovo/t400: Enable all SATA ports
Subject: [PATCH 02/48] lenovo/t400: Enable all SATA ports
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+2 -2
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@@ -1,7 +1,7 @@
From e12e2fecc3ef8cf06f78ae9d6e48a28ad372dac0 Mon Sep 17 00:00:00 2001
From 278c2a989c025c1b3a097966968c8d253c973a3e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jan 2022 19:06:22 +0000
Subject: [PATCH 03/45] lenovo/x230: set me_state=Disabled in cmos.default
Subject: [PATCH 03/48] lenovo/x230: set me_state=Disabled in cmos.default
I only recently found out about this. It's possible to use me_cleaner to
do the same thing, but some people might just flash coreboot and not do
config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
+2 -2
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@@ -1,7 +1,7 @@
From 5f2607b24f00849aef189179ac245da69f9193ae Mon Sep 17 00:00:00 2001
From 63357b7f8c9da3a8d644542c70f50fc9bc77a8fc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 2 Mar 2022 21:50:01 +0000
Subject: [PATCH 04/45] set me_state=Disabled on all cmos.default files!
Subject: [PATCH 04/48] set me_state=Disabled on all cmos.default files!
yeah. why the hell isn't this the default
config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+2 -2
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@@ -1,7 +1,7 @@
From f56c11820745dceffdfb52caaa45f64942200fb7 Mon Sep 17 00:00:00 2001
From 434136e0aca4839e449e3841a5e993688b4586f0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
Subject: [PATCH 05/45] util/ifdtool: add --nuke flag (all 0xFF on region)
Subject: [PATCH 05/48] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+2 -2
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@@ -1,7 +1,7 @@
From 96f0538d3b8b40fe1505da2955c53860411294ec Mon Sep 17 00:00:00 2001
From 91e4334541da6522d5a0bf5277ac478c891e7117 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sat, 6 May 2023 15:53:41 -0600
Subject: [PATCH 06/45] mb/dell/e6400: Enable 01.0 device in devicetree for
Subject: [PATCH 06/48] mb/dell/e6400: Enable 01.0 device in devicetree for
dGPU models
Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
+2 -2
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@@ -1,7 +1,7 @@
From 05f2193910c2cc8f7dbd0e3b840e9708ec1d08c8 Mon Sep 17 00:00:00 2001
From 3ebe9e03ec563e5adb43337340fe973aa66a984a Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH 07/45] Remove warning for coreboot images built without a
Subject: [PATCH 07/48] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch
+2 -2
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@@ -1,7 +1,7 @@
From 8a50c79dc5ee65f1bc7f60a68354a3733354ce51 Mon Sep 17 00:00:00 2001
From 0e2fa472354b2e68ffbfc01d5bb225ca9d8973f0 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Thu, 22 Jun 2023 16:44:27 +0300
Subject: [PATCH 08/45] HACK: Disable coreboot related BL31 features
Subject: [PATCH 08/48] HACK: Disable coreboot related BL31 features
I don't know why, but removing this BL31 make argument lets gru-kevin
power off properly when shut down from Linux. Needs investigation.
config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+2 -2
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@@ -1,7 +1,7 @@
From f8527c5b1ef6537689427b1ca7bc67a96754c295 Mon Sep 17 00:00:00 2001
From f692cd96a4484b8e60bd112454d1bdbc3c689017 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 11:41:41 +0000
Subject: [PATCH 09/45] dell/e6430: use ME Soft Temporary Disable
Subject: [PATCH 09/48] dell/e6430: use ME Soft Temporary Disable
i overlooked this. it's set on other boards.
config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+2 -2
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@@ -1,7 +1,7 @@
From 41f33b00302cae8dcbb2c4c9404dc91f3a7f6dc8 Mon Sep 17 00:00:00 2001
From 78db6c595ff816ad4344d541688605ae720a83c4 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 23 Dec 2023 19:02:10 +0200
Subject: [PATCH 10/45] mb/hp: Add Compaq Elite 8300 CMT port
Subject: [PATCH 10/48] mb/hp: Add Compaq Elite 8300 CMT port
Based on autoport and Z220 SuperIO code.
config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+2 -2
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@@ -1,7 +1,7 @@
From 253e0316eeddeacd78aba7d3a6fa71a75632febc Mon Sep 17 00:00:00 2001
From beb9b1650fb3aec96544b683fbe53ee16584f3d8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 2 Mar 2024 22:51:09 +0000
Subject: [PATCH 11/45] nb/intel/haswell: make IOMMU a runtime option
Subject: [PATCH 11/48] nb/intel/haswell: make IOMMU a runtime option
When I tested graphics cards on a coreboot port for Dell
OptiPlex 9020 SFF, I could not use a graphics card unless
config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+2 -2
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@@ -1,7 +1,7 @@
From fcdb498f9fa13cdf25f9630d5fa24ea5f0bcd09a Mon Sep 17 00:00:00 2001
From 0f76a919522c9624c2b5df2a9c17525ab21bd6b9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 2 Mar 2024 23:00:09 +0000
Subject: [PATCH 12/45] dell/optiplex_9020: Disable IOMMU by default
Subject: [PATCH 12/48] dell/optiplex_9020: Disable IOMMU by default
Needed to make graphics cards work. Turning it on is
recommended if only using iGPU, otherwise leave it off
config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+2 -2
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@@ -1,7 +1,7 @@
From ef705b02719d12b2a92b9abc3663db24f22d4486 Mon Sep 17 00:00:00 2001
From df64f2825157226b98e002e746114e25b0047438 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 6 Apr 2024 01:22:47 +0100
Subject: [PATCH 13/45] nb/haswell: Fully disable iGPU when dGPU is used
Subject: [PATCH 13/48] nb/haswell: Fully disable iGPU when dGPU is used
My earlier patch disabled decode *and* disabled the iGPU itself, but
a subsequent revision disabled only VGA decode. Upon revisiting, I
config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+2 -2
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@@ -1,7 +1,7 @@
From a1270456f4908f1a4e86d4f1a0b51d4553127cda Mon Sep 17 00:00:00 2001
From fdf4774a6e80b1f94079abb346049113dfbf5241 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 3 May 2024 11:03:32 -0600
Subject: [PATCH 14/45] ec/dell/mec5035: Add S3 suspend SMI handler
Subject: [PATCH 14/48] ec/dell/mec5035: Add S3 suspend SMI handler
This is necessary for S3 resume to work on SNB and newer Dell Latitude
laptops. If a command isn't sent, the EC cuts power to the DIMMs,
config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+2 -2
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@@ -1,7 +1,7 @@
From c276f783816f44b445853d7db2ca4845dad053de Mon Sep 17 00:00:00 2001
From 18216387e5c40ec3c80c63ec25e9b0c55a009cff Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 4 May 2024 02:00:53 +0100
Subject: [PATCH 15/45] nb/haswell: lock policy regs when disabling IOMMU
Subject: [PATCH 15/48] nb/haswell: lock policy regs when disabling IOMMU
Angel Pons told me I should do it. See comments here:
https://review.coreboot.org/c/coreboot/+/81016
config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch
+2 -2
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@@ -1,7 +1,7 @@
From f1d4736f87a35181d1da3e3941a87461b78c0579 Mon Sep 17 00:00:00 2001
From d797b9d19c6bc3224897000756caef29e98dd266 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Mon, 10 May 2021 22:40:59 +0200
Subject: [PATCH 16/45] nb/intel/gm45: Make DDR2 raminit work
Subject: [PATCH 16/48] nb/intel/gm45: Make DDR2 raminit work
List of changes:
- Update some timing and ODT values
config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
+2 -2
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@@ -1,7 +1,7 @@
From 2fdbd8a9f05a6bdca83fa4691d037690f0727a8a Mon Sep 17 00:00:00 2001
From e573065ac900d4decfd4dbd0a1464d82501ac3c5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Tue, 6 Aug 2024 00:50:24 +0100
Subject: [PATCH 17/45] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
Subject: [PATCH 17/48] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
We add this patch:
config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+2 -2
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@@ -1,7 +1,7 @@
From 760ea1634b4b3bcf3dc0aef9b058d383f2c230ab Mon Sep 17 00:00:00 2001
From 130a5ca25fbedb58e49b613e4a7cece715b545ae Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 20 May 2024 10:24:16 -0600
Subject: [PATCH 18/45] mb/dell/e6400: Use 100 MHz reference clock for display
Subject: [PATCH 18/48] mb/dell/e6400: Use 100 MHz reference clock for display
The E6400 uses a 100 MHz reference clock for spread spectrum support on
LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
+2 -2
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@@ -1,7 +1,7 @@
From 87255c381b1aa3806ca076b11e45b09bfbffca86 Mon Sep 17 00:00:00 2001
From 7641a4b9b91c385223026cd566e0ffc2a2aa0d8f Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Mon, 12 Aug 2024 02:15:24 +0100
Subject: [PATCH 19/45] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
Subject: [PATCH 19/48] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
set it to 96MHz. fixes the following build error when
building for x4x boards e.g. gigabyte ga-g41m-es2l:
config/coreboot/default/patches/0020-mb-dell-gm45_latitudes-Add-E4300-variant.patch
+2 -2
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@@ -1,7 +1,7 @@
From 15998b0267bb698dc3737b1319f5358bac8a8c7b Mon Sep 17 00:00:00 2001
From 36126c093a9b9e01d41f0a68977cd09070c3c276 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Thu, 26 Sep 2024 19:51:25 -0600
Subject: [PATCH 20/45] mb/dell/gm45_latitudes: Add E4300 variant
Subject: [PATCH 20/48] mb/dell/gm45_latitudes: Add E4300 variant
Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
config/coreboot/default/patches/0021-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
+2 -2
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@@ -1,7 +1,7 @@
From 2afe5d44af5a70409cca8c5868c5c022c0cec404 Mon Sep 17 00:00:00 2001
From 4caca6e6e349fa1913df622081025ea53bfd136f Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 3 May 2024 16:31:12 -0600
Subject: [PATCH 21/45] mb/dell: Add S3 SMI handler for Dell Latitudes
Subject: [PATCH 21/48] mb/dell: Add S3 SMI handler for Dell Latitudes
Integrate the previously added mec5035_smi_sleep() function into
mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
config/coreboot/default/patches/0022-Disable-compression-on-refcode-insertion.patch
+2 -2
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@@ -1,7 +1,7 @@
From 1a03117366dd2348143a89f204c9f4e0e84e35f4 Mon Sep 17 00:00:00 2001
From 669ef0d2c72326134f64a4fe70f67220ec690c5e Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Tue, 31 Dec 2024 14:42:24 +0000
Subject: [PATCH 22/45] Disable compression on refcode insertion
Subject: [PATCH 22/48] Disable compression on refcode insertion
Compression is not reliably reproducible. In an lbmk release
context, this means we cannot rely on vendorfile insertion.
config/coreboot/default/patches/0023-nb-intel-Disable-stack-overflow-debug-options.patch
+2 -2
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@@ -1,7 +1,7 @@
From 179f677ab55f05b8cfcaf5539d1bdec93ba710a0 Mon Sep 17 00:00:00 2001
From c7b136f1f4fa2bc1a783711b5a1ee82c5d9ce69f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 21 Apr 2025 02:58:47 +0100
Subject: [PATCH 23/45] nb/intel/*: Disable stack overflow debug options
Subject: [PATCH 23/48] nb/intel/*: Disable stack overflow debug options
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
config/coreboot/default/patches/0024-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+2 -2
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@@ -1,7 +1,7 @@
From 416a573898cae4b5222eb58dd3dbc0b3d106e8bb Mon Sep 17 00:00:00 2001
From c15a0ef9b964e9df9a5578ed271af4f1c0419f38 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 30 Sep 2024 20:44:38 -0400
Subject: [PATCH 24/45] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Subject: [PATCH 24/48] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
config/coreboot/default/patches/0025-mb-dell-optiplex_780-Add-USFF-variant.patch
+2 -2
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@@ -1,7 +1,7 @@
From 66608982981cd8774e44f4918dac03a4027e3287 Mon Sep 17 00:00:00 2001
From bfd5f6628a69d8704a84b30c4027149fe1b21efa Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 30 Oct 2024 20:55:25 -0600
Subject: [PATCH 25/45] mb/dell/optiplex_780: Add USFF variant
Subject: [PATCH 25/48] mb/dell/optiplex_780: Add USFF variant
Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
config/coreboot/default/patches/0026-src-intel-x4x-Disable-stack-overflow-debug.patch
+2 -2
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@@ -1,7 +1,7 @@
From 353610638fdb6ad8cf7ea5883368aa1375cff5b6 Mon Sep 17 00:00:00 2001
From 82f47133c20abc720f5d5fa8a54be465ebd95f28 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 01:53:53 +0000
Subject: [PATCH 26/45] src/intel/x4x: Disable stack overflow debug
Subject: [PATCH 26/48] src/intel/x4x: Disable stack overflow debug
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
config/coreboot/default/patches/0027-hp-8300cmt-remove-xhci_overcurrent_mapping.patch
+2 -2
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@@ -1,7 +1,7 @@
From 9ae48676a157c37036b78a2b20a1ff743ec3963e Mon Sep 17 00:00:00 2001
From 5c4439fb513c315ef3effff19146b331c492fa9b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 10:21:59 +0100
Subject: [PATCH 27/45] hp/8300cmt: remove xhci_overcurrent_mapping
Subject: [PATCH 27/48] hp/8300cmt: remove xhci_overcurrent_mapping
No longer needed, as per the following commit:
config/coreboot/default/patches/0028-dell-3050micro-disable-nvme-hotplug.patch
+2 -2
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@@ -1,7 +1,7 @@
From 79b2b300d32a55d641fd542196f2644dc8e7aacf Mon Sep 17 00:00:00 2001
From 71ec1f7a6480e72b77a567f8cc0c2673a5e7905f Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 11 Dec 2024 01:06:01 +0000
Subject: [PATCH 28/45] dell/3050micro: disable nvme hotplug
Subject: [PATCH 28/48] dell/3050micro: disable nvme hotplug
in my testing, when running my 3050micro for a few days,
the nvme would sometimes randomly rename.
config/coreboot/default/patches/0029-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
+2 -2
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@@ -1,7 +1,7 @@
From 554e275c59e8a800c097b7edf5bcdcefc70a3b6c Mon Sep 17 00:00:00 2001
From 95a0af0eea56e1bddcb243ed135835448b90fa56 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 01:36:23 +0000
Subject: [PATCH 29/45] src/intel/skylake: Disable stack overflow debug options
Subject: [PATCH 29/48] src/intel/skylake: Disable stack overflow debug options
The option was appearing in T480/3050micro configs of lbmk,
after updating on the coreboot/next uprev for 20241206 rev8:
config/coreboot/default/patches/0030-soc-intel-skylake-Don-t-compress-FSP-S.patch
+2 -2
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@@ -1,7 +1,7 @@
From 5a3cced53e209d3ca1b48fc34f126cb4d21bc867 Mon Sep 17 00:00:00 2001
From 7d94457ba0e2be10d781c5fd0659d895c9b558b1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Thu, 26 Dec 2024 19:45:20 +0000
Subject: [PATCH 30/45] soc/intel/skylake: Don't compress FSP-S
Subject: [PATCH 30/48] soc/intel/skylake: Don't compress FSP-S
Build systems like lbmk need to reproducibly insert
certain vendor files on release images.
config/coreboot/default/patches/0031-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
+2 -2
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@@ -1,7 +1,7 @@
From 61d81f24ae70514f71796c6d3fd1d2d08127cce5 Mon Sep 17 00:00:00 2001
From 8768e53f3b2ceb00ec0c8abf0fc0af03993820b1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 18 Dec 2024 02:06:18 +0000
Subject: [PATCH 31/45] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
Subject: [PATCH 31/48] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
This is used by lbmk to know where a tb.bin file goes,
when extracting and padding TBT.bin from Lenovo ThunderBolt
config/coreboot/default/patches/0032-Conditional-TBFW-setting-for-kabylake-thinkpads.patch
+2 -2
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@@ -1,7 +1,7 @@
From 0ed0d9a18742655ca26466cade80e6fb406606fc Mon Sep 17 00:00:00 2001
From 579c60fd77517497eb18dfeca8d73cdca94c15da Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 21 Apr 2025 05:14:45 +0100
Subject: [PATCH 32/45] Conditional TBFW setting for kabylake thinkpads
Subject: [PATCH 32/48] Conditional TBFW setting for kabylake thinkpads
Otherwise, other boards will define it, which
might trigger the vendor download script, and
config/coreboot/default/patches/0033-soc-intel-alderlake-Disable-MRC_CACHE_USING_MRC_VERS.patch
+2 -2
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@@ -1,7 +1,7 @@
From 54ae502b30884fa64fafd87c04a09f17e0e1345f Mon Sep 17 00:00:00 2001
From 23d8a97ff213f744b4e6333d92fc90e9ea97e879 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 27 Sep 2025 23:30:46 +0300
Subject: [PATCH 33/45] soc/intel/alderlake: Disable
Subject: [PATCH 33/48] soc/intel/alderlake: Disable
MRC_CACHE_USING_MRC_VERSION
There's some issue with building against the FSP headers in src/vendorcode.
config/coreboot/default/patches/0034-Subject-PATCH-1-1-Add-a-p-option-skip-FPTR-checks.patch
+2 -2
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@@ -1,7 +1,7 @@
From c0625b4e2f9df53e774fe8b8200210b29c52b468 Mon Sep 17 00:00:00 2001
From e2e070ab1f080c0ae59c43131faa57f3499fd813 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Sep 2025 03:17:50 +0100
Subject: [PATCH 34/45] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)
Subject: [PATCH 34/48] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)
if you pass -k (keep fptr modules), don't use -r, don't
use -t, you can essentially just use me_cleaner to
config/coreboot/default/patches/0035-soc-intel-alderlake-Don-t-compress-FSP-S.patch
+2 -2
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@@ -1,7 +1,7 @@
From 964cd5ff3d0ac07d625b7c40a46a1ee8d51fb7e6 Mon Sep 17 00:00:00 2001
From fee89a6c872ec26c2ea128ecdce62d6c3abe53f1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Oct 2025 21:57:43 +0100
Subject: [PATCH 35/45] soc/intel/alderlake: Don't compress FSP-S
Subject: [PATCH 35/48] soc/intel/alderlake: Don't compress FSP-S
Build systems like lbmk need to reproducibly insert
certain vendor files on release images.
config/coreboot/default/patches/0036-alderlake-don-t-require-full-fsp-repo-for-fd-path.patch
+2 -2
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@@ -1,7 +1,7 @@
From 18b6f0d1b15e84f9cc3a2eeb86ed6ac7ae4a7886 Mon Sep 17 00:00:00 2001
From abd26006eff71c9570bc90fdbce3a76f8f559cea Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Oct 2025 22:20:11 +0100
Subject: [PATCH 36/45] alderlake: don't require full fsp repo for fd path
Subject: [PATCH 36/48] alderlake: don't require full fsp repo for fd path
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
config/coreboot/default/patches/0037-soc-alderlake-disable-stack-overflow-debug-option.patch
+2 -2
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@@ -1,7 +1,7 @@
From 9bd0b15f26681f4d74f5ca7c7f6cbeb1465b7416 Mon Sep 17 00:00:00 2001
From 6a4a79d82df982c2fca859101040e407623f519c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Oct 2025 04:47:06 +0100
Subject: [PATCH 37/45] soc/alderlake: disable stack overflow debug option
Subject: [PATCH 37/48] soc/alderlake: disable stack overflow debug option
same as on other boards. based on this commit:
config/coreboot/default/patches/0038-ec-dell-mec5035-Add-command-to-disable-EC-initiated-.patch
+2 -2
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@@ -1,7 +1,7 @@
From 357872d4b9c5fdc559d10596b0f21d7065c8fdc5 Mon Sep 17 00:00:00 2001
From bb286d13cb7702e9396deab04023cc58dcc01a15 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 11 May 2025 15:41:22 -0600
Subject: [PATCH 38/45] ec/dell/mec5035: Add command to disable EC-initiated
Subject: [PATCH 38/48] ec/dell/mec5035: Add command to disable EC-initiated
thermal shutdown
If command 0xBF isn't sent, the EC shuts down the system without warning
config/coreboot/default/patches/0039-mb-dell-snb_ivb_latitude-Disable-EC-initiated-shutdo.patch
+2 -2
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@@ -1,7 +1,7 @@
From 91a9327e0a2aecfd14be7878b327f5360b658efd Mon Sep 17 00:00:00 2001
From a93c01173c2f88b4a09286740c030314040c39fc Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 11 May 2025 16:28:23 -0600
Subject: [PATCH 39/45] mb/dell/snb_ivb_latitude: Disable EC initiated shutdown
Subject: [PATCH 39/48] mb/dell/snb_ivb_latitude: Disable EC initiated shutdown
at 87 degrees
If command 0xBF isn't sent, the EC will shut down the system without
config/coreboot/default/patches/0040-fix-ifdtool-build.patch
+2 -2
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@@ -1,7 +1,7 @@
From ee295fa8156560526ea9821f6140b84f36d5a92c Mon Sep 17 00:00:00 2001
From dc4036353483c5fc0c140fc269d9bddb0bb7a967 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 20 Dec 2025 20:12:48 +0100
Subject: [PATCH 40/45] fix ifdtool build
Subject: [PATCH 40/48] fix ifdtool build
not my mistake. someone messed up.
config/coreboot/default/patches/0041-tests-Makefile.mk-use-3rdparty-cmocka-by-default.patch
+2 -2
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@@ -1,7 +1,7 @@
From d0f6949cd4ef3e1d88d4fb2f9cc8ffacc02c7879 Mon Sep 17 00:00:00 2001
From 5b7bbc6fcc6f737f259906f1919c1e28b6628a7e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 20 Dec 2025 22:36:18 +0100
Subject: [PATCH 41/45] tests/Makefile.mk: use 3rdparty/cmocka by default
Subject: [PATCH 41/48] tests/Makefile.mk: use 3rdparty/cmocka by default
(tests)
config/coreboot/default/patches/0042-mb-dell-optiplex_780-use-legacy-HDA-verb-table.patch
+2 -2
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@@ -1,7 +1,7 @@
From 75715c75777fbf24c08f2c95b9fcda767f6782dd Mon Sep 17 00:00:00 2001
From ecbf5a133d839b6c8579e384e9db0a036eca939d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 23 Dec 2025 18:41:27 +0100
Subject: [PATCH 42/45] mb/dell/optiplex_780: use legacy HDA verb table
Subject: [PATCH 42/48] mb/dell/optiplex_780: use legacy HDA verb table
See:
config/coreboot/default/patches/0043-hp8300cmt-use-legacy-verb-table.patch
+2 -2
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@@ -1,7 +1,7 @@
From b6d7b6b5e9b032a81304f5889c7cc3c506a7b0d1 Mon Sep 17 00:00:00 2001
From 962bfe1366598145a93cf6a7ed0f78393e5e9ff7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 23 Dec 2025 18:46:45 +0100
Subject: [PATCH 43/45] hp8300cmt: use legacy verb table
Subject: [PATCH 43/48] hp8300cmt: use legacy verb table
same as for the 780 optiplex patch
config/coreboot/default/patches/0044-topton-x2e-n150-use-old-fsp.patch
+2 -2
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@@ -1,7 +1,7 @@
From 0f761363172f0d561cf7ef7aa5fb8d1ed4ae50a2 Mon Sep 17 00:00:00 2001
From 88d29f792de89bb0a138e671432227cb5679b5ae Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 Jan 2026 21:42:21 +0000
Subject: [PATCH 44/45] topton x2e n150: use old fsp
Subject: [PATCH 44/48] topton x2e n150: use old fsp
i added the old fsp back, so that we didn't have to
mess around with vendor files in lbmk, because coreboot
config/coreboot/default/patches/0045-mb-supermicro-x11-lga1151-series-Disable-ME-HECI-in-.patch
+2 -2
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@@ -1,7 +1,7 @@
From 015b268510b2d665be21eec1f5e5f9ac41a31eb2 Mon Sep 17 00:00:00 2001
From 5b52abaa8529f7493f9d4ecf402e9ee130f4f8d2 Mon Sep 17 00:00:00 2001
From: Ron Nazarov <ron@noisytoot.org>
Date: Sat, 14 Feb 2026 20:13:01 +0000
Subject: [PATCH 45/45] mb/supermicro/x11-lga1151-series: Disable ME HECI in
Subject: [PATCH 45/48] mb/supermicro/x11-lga1151-series: Disable ME HECI in
devicetree
Since we always use me_cleaner, this speeds up boot time by preventing
config/coreboot/default/patches/0047-util-ifdtool-option-to-allow-region-override.patch → config/coreboot/default/patches/0046-util-ifdtool-option-to-allow-region-override.patch
+2 -2
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@@ -1,7 +1,7 @@
From b107264b561bc5a33f3ecf7dd432d70dde09ad4e Mon Sep 17 00:00:00 2001
From b9cc1be6f9d591dbc4f73b1448f8fce5ea20a0b4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 20 Feb 2026 01:23:32 +0000
Subject: [PATCH 1/1] util/ifdtool: option to allow region override
Subject: [PATCH 46/48] util/ifdtool: option to allow region override
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
config/coreboot/default/patches/0048-me_cleaner-don-t-modify-if-k-is-used.patch → config/coreboot/default/patches/0047-me_cleaner-don-t-modify-if-k-is-used.patch
+2 -2
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@@ -1,7 +1,7 @@
From 5acf504c5649732bbb6ef70c9a3e5cda78c0d367 Mon Sep 17 00:00:00 2001
From 1bc6028bf88ca6306ad89fc17fa6f31b9788b248 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 20 Feb 2026 19:31:19 +0000
Subject: [PATCH 1/1] me_cleaner: don't modify if -k is used
Subject: [PATCH 47/48] me_cleaner: don't modify if -k is used
don't remove *anything*. in libreboot, we only
ever use -k when we werely want to extract the
config/coreboot/default/patches/0046-WIP-Thinkpad-x270.patch → config/coreboot/default/patches/0048-mb-lenovo-sklkbl-Add-Lenovo-Thinkpad-X270-as-a-varia.patch
+48 -30
View File
@@ -1,18 +1,25 @@
From 1e8f82863d6d3dbec0267b5a9679ff1e91e191d8 Mon Sep 17 00:00:00 2001
From f5f73c2539e05cf85bf5eec795e4f91da50838ba Mon Sep 17 00:00:00 2001
From: Kat Inskip <kat@inskip.me>
Date: Tue, 17 Feb 2026 16:18:15 -0800
Subject: [PATCH 1/1] WIP: Thinkpad x270
Subject: [PATCH 48/48] mb/lenovo/sklkbl: Add Lenovo Thinkpad X270 as a variant
This machine is somewhat dissimilar from the X280 in the PCIe allocations in the overridetree. It also lacks soldered RAM, having a single SODIMM slot.
This port was based upon the work done by Johann C Rode for the X280 and the VBT and hda verbs were obtained from that work, not obtained separately. GPIO ports and PCI-e allocations have been checked against schematics after editing.
Functionality has been validated on a ThinkPad X270 with machine type model 20HMS2WU03 with 16GB onboard RAM and i5-7300U CPU. The laptop has been tested running libreboot, booting Guix via GRUB payload. A check of the hardware shows no issues (video, wifi, wired ethernet, reboot, sleep, NVMe).
An untested variety allowing for a Skylake CPU (for 20K5 and 20K6) has been included.
---
src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 7 +
src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 14 ++
.../lenovo/sklkbl_thinkpad/Kconfig.name | 3 +
.../sklkbl_thinkpad/variants/x270/data.vbt | Bin 0 -> 6144 bytes
.../variants/x270/gma-mainboard.ads | 19 ++
.../sklkbl_thinkpad/variants/x270/gpio.c | 200 ++++++++++++++++++
.../sklkbl_thinkpad/variants/x270/hda_verb.c | 124 +++++++++++
.../variants/x270/memory_init_params.c | 19 ++
.../variants/x270/overridetree.cb | 85 ++++++++
8 files changed, 457 insertions(+)
.../variants/x270/overridetree.cb | 89 ++++++++
8 files changed, 468 insertions(+)
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/data.vbt
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/gma-mainboard.ads
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/gpio.c
@@ -21,13 +28,18 @@ Subject: [PATCH 1/1] WIP: Thinkpad x270
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/overridetree.cb
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
index b7cc705699..df16390ec5 100644
index b7cc705699..5945fe7b99 100644
--- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
@@ -58,6 +58,11 @@ config BOARD_LENOVO_X280
@@ -58,6 +58,16 @@ config BOARD_LENOVO_X280
select SOC_INTEL_KABYLAKE
select HAVE_SPD_IN_CBFS
+config BOARD_LENOVO_X270_20K6
+ bool
+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+ select SOC_INTEL_SKYLAKE
+
+config BOARD_LENOVO_X270_20HM
+ bool
+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
@@ -36,19 +48,21 @@ index b7cc705699..df16390ec5 100644
if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
config MAINBOARD_DIR
@@ -69,6 +74,7 @@ config VARIANT_DIR
@@ -69,6 +79,8 @@ config VARIANT_DIR
default "t480s" if BOARD_LENOVO_T480S
default "t580" if BOARD_LENOVO_T580
default "x280" if BOARD_LENOVO_X280
+ default "x270" if BOARD_LENOVO_X270_20HM
+ default "x270" if BOARD_LENOVO_X270_20K6
config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
@@ -79,6 +85,7 @@ config MAINBOARD_PART_NUMBER
@@ -79,6 +91,8 @@ config MAINBOARD_PART_NUMBER
default "T480s" if BOARD_LENOVO_T480S
default "T580" if BOARD_LENOVO_T580
default "X280" if BOARD_LENOVO_X280
+ default "X270" if BOARD_LENOVO_X270_20HM
+ default "X270" if BOARD_LENOVO_X270_20K6
config CBFS_SIZE
default 0x900000
@@ -488,10 +502,10 @@ index 0000000000..a2317c026d
+}
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/overridetree.cb
new file mode 100644
index 0000000000..a7d8167927
index 0000000000..3191cdfac5
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/overridetree.cb
@@ -0,0 +1,85 @@
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/intel/skylake
@@ -519,13 +533,16 @@ index 0000000000..a7d8167927
+
+ # PCIe
+ # PCIe Controller 1 - 1x2 + 2x1
+ # PCIE 1-2 - RP1 - Media / SD - CLKOUT0 - CLKREQ0
+ # PCIE 3 - RP3 - WLAN - CLKOUT1 - CLKREQ1
+ # PCIE 4 - GbE - GbE - CLKOUT2 - CLKREQ2
+ # PCIE 1 - RP1 - Media / SD - CLKOUT0 - CLKREQ0
+ # PCIE 2 - USB3 Port
+ # PCIE 3 - RP3 - WiGig - CLKOUT1 - CLKREQ1
+ # PCIE 3 - RP3 - WLAN - CLKOUT2 - CLKREQ2
+ # PCIE 4 - GbE - GbE - CLKOUT3 - CLKREQ3
+ # PCIe Controller 2 - 1x4
+ # PCIE 5-8 - RP5 - NVMe - CLKOUT3 - CLKREQ3
+ # PCIE 5 - RP5 - NVMe - CLKOUT4 - CLKREQ4
+ # PCIe Controller 3 - 4x1
+ # PCIE 12 - RP9 - WWAN - CLKOUT5 - CLKREQ5
+ # PCIE 7 - RP8 - WWAN - CLKOUT5 - CLKREQ5
+ # PCIE 8 - Optane
+
+ # Media / SD - x2
+ device ref pcie_rp1 on
@@ -539,8 +556,8 @@ index 0000000000..a7d8167927
+ # M.2 WLAN x1
+ device ref pcie_rp3 on
+ register "PcieRpClkReqSupport[2]" = "true"
+ register "PcieRpClkReqNumber[2]" = "1"
+ register "PcieRpClkSrcNumber[2]" = "1"
+ register "PcieRpClkReqNumber[2]" = "2"
+ register "PcieRpClkSrcNumber[2]" = "2"
+ register "PcieRpAdvancedErrorReporting[2]" = "true"
+ register "PcieRpLtrEnable[2]" = "true"
+ smbios_slot_desc "SlotTypeM2Socket1_DP" "SlotLengthOther" "M.2/A 2230" "SlotDataBusWidth1X"
@@ -549,9 +566,9 @@ index 0000000000..a7d8167927
+ # Ethernet (clobbers RP4)
+ device ref gbe on
+ register "LanClkReqSupported" = "true"
+ register "LanClkReqNumber" = "2"
+ register "PcieRpClkReqNumber[3]" = "2"
+ register "PcieRpClkSrcNumber[3]" = "2"
+ register "LanClkReqNumber" = "3"
+ register "PcieRpClkReqNumber[3]" = "3"
+ register "PcieRpClkSrcNumber[3]" = "3"
+ register "EnableLanLtr" = "true"
+ register "EnableLanK1Off" = "true"
+ end
@@ -559,20 +576,21 @@ index 0000000000..a7d8167927
+ # M.2 2280 SSD - x4 (RP9)
+ device ref pcie_rp5 on
+ register "PcieRpClkReqSupport[4]" = "true"
+ register "PcieRpClkReqNumber[4]" = "3"
+ register "PcieRpClkSrcNumber[4]" = "3"
+ register "PcieRpClkReqNumber[4]" = "4"
+ register "PcieRpClkSrcNumber[4]" = "4"
+ register "PcieRpAdvancedErrorReporting[4]" = "true"
+ register "PcieRpLtrEnable[4]" = "true"
+ register "PcieRpHotPlug[4]" = "false"
+ smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
+ end
+
+ # M.2 WLAN x1
+ device ref pcie_rp9 on
+ register "PcieRpClkReqSupport[8]" = "true"
+ register "PcieRpClkReqNumber[8]" = "5"
+ register "PcieRpClkSrcNumber[8]" = "5"
+ register "PcieRpAdvancedErrorReporting[8]" = "true"
+ register "PcieRpLtrEnable[8]" = "true"
+ # M.2 WWAN x1
+ device ref pcie_rp8 on
+ register "PcieRpClkReqSupport[7]" = "true"
+ register "PcieRpClkReqNumber[7]" = "5"
+ register "PcieRpClkSrcNumber[7]" = "5"
+ register "PcieRpAdvancedErrorReporting[7]" = "true"
+ register "PcieRpLtrEnable[7]" = "true"
+ smbios_slot_desc "SlotTypeM2Socket1_DP" "SlotLengthOther" "M.2/A 2230" "SlotDataBusWidth1X"
+ end
+ end