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Leah Rowe
4a6dc5553f
Base revision changed to: commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Date: Fri Jan 5 16:48:17 2024 +0800 mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier Of note: Several out-of-tree ports have been adjusted to use the new SPD config style, where it is defined in devicetree. I manually updated the E6530 patch myself, based on the update that Nicholas did on E6430 (Nicholas will later update the E6530 patch himself, and I'll re-merge the patch). Several upstream patches now exist in this revision, that we were able to remove from lbmk. The heap size patch was reverted upstream, as we did, but see: https://review.coreboot.org/c/coreboot/+/80023 https://review.coreboot.org/c/coreboot/+/79525 Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway). Also included in upstream now: commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94 Author: Bill Xie <persmule@hardenedlinux.org> Date: Sat Oct 7 01:32:51 2023 +0800 drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume Further patches from upstream: commit 432e92688eca0e85cbaebca3232f65936b305a98 Author: Bill Xie <persmule@hardenedlinux.org> Date: Fri Nov 3 12:34:01 2023 +0800 drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum This should fix S3 on GM45 thinkpads. Signed-off-by: Leah Rowe <leah@libreboot.org>
35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From 80ebbfef42454ea0911e5fc3858103d905987ed8 Mon Sep 17 00:00:00 2001
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From: persmule <persmule@gmail.com>
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Date: Sun, 31 Oct 2021 23:33:26 +0000
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Subject: [PATCH 09/30] lenovo/t400: Enable all SATA ports
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There are 2 SATA ports on the chassis of t400(s), but at least one dock for
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t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
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chassis, and another one on its dock.
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They have to be unmasked via device tree to use.
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This patch unmasked all SATA ports found within t400s with factory firmware.
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---
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src/mainboard/lenovo/t400/devicetree.cb | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
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index 259c3e1b21..3d007533a4 100644
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--- a/src/mainboard/lenovo/t400/devicetree.cb
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+++ b/src/mainboard/lenovo/t400/devicetree.cb
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@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
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register "gpe0_en" = "0x01000000"
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register "gpi1_routing" = "2"
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- # Set AHCI mode, enable ports 1 and 2.
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- register "sata_port_map" = "0x03"
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+ # Set AHCI mode, enable ports 1, 2, 5 and 6.
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+ register "sata_port_map" = "0x33"
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register "sata_clock_request" = "0"
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register "sata_traffic_monitor" = "0"
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--
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2.39.2
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