mirror of
https://codeberg.org/libreboot/lbmk.git
synced 2026-07-19 19:23:24 +02:00
Leah Rowe
705149a3e0
coreboot revision: d86260a134575b083f35103e1cd5c7c7ad883bce from 2 August 2023 The patches were updated. HP 8300 USDT has now been merged upstream, so that patch is no longer included in lbmk. SD card fix for E6400 merged upstream, so now it's removed in lbmk. The nvidia E6400 patch (devicetree.cb) has not yet merged upstream. The ifdtool --nuke option has been rebased. Patches as follow-ups to earlier patches removed; for example, patches that set VRAM to 352MB on GM45 have been removed, and replaced with patches that just set 256MB in the first place (this is more stable). This was mostly a clean rebase, of all the patches. It went smooth. I haven't updated cros/haswell yet; the 4.11_branch revision used on fam15h will also remain, for now. The coreboot configurations have been updated, for this new revision of coreboot. Signed-off-by: Leah Rowe <leah@libreboot.org>
35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From bc4ef158c4c6836351a395e8f0ff24f7c6d1f2c6 Mon Sep 17 00:00:00 2001
|
|
From: persmule <persmule@gmail.com>
|
|
Date: Sun, 31 Oct 2021 23:33:26 +0000
|
|
Subject: [PATCH 09/19] lenovo/t400: Enable all SATA ports
|
|
|
|
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
|
|
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
|
|
chassis, and another one on its dock.
|
|
|
|
They have to be unmasked via device tree to use.
|
|
|
|
This patch unmasked all SATA ports found within t400s with factory firmware.
|
|
---
|
|
src/mainboard/lenovo/t400/devicetree.cb | 4 ++--
|
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
|
|
index 259c3e1b21..3d007533a4 100644
|
|
--- a/src/mainboard/lenovo/t400/devicetree.cb
|
|
+++ b/src/mainboard/lenovo/t400/devicetree.cb
|
|
@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
|
|
register "gpe0_en" = "0x01000000"
|
|
register "gpi1_routing" = "2"
|
|
|
|
- # Set AHCI mode, enable ports 1 and 2.
|
|
- register "sata_port_map" = "0x03"
|
|
+ # Set AHCI mode, enable ports 1, 2, 5 and 6.
|
|
+ register "sata_port_map" = "0x33"
|
|
register "sata_clock_request" = "0"
|
|
register "sata_traffic_monitor" = "0"
|
|
|
|
--
|
|
2.39.2
|
|
|