mirror of
https://codeberg.org/libreboot/lbmk.git
synced 2026-07-13 06:49:52 +02:00
Leah Rowe
e91377b509
This brings the following changes from upstream:
* fcd716d9a2 mb/google/ocelot: Limit Power Limit when battery is missing
* d246e2ca7e tests/Makefile.common: Fix inverted USE_SYSTEM_CMOCKA condition
* e64507638e tests/lib/ux_locales-test: Avoid double quotes in CMUnitTest.name
* 4427a34b6b drivers/intel/fsp2_0: Fix string length handling in timestamp printing
* 40dbe0807d Documentation/mb: Add missing entry for starfighter_mtl
* f070e0add8 mb/starlabs/byte_adl: Fix WOL
* fc20f238f6 mb/starlabs/*: Select DRIVERS_EFI_FW_INFO
* 225e635ea1 soc/amd/common/block/spi: Operate on multiple SPI flashes
* b9bd924847 soc/amd/common/block/spi: Implement boot_device_spi_cs()
* d7d4b67c6a commonlib/mipi/cmd: Remove unnecessary 'const void *' cast
* 5af56ddf92 mb/google/skywalker: Implement lb_board() to pass LB_TAG_PANEL_POWEROFF
* d110cf4669 commonlib/mipi/cmd: Add mipi_panel_get_commands_len()
* 0ee48a475c drivers/mipi: Add power-off commands for TM_TL121BVMS07_00C
* a974b7668e soc/intel/*: Disable InternalGfx w/o iGPU to prevent FSP-M/S crash
* 18ffcafa61 mb/google/bluey/quartz: Adjust PS8820 init sequence
* 532543027a mb/siemens/{mc_ehl6,mc_ehl7}: Configure GPIO GPP_G5 (SD CD) pull-up
* d420e1fb87 mb/siemens/mc_ehl8: Switch from LPSS UART to legacy 8250 I/O UART
* 483c3e51ae mb/siemens/mc_ehl8: Configure I2C and SMB devices
* d810257008 mb/siemens/mc_ehl8: Configure PCIe root ports
* cf2c2555f4 mb/siemens/mc_ehl8: Add new board variant based on mc_ehl1
* a12663fd88 drivers/spi: Allow SoC to provide the SPI flash CS index
* cacc11de4f include/cpu/x86/msr.h: Update return types from int -> bool
* d5fb4becd5 mb/google/nissa/var/yavilla: Update DTT parameters
* 3b18467e8a payloads/ipxe: Unconditionally restore config files post-build
* 4374bbd37b payloads/ipxe: Update and use the stable version
* c0998983d0 ec/google/chromeec: Fix uninitialized buffer in cbi_get_uint32()
* 03b47f947f soc/mediatek: Add mtk_get_mipi_panel_data() API
* 8cfc71d9e0 libpayload: Pass panel power-off commands to payloads
* d94d4b8a25 mb/starlabs/starlite_adl: Add trace length for the card reader
* 0f450a8d9c mb/starlabs/starlite: Set card_reader fallback value to 0
* 94672e2b45 sb/intel/ibexpeak: Remove 6/7 series chipset PCI IDs
* 2fc8051679 util/autoport: Factor out getting sorted Kconfig option names
* 01d82febb2 util/autoport: Separate handling of Kconfig selects
* b7763a5973 mb/google/fatcat: Implement Google Rex touchscreen integration
* 3f5807ce10 mb/siemens/mc_ehl7: Deactivate SATA interface
* 5f76f78383 mb/siemens/mc_ehl7: Deactivate GbE and PSE GbE 0
* b5ad97a268 mb/google/nissa/var/gothrax: Add wifi sar table
* 7351e663d2 mb/google/nissa: Enable early EC SW sync & eSOL for gothrax/epic
* f9b917d391 soc/qualcomm/x1p42100: Relocate CBMEM top below XBL log
* a306987ae4 util/superiotool: Add experimental Nuvoton NPCD378 support
* 139f6c3e64 mb/google/brya/var/redrix: Configure cameras for Windows/Linux ACPI mode
* 3883118ed9 mb/google/brya/var/kano: Configure cameras for Windows/Linux ACPI mode
* ae7b75fb0d mb/lenovo/sklkbl_thinkpad/cfr.c: Fix X280 build error
* 7639118729 drivers/amd/opensil: Add hooks to populate CBMEM_ID_MEMINFO
* 23f0b0b313 util/xcompile/xcompile: Fix clang target parameter
* f712c965e4 payloads/edk2: Update default MrChromebox branch from 2508 to 2511
* b4917ed44d payloads/edk2: rework serial output configuration
* 282c27c95c arch/x86/acpi_bert_storage.c: Allow vendor specific BERT entries
* 00fbc08b76 Reapply "soc/mediatek/mt8196: Call fsp_init via boot state"
* e6c5ee6450 mb/google/hatch/var/kohaku: Add Samsung S-pen driver support
* b890ca0648 mb/google/brya/var/yaviks: select USE_MTCL only if CHROMEOS
* a8737c5f86 mb/google/cyan: Set CBFS_SIZE default to match IFD BIOS size
* 72af15f1de mb/google/zork: Fix missing comma in CFR object list
* 5db16ea6fc soc/intel/pantherlake: Fix incorrect use of logical OR for TDP selection
* 2c58e525e8 soc/intel/ptl: Add ACPI IOST support
* 52aeb078ce soc/intel/common/acpi: Add IOST device
* d62764df87 soc/intel/common/block/p2sb: Add SSDT function for SoC-specific features
* 96b4754c35 soc/intel: Add CPU ID support for Nova Lake
* b741e2274e acpi: Add enums for TPM2 start method
* 6fd865f409 drivers/amd/ftpm: Add fTPM driver for PSP emulated CRB TPMs
* c09352d58d soc/intel/pantherlake: Update PS1 threshold to the latest recommendations
* 093ae8eeaa mb/siemens/mc_ehl7: Enable reboot after HW Watchdog expiry
* ddf4748c22 mb/siemens/mc_ehl7: Deactivate RTC
* e8ac9ffcd9 mb/siemens/mc_ehl7: Add new board variant based on mc_ehl6
* 94e6e5cd0d mb/google/ocelot: Add option to enable VGA mode 12
* fbf0087918 mb/google/ocelot/var/ocicat: Use GPP_F10 for ISH
* f2788e963f device: Rename PCI_EXP_SEC_CAP_ID -> PCI_CAP_ID_SEC_PCIE
* e01baafbe2 include/cper.h: Add check information structures
* a6407000f1 mipi/panel: Add 'poweroff' field to panel_serializable_data
* b4fbc59c6f treewide: Move mipi_panel_parse_commands() to commonlib
* 1d2b399fd7 lib: Rename `fill_lb_framebuffer` to `get_lb_framebuffer`
* 5f86aba4b3 soc/intel/common: Enable high address support for MCHBAR in ACPI
* f00a2ff7b8 arch/x86/ioapic.c: Support 8-bit IOAPIC IDs
* 3c3fbbaabf arch/x86/acpi_bert_storage.c: Remove unused variable
* 9f4132712f soc/intel/alderlake: add chipsetinit support
* a5c0307e9c commonlib/device_tree: Add dt_add_reserved_memory_region helper
* a3a556f05d mb/google/fatcat/var/ruby: Add wifi SAR table
* 8bc1372f72 sb/intel/common/spi: Prevent transfers across 4KiB boundaries
* 95ad028274 drivers/smmstore: Use lookup_store() for memory-mapped reads
* c421847fe2 util/crossgcc: Fix GNAT detection for gnat-15
* 292d7b9d3d Revert "soc/mediatek/mt8196: Call fsp_init via boot state"
* e705c39009 libpayload/arch/arm64/mmu: Add CB_MEM_TAG to usedmem_ranges
* 18a986c5fe soc/amd/cmn/block/cpu/mca: Support MCA_SYND1 and MCA_SYND2
* c45e153dfb mb/google/bluey/var/quartz: Enable PS8820 support
* e303357cb9 soc/qualcomm/x1p42100: Call mainboard Type-C config hook
* f9efe53cb0 mb/google/bluey: Implement PS8820 retimer configuration
* 657bcd32d9 mb/google/bluey: Add Kconfig for PS8820 retimer support
* 17a52ce94e soc/qualcomm/x1p42100: Add mainboard USB Type-C config hook
* 16cb8d0d0c mb/google/bluey: Add power sequencing for USB-C1 retimer
* 5034f8629f soc/intel/common: Add spinlock protection to fast SPI flash operations
* ceaa41c9e4 drv/intel/mipi_camera: Verify SSDB only for camera sensors
* ede97ef9da mb/google/volteer: Add IPUA device and sensor names
* 65cbf312af mb/google/volteer: Convert MIPI camera cfg from static ASL to devicetree
* 2aca802e85 mb/google/brya/acpi/cnvi_bt_reset: Fix BT re-enumeration under Windows
* 524ad684af mb/google/brya/var/taeko: Fix SOF speaker topology selection
* 829b8be432 libpayload: Add bulk with timeout callback to USB
* f4fe5514fe mb/google/ocelot/var/kodkod: Update gpio settings for NC pins
* c7f0697867 coreboot_tables: Add new CBMEM ID to hold the PCI RB aperture info
* 3ded43722a soc/amd/cmn/block/acpi/ivrs: Use less PCI accesses
* 1da7c31810 include/cpu/x86/msr.h: Add MCA related MSRs
* 7deb82d744 mb/google/bluey: Configure QUPV3_0_SE3 and QUPV3_0_SE7 for USB-C0 and USB-C1 Retimer I2C access
* b00d2ad5c2 vc/intel/fsp/fsp2_0/pantherlake: Update PTL FSP headers to FSP 3442.07
* b7ad850fd6 mb/google/bluey: Add percentage symbol to battery level log
* ae48ff8c0b drivers/wwan/fm: Use _EVT method to enhance GPIO event handling
* 7ed7abbd92 acpigen_ps2_keybd: map screenlock
* 6b52f82df2 util/amdfwtool: Remove AMD_FW_GFXIMU_2 entry
* b9145e1588 util/amdfwtool: Remove duplicated AMD_TA_IKEK
* e393fd00a4 include/cper.h: Update cper_ia32x64_context_t
* 14a7a2315e soc/mediatek/mt8196: Call fsp_init via boot state
* 82f9c593ab payloads/libpayload: Add support for RISC-V 64-bit architecture
* 4decc72c23 drivers/intel/touch: Change ELAN device name for Google's Rex touch device
* 17b36286c8 mb/google/hatch/var/kindred: Drop VBT for KLED variant
* cf280eaa7f amdblocks/root_complex.h: Add new IOHC base addresses
* ba0483c94a soc/amd/common/Makefile.mk: Strip quotes from AMDFW_CONFIG_FILE
* b2b1eb3c5a soc/amd/common/block/smn: Add simple SMN I/O accessors
* f8c10eda36 mb/google/nissa/var/gothrax: Add Rayson parts to RAM ID table
* 0c26c4494d mainboard/google/bluey: Enable display clocks and MMCX power rail
* e1e7b9b203 soc/qualcomm/x1p42100: Add API to enable display clocks
* 02e6f2a214 soc/qualcomm/x1p42100: Add API to intialize RPMh resources for display
* dc162f84be soc/qualcomm/common: Add RPMh driver support
* 999dd8905a lib/bootmem: Replace conditional return with assert in bootmem_add_range_from
* eb814f3b12 lib/bootmem: Remove forward declaration of bootmem_range_string
* 6f394ce50d coreboot_tables: Update CB_MEM_TAG and LB_MEM_TAG values to 17
* 6966885290 mb/google/skywalker: Extend MIPI panel delay to meet T3 timing
* 273e84976b mb/asus/p8z77-v: Apply vendor PCH interrupt mapping
* 573c37a518 sio/nuvoton/common: Refactor nuvoton_pnp_*_config_state()
* 0c2a3002d9 mb/asrock/z87_extreme4: Temporarily refactor nuvoton_pnp_*_conf_state()
* 19deb55f02 mb/asrock/fatal1ty_z87_professional: Temporarily refactor nuvoton_pnp_*()
* 3d980dae22 mb/google/nissa/var/rull: Add 3 DDR modules to RAM id table
* 4030fc5f91 device/Kconfig: Gate early libgfxinit default on ChromeOS
* b8402a8dfc src/qualcomm/common: Remove display buffer region declarations
* 7896d94c76 soc/qualcomm/x1p42100: Avoid reserving display buffer region
* fe0e14d716 soc/qualcomm/x1p42100: Skip SHRM meta firmware load in ramdump mode
* 56013ce0ff mainboard/google/bluey: Skip SHRM firmware load/reset in ramdump mode
* b8680d53ac mb/google/ocelot/var/ocicat: Add fw_config definitions with UFSC
* c3ff1addde mb/google/ocelot/var/ocicat: Add WIFI SAR table
* 9b5d985838 mb/google/ocelot/var/ocicat: Update audio settings
* 091e8140ea spd/lp5: Add SPD for RS1G32LO5D2FDB-23BT
* bc240baba5 Documentation: Add method for GRUB2 to load seabios from drive
* 02c57577f3 superio/nuvoton: Add common ACPI ASL code
* 7273a5b932 mb/asus/p8x7x-series: Move CONFIG_SUPERIO_PNP_BASE to sio/nuvoton
* 40eca2934f soc/mediatek/common: Track firmware splash screen rendering completion
* 49d34a6f6c mb/google/skywalker: Add MIPI panel GPIOs via lb_gpio
* b354b49d58 libpayload: Increase SYSINFO_MAX_GPIOS to 10
* 25d159a7ec mb/google/skywalker: Use FW_CONFIG for storage and dual init support
* 4063a4c3f1 mb/google/skywalker: Create variant Mace
* a1e9cd3669 mb/google/bluey: Configure QUPV3_2_SE4 for ADSP I2C access
* 2b9653cf34 arch/x86/acpi_bert_storage.c: rename check -> proc_err_info
* a3236ef110 arch/x86/acpi_bert_storage.c: Fix array size calculation
* e3fc4a1f69 ec/starlabs/merlin: Reorganize Kconfig and guard options properly
* 4a07174d0e util/cbfstool: Fix RISC-V relocations
* d912ae91b0 mb/google/bluey: Configure GPIOs for USB camera
* a27a7f0c11 mb/google/trulo/var/kaladin: Decrease G2 touch stop delay time to 150 ms
* 3bebadd347 mb/google/bluey: Enable dynamic SoC calculation and log battery level
* bab8ca2bd0 ec/google/chromeec: Refactor Battery SoC calculation
* 02b3674198 ec/google/chromeec: Add SoC calculation from battery dynamic info
* 06c83d473b ec/google/chromeec: Add function to read battery state of charge
* 7c3d45d94f drivers/usb/intel_bluetooth: Correct S-state level for power resource
* 091ac10059 soc/intel/cnvi: Correct S-state level for CNVP
* 4631f94e51 drivers/usb/intel_bluetooth: Advertise D2 for S0W
* ea045bd322 soc/intel/cnvi: Re-enable Bluetooth on reset timeout
* ffac7d90da soc/intel/cnvi: Correct error values for _RST
* f24a2f35bf mb/asrock: Correct vendor name ASROCK to ASRock
* aeb9dcf2fa libpayload: Add new memory type CB_MEM_TAG
* c093b52c20 soc/mediatek: Correct BIAS_ON value to get bias ready
* 531c24cd0a Documentation: Fix typo in 'particularly'
* 331e93cbd2 libpayload/tests: Disable generation of lcov HTML
* 7d38a96c44 mb/google/skywalker: Create variant Vader
* 75333ea7c8 mb/google/bluey: Refactor is_pd_sync_required function
* 3f00ecb05c soc/intel/pantherlake: Add ChromeOS board-specific TDP setting
* 1dfa80f02c soc/intel/pantherlake: Add configurable TDP support
* dc68f5b265 soc/intel/pantherlake: Let common code set PL1 to TDP
* bb3f40627d util/autoport: Fix style issue in generated code
* 94b326469b mb/google/bluey: Increase FW_MAIN_A/B slot size to 8.5MB
* e6c3250912 mipi/panel: Remove pic_width and pic_height from dsc_config
* 456403d9ba soc/mediatek/mt8196: Stop using dsc_config.pic_width
* 7d50f63213 soc/mediatek: Drop mtk_ddp_soc_mode_set()
* 61c9450d62 soc/mediatek/common: Pass dsi_regs to mtk_dsi_cphy_timing()
* ba5b5ea406 soc/mediatek/mt8196: Move DPM and SPM initialization
* 206025754f libpayload/tests: Remove unrecognized flag --ignore-errors inconsistent
* 82c06da584 3rdparty/fsp: Update to upstream master
* c5eecee5e9 mb/google/rex: Add IPUA device and sensor names
* bceb2c83ad mb/{google/intel}: Fix/add missing MIPI camera SSDB lanes_used/link_used
* de4148888c tests: Disable generation of lcov HTML
* 188cd88ac7 soc/mediatek/mt8196: Correct MIPI register control
* 080ca011fe Documentation: Finalize 25.12 release notes
* 695041a9bf mb/starlabs/*: Increase size of SMMSTORE region to 512KB
* 975e48faaf mb/starlabs/starlite_adl: Add CFR option for charge LED brightness
* 951c28c1bf mb/starlabs/starfighter: Add CFR options for power/charge LED brightness
* ab2c69c4f3 mb/starlabs/starbook: Add CFR options for power/charge LED brightness
* 84ff3d3d12 ec/starlabs/merlin: Add charge LED brightness control
* ac170631d5 mb/starlabs/starlite: Fix ddr5 entry
* 0e217cf1d3 soc/mediatek/mt8196: Increase FRAMEBUFFER to 32MiB
* 003ea85115 soc/mediatek/mt8196: Support logo display on DISP_PATH_DUAL_MIPI path
* 7e7ba6fb11 security/lockdown/lockdown.c: option to lock COREBOOT and BOOTBLOCK
* 56a7ae4389 soc/mediatek/mt8196: Notify MCUPM to support MTE
* 7c7feca258 CBFS verification: support Top Swap redundancy
* 739808011a Makefile.mk: don't add bootblock after other files
* cbac0d7a25 Makefile.mk,cpu/intel/fit/Makefile.mk: introduce CBFS_REGIONS
* f773a0faac cpu/intel/fit/Makefile.mk: make FIT in TOPSWAP point at MCU in COREBOOT_TS
* fa80ab0146 src/Kconfig: add MAINBOARD_NEEDS_CMOS_OPTIONS
* 59d438f5c7 mb/google/bluey: Remove GSCVD region from Bluey and BlueyH variants
* 7c4d9e0862 mb/google/*: Update Kconfig names with all known board names
* 35be1ab679 configs: Build test ramstage zstd compressed
* 2d99da12a9 commonlib/bsd: Add zstd support
* 4ca5e9c8c6 rules.h: Add ENV_RAMSTAGE_LOADER
* 0421ef2cd8 util/cbfstool: Add zstd support
* 0302b2ee07 lib/xxhash: Move to commonlib/bsd
* 76e9635346 amdfwread: Parse and print directory sizes
* a3adf4898b mb/google/brya/var/pujjocento: Add 2 Micron modules to RAM id table
* d1e1003217 spd/lp5: Add SPD for MT62F2G32D4DS-031RFWT:C
* d528561130 mb/google/bluey: Use PMIC for off-mode detection
* 65833355ca tests: Disable gcov warnings
* 060d18f070 soc/mediatek/mt8196: Add DSI dual channel
Signed-off-by: Leah Rowe <leah@libreboot.org>
598 lines
16 KiB
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598 lines
16 KiB
Plaintext
#
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# Automatically generated file; DO NOT EDIT.
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# coreboot configuration
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#
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#
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# General setup
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#
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CONFIG_LOCALVERSION=""
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CONFIG_CBFS_PREFIX="fallback"
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CONFIG_COMPILER_GCC=y
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# CONFIG_COMPILER_LLVM_CLANG is not set
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# CONFIG_ANY_TOOLCHAIN is not set
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# CONFIG_CCACHE is not set
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# CONFIG_LTO is not set
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# CONFIG_IWYU is not set
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# CONFIG_FMD_GENPARSER is not set
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# CONFIG_UTIL_GENPARSER is not set
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# CONFIG_OPTION_BACKEND_NONE is not set
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CONFIG_USE_OPTION_TABLE=y
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# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
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CONFIG_STATIC_OPTION_TABLE=y
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CONFIG_COMPRESS_RAMSTAGE_LZMA=y
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# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
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# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
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CONFIG_SEPARATE_ROMSTAGE=y
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CONFIG_INCLUDE_CONFIG_FILE=y
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CONFIG_COLLECT_TIMESTAMPS=y
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# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
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CONFIG_USE_BLOBS=y
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# CONFIG_USE_AMD_BLOBS is not set
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# CONFIG_USE_QC_BLOBS is not set
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# CONFIG_COVERAGE is not set
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# CONFIG_UBSAN is not set
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CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
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# CONFIG_ASAN is not set
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# CONFIG_NO_STAGE_CACHE is not set
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CONFIG_TSEG_STAGE_CACHE=y
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# CONFIG_UPDATE_IMAGE is not set
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# CONFIG_BOOTSPLASH_IMAGE is not set
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#
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# Software Bill Of Materials (SBOM)
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#
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# CONFIG_SBOM is not set
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# end of Software Bill Of Materials (SBOM)
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# end of General setup
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#
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# Mainboard
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#
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#
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# Important: Run 'make distclean' before switching boards
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#
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# CONFIG_VENDOR_51NB is not set
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# CONFIG_VENDOR_ACER is not set
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# CONFIG_VENDOR_AMD is not set
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# CONFIG_VENDOR_AOOSTAR is not set
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# CONFIG_VENDOR_AOPEN is not set
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CONFIG_VENDOR_APPLE=y
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# CONFIG_VENDOR_ARM is not set
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# CONFIG_VENDOR_ASROCK is not set
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# CONFIG_VENDOR_ASUS is not set
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# CONFIG_VENDOR_BIOSTAR is not set
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# CONFIG_VENDOR_BOSTENTECH is not set
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# CONFIG_VENDOR_BYTEDANCE is not set
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# CONFIG_VENDOR_CAVIUM is not set
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# CONFIG_VENDOR_CLEVO is not set
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# CONFIG_VENDOR_COMPULAB is not set
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# CONFIG_VENDOR_CWWK is not set
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# CONFIG_VENDOR_DELL is not set
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# CONFIG_VENDOR_EMULATION is not set
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# CONFIG_VENDOR_ERYING is not set
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# CONFIG_VENDOR_EXAMPLE is not set
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# CONFIG_VENDOR_FACEBOOK is not set
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# CONFIG_VENDOR_FOXCONN is not set
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# CONFIG_VENDOR_FRAMEWORK is not set
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# CONFIG_VENDOR_GETAC is not set
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# CONFIG_VENDOR_GIGABYTE is not set
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# CONFIG_VENDOR_GOOGLE is not set
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# CONFIG_VENDOR_HARDKERNEL is not set
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# CONFIG_VENDOR_HP is not set
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# CONFIG_VENDOR_IBASE is not set
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# CONFIG_VENDOR_IBM is not set
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# CONFIG_VENDOR_INTEL is not set
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# CONFIG_VENDOR_INVENTEC is not set
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# CONFIG_VENDOR_KONTRON is not set
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# CONFIG_VENDOR_LATTEPANDA is not set
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# CONFIG_VENDOR_LENOVO is not set
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# CONFIG_VENDOR_LIBRETREND is not set
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# CONFIG_VENDOR_MITAC_COMPUTING is not set
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# CONFIG_VENDOR_MSI is not set
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# CONFIG_VENDOR_NOVACUSTOM is not set
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# CONFIG_VENDOR_OCP is not set
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# CONFIG_VENDOR_OPENCELLULAR is not set
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# CONFIG_VENDOR_PACKARDBELL is not set
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# CONFIG_VENDOR_PCENGINES is not set
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# CONFIG_VENDOR_PINE64 is not set
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# CONFIG_VENDOR_PORTWELL is not set
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# CONFIG_VENDOR_PRODRIVE is not set
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# CONFIG_VENDOR_PROTECTLI is not set
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# CONFIG_VENDOR_PURISM is not set
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# CONFIG_VENDOR_RAPTOR_CS is not set
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# CONFIG_VENDOR_RAZER is not set
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# CONFIG_VENDOR_RODA is not set
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# CONFIG_VENDOR_SAMSUNG is not set
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# CONFIG_VENDOR_SAPPHIRE is not set
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# CONFIG_VENDOR_SIEMENS is not set
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# CONFIG_VENDOR_SIFIVE is not set
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# CONFIG_VENDOR_STARLABS is not set
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# CONFIG_VENDOR_SUPERMICRO is not set
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# CONFIG_VENDOR_SYSTEM76 is not set
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# CONFIG_VENDOR_TI is not set
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# CONFIG_VENDOR_TOPTON is not set
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# CONFIG_VENDOR_UP is not set
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# CONFIG_VENDOR_VIA is not set
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CONFIG_BOARD_SPECIFIC_OPTIONS=y
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CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1"
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CONFIG_MAINBOARD_VERSION="1.0"
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CONFIG_MAINBOARD_DIR="apple/macbook21"
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CONFIG_VGA_BIOS_ID="8086,27a2"
|
|
CONFIG_DIMM_MAX=4
|
|
CONFIG_DIMM_SPD_SIZE=256
|
|
CONFIG_FMDFILE=""
|
|
# CONFIG_NO_POST is not set
|
|
CONFIG_MAINBOARD_VENDOR="Apple"
|
|
CONFIG_CBFS_SIZE=0x00200000
|
|
CONFIG_MAX_CPUS=2
|
|
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
|
CONFIG_POST_DEVICE=y
|
|
CONFIG_POST_IO=y
|
|
CONFIG_OVERRIDE_DEVICETREE=""
|
|
CONFIG_DEVICETREE="devicetree.cb"
|
|
# CONFIG_VBOOT is not set
|
|
# CONFIG_VGA_BIOS is not set
|
|
# CONFIG_PCIEXP_ASPM is not set
|
|
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
|
# CONFIG_PCIEXP_CLK_PM is not set
|
|
CONFIG_BOARD_APPLE_MACBOOK21=y
|
|
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
|
|
# CONFIG_BOARD_APPLE_IMAC52 is not set
|
|
# CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
|
|
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
|
|
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
|
|
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
|
|
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
|
# CONFIG_FATAL_ASSERTS is not set
|
|
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
|
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
|
|
# CONFIG_CONSOLE_POST is not set
|
|
CONFIG_MAX_SOCKET=1
|
|
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
|
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
|
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
|
CONFIG_DCACHE_RAM_BASE=0xfefc0000
|
|
CONFIG_DCACHE_RAM_SIZE=0x8000
|
|
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
|
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
|
|
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
|
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
|
CONFIG_SPI_FLASH_WINBOND=y
|
|
# CONFIG_DRIVERS_INTEL_WIFI is not set
|
|
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
|
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
|
CONFIG_SPI_FLASH_GIGADEVICE=y
|
|
CONFIG_SPI_FLASH_STMICRO=y
|
|
# CONFIG_DEBUG_SMI is not set
|
|
CONFIG_PCIEXP_HOTPLUG_BUSES=8
|
|
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
|
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
|
|
CONFIG_PS2K_EISAID="PNP0303"
|
|
CONFIG_PS2M_EISAID="PNP0F13"
|
|
CONFIG_D3COLD_SUPPORT=y
|
|
# CONFIG_DRIVERS_UART_8250IO is not set
|
|
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
|
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
|
CONFIG_HEAP_SIZE=0x100000
|
|
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
|
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
|
CONFIG_COREBOOT_ROMSIZE_KB_2048=y
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
|
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
|
CONFIG_COREBOOT_ROMSIZE_KB=2048
|
|
CONFIG_ROM_SIZE=0x00200000
|
|
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
|
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
|
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
|
|
# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
|
|
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
|
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
|
|
# end of Mainboard
|
|
|
|
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
|
|
|
#
|
|
# Chipset
|
|
#
|
|
|
|
#
|
|
# SoC
|
|
#
|
|
CONFIG_CHIPSET_DEVICETREE=""
|
|
CONFIG_CBFS_MCACHE_SIZE=0x4000
|
|
CONFIG_ROMSTAGE_ADDR=0x2000000
|
|
CONFIG_VERSTAGE_ADDR=0x2000000
|
|
CONFIG_SMM_RESERVED_SIZE=0x100000
|
|
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
|
CONFIG_CPU_PT_ROM_MAP_GB=4
|
|
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
|
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
|
CONFIG_EHCI_BAR=0xfef00000
|
|
CONFIG_ACPI_CPU_STRING="CP%02X"
|
|
CONFIG_STACK_SIZE=0x2000
|
|
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
|
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
|
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
|
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
|
CONFIG_BOOTBLOCK_IN_CBFS=y
|
|
CONFIG_HPET_MIN_TICKS=0x80
|
|
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
|
|
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
|
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
|
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
|
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
|
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
|
CONFIG_CBFS_CACHE_ALIGN=8
|
|
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
|
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
|
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
|
CONFIG_INTEL_HAS_TOP_SWAP=y
|
|
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
|
|
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
|
|
# CONFIG_TOP_SWAP_REDUNDANCY is not set
|
|
|
|
#
|
|
# CPU
|
|
#
|
|
CONFIG_CPU_INTEL_MODEL_6EX=y
|
|
CONFIG_CPU_INTEL_MODEL_6FX=y
|
|
CONFIG_CPU_INTEL_SOCKET_M=y
|
|
CONFIG_CPU_INTEL_COMMON=y
|
|
CONFIG_ENABLE_VMX=y
|
|
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
|
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
|
CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
|
|
CONFIG_CPU_INTEL_COMMON_SMM=y
|
|
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
|
CONFIG_PARALLEL_MP=y
|
|
CONFIG_XAPIC_ONLY=y
|
|
# CONFIG_X2APIC_ONLY is not set
|
|
# CONFIG_X2APIC_RUNTIME is not set
|
|
# CONFIG_X2APIC_LATE_WORKAROUND is not set
|
|
CONFIG_UDELAY_TSC=y
|
|
CONFIG_TSC_MONOTONIC_TIMER=y
|
|
CONFIG_TSC_SYNC_MFENCE=y
|
|
CONFIG_SETUP_XIP_CACHE=y
|
|
CONFIG_HAVE_SMI_HANDLER=y
|
|
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
|
CONFIG_SMM_TSEG=y
|
|
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
|
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
|
CONFIG_AP_STACK_SIZE=0x800
|
|
CONFIG_SMP=y
|
|
CONFIG_SSE=y
|
|
CONFIG_SSE2=y
|
|
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
|
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
|
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
|
|
|
#
|
|
# Northbridge
|
|
#
|
|
CONFIG_NORTHBRIDGE_INTEL_I945=y
|
|
CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM=y
|
|
CONFIG_I945_LVDS=y
|
|
|
|
#
|
|
# Southbridge
|
|
#
|
|
CONFIG_PCIEXP_HOTPLUG=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
|
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
|
|
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
|
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
|
|
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
|
CONFIG_RCBA_LENGTH=0x4000
|
|
|
|
#
|
|
# Super I/O
|
|
#
|
|
|
|
#
|
|
# Embedded Controllers
|
|
#
|
|
CONFIG_EC_ACPI=y
|
|
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
|
CONFIG_ARCH_X86=y
|
|
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
|
CONFIG_ARCH_VERSTAGE_X86_32=y
|
|
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
|
CONFIG_ARCH_POSTCAR_X86_32=y
|
|
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
|
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
|
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
|
CONFIG_AP_IN_SIPI_WAIT=y
|
|
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
|
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
|
CONFIG_PC80_SYSTEM=y
|
|
CONFIG_HAVE_CMOS_DEFAULT=y
|
|
CONFIG_POSTCAR_STAGE=y
|
|
CONFIG_BOOTBLOCK_SIMPLE=y
|
|
# CONFIG_BOOTBLOCK_NORMAL is not set
|
|
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
|
CONFIG_HAVE_CF9_RESET=y
|
|
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
|
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
|
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
|
|
CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
|
|
CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
|
|
CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
|
|
CONFIG_DEFAULT_EBDA_SIZE=0x400
|
|
# end of Chipset
|
|
|
|
#
|
|
# Devices
|
|
#
|
|
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
|
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
|
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
|
|
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
|
|
# CONFIG_VGA_ROM_RUN is not set
|
|
# CONFIG_NO_GFX_INIT is not set
|
|
CONFIG_NO_EARLY_GFX_INIT=y
|
|
|
|
#
|
|
# Display
|
|
#
|
|
CONFIG_VGA_TEXT_FRAMEBUFFER=y
|
|
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
|
|
CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
|
|
# end of Display
|
|
|
|
CONFIG_PCI=y
|
|
CONFIG_ECAM_MMCONF_SUPPORT=y
|
|
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
|
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
|
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
|
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
|
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
|
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
|
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
|
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
|
|
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
|
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
|
|
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
|
|
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
|
# CONFIG_EARLY_PCI_BRIDGE is not set
|
|
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
|
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
|
# CONFIG_INTEL_GMA_ADD_VBT is not set
|
|
# CONFIG_SOFTWARE_I2C is not set
|
|
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
|
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
|
|
CONFIG_DRAM_SUPPORT_DDR2=y
|
|
# end of Devices
|
|
|
|
#
|
|
# Generic Drivers
|
|
#
|
|
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
|
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
|
# CONFIG_ELOG is not set
|
|
# CONFIG_DRIVERS_HWID_DMI is not set
|
|
# CONFIG_DRIVERS_OPTION_CFR is not set
|
|
# CONFIG_SMMSTORE is not set
|
|
CONFIG_SPI_FLASH=y
|
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
|
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
|
CONFIG_SPI_FLASH_ADESTO=y
|
|
CONFIG_SPI_FLASH_AMIC=y
|
|
CONFIG_SPI_FLASH_ATMEL=y
|
|
CONFIG_SPI_FLASH_EON=y
|
|
CONFIG_SPI_FLASH_MACRONIX=y
|
|
CONFIG_SPI_FLASH_SPANSION=y
|
|
CONFIG_SPI_FLASH_SST=y
|
|
CONFIG_SPI_FLASH_ISSI=y
|
|
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
|
CONFIG_HAVE_USBDEBUG=y
|
|
# CONFIG_USBDEBUG is not set
|
|
# CONFIG_VPD is not set
|
|
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
|
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
|
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
|
CONFIG_DRIVERS_I2C_CK505=y
|
|
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
|
CONFIG_INTEL_EDID=y
|
|
CONFIG_INTEL_INT15=y
|
|
CONFIG_INTEL_GMA_ACPI=y
|
|
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
|
|
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
|
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
|
CONFIG_DRIVERS_MC146818=y
|
|
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
|
|
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
|
|
CONFIG_VGA=y
|
|
# CONFIG_DRIVERS_SIL_3114 is not set
|
|
CONFIG_DRIVERS_WIFI_GENERIC=y
|
|
CONFIG_DRIVERS_MTK_WIFI=y
|
|
# end of Generic Drivers
|
|
|
|
#
|
|
# Security
|
|
#
|
|
|
|
#
|
|
# CBFS verification
|
|
#
|
|
# CONFIG_CBFS_VERIFICATION is not set
|
|
# end of CBFS verification
|
|
|
|
#
|
|
# Verified Boot (vboot)
|
|
#
|
|
# end of Verified Boot (vboot)
|
|
|
|
#
|
|
# Trusted Platform Module
|
|
#
|
|
CONFIG_NO_TPM=y
|
|
CONFIG_PCR_BOOT_MODE=1
|
|
CONFIG_PCR_HWID=1
|
|
CONFIG_PCR_SRTM=2
|
|
CONFIG_PCR_FW_VER=10
|
|
CONFIG_PCR_RUNTIME_DATA=3
|
|
# end of Trusted Platform Module
|
|
|
|
#
|
|
# Memory initialization
|
|
#
|
|
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
|
CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
|
|
# end of Memory initialization
|
|
|
|
# CONFIG_STM is not set
|
|
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
|
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
|
# CONFIG_BOOTMEDIA_SMM_BWP is not set
|
|
# end of Security
|
|
|
|
CONFIG_ACPI_HAVE_PCAT_8259=y
|
|
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
|
CONFIG_ACPI_SOC_NVS=y
|
|
CONFIG_ACPI_NO_CUSTOM_MADT=y
|
|
CONFIG_ACPI_COMMON_MADT_LAPIC=y
|
|
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
|
|
CONFIG_HAVE_ACPI_TABLES=y
|
|
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
|
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
|
|
|
#
|
|
# Console
|
|
#
|
|
CONFIG_BOOTBLOCK_CONSOLE=y
|
|
CONFIG_POSTCAR_CONSOLE=y
|
|
CONFIG_SQUELCH_EARLY_SMP=y
|
|
# CONFIG_SPKMODEM is not set
|
|
# CONFIG_CONSOLE_NE2K is not set
|
|
CONFIG_CONSOLE_CBMEM=y
|
|
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
|
# CONFIG_CONSOLE_SPI_FLASH is not set
|
|
# CONFIG_CONSOLE_I2C_SMBUS is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
|
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
|
|
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
|
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
|
# CONFIG_CMOS_POST is not set
|
|
CONFIG_POST_DEVICE_NONE=y
|
|
# CONFIG_POST_DEVICE_LPC is not set
|
|
# CONFIG_POST_DEVICE_PCI_PCIE is not set
|
|
CONFIG_POST_IO_PORT=0x80
|
|
CONFIG_HWBASE_DEBUG_NULL=y
|
|
# end of Console
|
|
|
|
CONFIG_HAVE_ACPI_RESUME=y
|
|
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
|
CONFIG_HAVE_MONOTONIC_TIMER=y
|
|
CONFIG_HAVE_OPTION_TABLE=y
|
|
CONFIG_IOAPIC=y
|
|
CONFIG_USE_WATCHDOG_ON_BOOT=y
|
|
CONFIG_HAVE_MP_TABLE=y
|
|
|
|
#
|
|
# System tables
|
|
#
|
|
CONFIG_GENERATE_MP_TABLE=y
|
|
CONFIG_GENERATE_SMBIOS_TABLES=y
|
|
CONFIG_BIOS_VENDOR="coreboot"
|
|
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
|
# end of System tables
|
|
|
|
#
|
|
# Payload
|
|
#
|
|
CONFIG_PAYLOAD_NONE=y
|
|
# end of Payload
|
|
|
|
#
|
|
# Debugging
|
|
#
|
|
|
|
#
|
|
# CPU Debug Settings
|
|
#
|
|
# CONFIG_DISPLAY_MTRRS is not set
|
|
|
|
#
|
|
# Vendorcode Debug Settings
|
|
#
|
|
|
|
#
|
|
# BLOB Debug Settings
|
|
#
|
|
|
|
#
|
|
# General Debug Settings
|
|
#
|
|
# CONFIG_DEBUG_CBFS is not set
|
|
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
|
# CONFIG_DEBUG_RAM_SETUP is not set
|
|
CONFIG_HAVE_DEBUG_SMBUS=y
|
|
# CONFIG_DEBUG_SMBUS is not set
|
|
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
|
# CONFIG_DEBUG_SPI_FLASH is not set
|
|
# CONFIG_DEBUG_BOOT_STATE is not set
|
|
# CONFIG_DEBUG_ADA_CODE is not set
|
|
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
|
|
# end of Debugging
|
|
|
|
CONFIG_DECOMPRESS_OFAST=y
|
|
|
|
#
|
|
# Boot Logo Configuration
|
|
#
|
|
# CONFIG_BMP_LOGO is not set
|
|
# end of Boot Logo Configuration
|
|
|
|
CONFIG_WARNINGS_ARE_ERRORS=y
|
|
CONFIG_MAX_REBOOT_CNT=3
|
|
CONFIG_RELOCATABLE_MODULES=y
|
|
CONFIG_GENERIC_GPIO_LIB=y
|
|
CONFIG_HAVE_BOOTBLOCK=y
|
|
CONFIG_HAVE_ROMSTAGE=y
|
|
CONFIG_HAVE_RAMSTAGE=y
|