mirror of
https://codeberg.org/libreboot/lbmk.git
synced 2026-07-11 05:52:36 +02:00
Leah Rowe
0a24b2e612
CONFIG_PS2M_EISAID. this is a a string used for the
identifier on the mouse, in ACPI.
CONFIG_PS2K_EISAID this is used for the keyboard.
IASL comes back with this build error:
dsdt.asl 1884: Name(_HID, EISAID("DLLK0534"))
Error 6045 - ^ EISAID string must be of the form "UUUXXXX" (3 uppercase, 4 hex digits) (DLLK0534)
Change DLLK0534 back to PNP0303 and
change DLL0534 back to PNP0F13. These are generic identifiers
for PS/2 keyboard and mouse. Any generic driver will work with
the onboard mouse/keyboard on these machines. They do not need
to be changed. These are the default values anyway. Just leave
them explicitly defined to the default values, for now; if these
options are not set, coreboot will default to these values.
This shouldn't break anything for the users. I've reported this
to Nicholas Chin, author of those patches. Libreboot imported
the new versions of E6430/E6530 board patches in the coreboot
revision update, but the new (technically correct) values broke
IASL, so I've decided to use the old values for now.
Signed-off-by: Leah Rowe <leah@libreboot.org>
146 lines
5.0 KiB
Diff
146 lines
5.0 KiB
Diff
From 88652afd52b0a8e0fc8bb1656e59d8ae4796d847 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <info@minifree.org>
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Date: Thu, 25 Jan 2024 14:30:03 +0000
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Subject: [PATCH 27/30] rebase dell/e6530 to newer coreboot code
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i diffed nicholas's current e6430 patch, versus the old one,
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prior to this revision update in lbmk, also cross referencing
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the original e6430 and e6530 patches, diffing them, and the
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result in this patch. most notably, spd data is now defined in
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the devicetree, instead of early_init.c as per:
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commit 45e4ab4a660cb7ce312f2d11a153f2d9ef4158da
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Author: Keith Hui <buurin@gmail.com>
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Date: Sat Jul 22 12:49:05 2023 -0400
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mb/*: Update SPD mapping for sandybridge boards
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This should work fine. Will test after this builds.
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Signed-off-by: Leah Rowe <info@minifree.org>
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---
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src/mainboard/dell/e6530/Kconfig | 15 +++++++++++----
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src/mainboard/dell/e6530/cmos.layout | 2 +-
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src/mainboard/dell/e6530/devicetree.cb | 8 +++++---
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src/mainboard/dell/e6530/early_init.c | 12 +++---------
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4 files changed, 20 insertions(+), 17 deletions(-)
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diff --git a/src/mainboard/dell/e6530/Kconfig b/src/mainboard/dell/e6530/Kconfig
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index 582adddbd4..a104566890 100644
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--- a/src/mainboard/dell/e6530/Kconfig
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+++ b/src/mainboard/dell/e6530/Kconfig
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@@ -20,18 +20,25 @@ config BOARD_SPECIFIC_OPTIONS
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select SYSTEM_TYPE_LAPTOP
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select USE_NATIVE_RAMINIT
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+config DRAM_RESET_GATE_GPIO
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+ default 60
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+
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config MAINBOARD_DIR
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default "dell/e6530"
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config MAINBOARD_PART_NUMBER
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default "Latitude E6530"
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-config VGA_BIOS_ID
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- default "8086,0166"
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+config PS2K_EISAID
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+ default "PNP0303"
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-config DRAM_RESET_GATE_GPIO
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- default 60
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+config PS2M_EISAID
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+ default "PNP0F13"
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config USBDEBUG_HCD_INDEX
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default 2
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+
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+config VGA_BIOS_ID
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+ default "8086,0166"
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+
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endif
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diff --git a/src/mainboard/dell/e6530/cmos.layout b/src/mainboard/dell/e6530/cmos.layout
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index e85ea4c661..1aa7e77bce 100644
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--- a/src/mainboard/dell/e6530/cmos.layout
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+++ b/src/mainboard/dell/e6530/cmos.layout
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@@ -25,7 +25,7 @@ entries
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# coreboot config options: EC
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412 1 e 1 bluetooth
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413 1 e 1 wwan
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-415 1 e 1 wlan
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+414 1 e 1 wlan
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# coreboot config options: ME
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424 1 e 14 me_state
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diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
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index 96eed178c5..37135bcf0f 100644
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--- a/src/mainboard/dell/e6530/devicetree.cb
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+++ b/src/mainboard/dell/e6530/devicetree.cb
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@@ -12,6 +12,8 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
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register "gpu_panel_power_up_delay" = "400"
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register "gpu_pch_backlight" = "0x13121312"
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+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
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+
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device domain 0x0 on
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subsystemid 0x1028 0x0535 inherit
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@@ -24,7 +26,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
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register "gen1_dec" = "0x007c0681"
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register "gen2_dec" = "0x005c0921"
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register "gen3_dec" = "0x003c07e1"
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- register "gen4_dec" = "0x007c0901"
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+ register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
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register "gpi0_routing" = "2"
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register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
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register "pcie_port_coalesce" = "1"
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@@ -37,7 +39,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
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register "xhci_switchable_ports" = "0x0000000f"
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device ref xhci on end # USB 3.0 Controller
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- device ref mei1 off end # Management Engine Interface 1
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+ device ref mei1 on end # Management Engine Interface 1
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device ref mei2 off end # Management Engine Interface 2
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device ref me_ide_r off end # Management Engine IDE-R
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device ref me_kt on end # Management Engine KT
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@@ -48,7 +50,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
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device ref pcie_rp2 on end # PCIe Port #2
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device ref pcie_rp3 on end # PCIe Port #3
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device ref pcie_rp4 on end # PCIe Port #4
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- device ref pcie_rp5 off end # PCIe Port #5
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+ device ref pcie_rp5 on end # PCIe Port #5
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device ref pcie_rp6 on end # PCIe Port #6
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device ref pcie_rp7 off end # PCIe Port #7
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device ref pcie_rp8 off end # PCIe Port #8
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diff --git a/src/mainboard/dell/e6530/early_init.c b/src/mainboard/dell/e6530/early_init.c
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index d57f48e7f1..2b40f6963f 100644
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--- a/src/mainboard/dell/e6530/early_init.c
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+++ b/src/mainboard/dell/e6530/early_init.c
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@@ -4,7 +4,6 @@
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#include <bootblock_common.h>
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#include <device/pci_ops.h>
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#include <ec/dell/mec5035/mec5035.h>
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-#include <northbridge/intel/sandybridge/raminit_native.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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const struct southbridge_usb_port mainboard_usb_ports[] = {
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@@ -26,13 +25,8 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
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void bootblock_mainboard_early_init(void)
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{
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- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
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- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
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+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
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+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
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+ | COMB_LPC_EN | COMA_LPC_EN);
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mec5035_early_init();
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}
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-
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-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
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-{
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- read_spd(&spd[0], 0x50, id_only);
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- read_spd(&spd[2], 0x52, id_only);
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-}
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--
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2.39.2
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