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https://codeberg.org/libreboot/lbmk.git
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Leah Rowe
42068f7ce1
Riku's mSATA patch for HP8300USDT was merged upstream, so the patch has been dropped from lbmk because it is contained within this new coreboot revision. Signed-off-by: Leah Rowe <leah@libreboot.org>
69 lines
2.2 KiB
Diff
69 lines
2.2 KiB
Diff
From fdd756a8217548981a1eb62e504cc37371c9fd51 Mon Sep 17 00:00:00 2001
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From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
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Date: Wed, 27 Oct 2021 13:36:01 +0200
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Subject: [PATCH 02/22] add c3 and clockgen to apple/macbook21
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---
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src/mainboard/apple/macbook21/Kconfig | 1 +
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src/mainboard/apple/macbook21/cstates.c | 13 +++++++++++++
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src/mainboard/apple/macbook21/devicetree.cb | 6 ++++++
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3 files changed, 20 insertions(+)
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diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
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index 5f5ffde588..27377b737c 100644
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--- a/src/mainboard/apple/macbook21/Kconfig
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+++ b/src/mainboard/apple/macbook21/Kconfig
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@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_RESUME
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select I945_LVDS
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+ select DRIVERS_I2C_CK505
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config MAINBOARD_DIR
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default "apple/macbook21"
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diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
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index 13d06f0839..88b8669c61 100644
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--- a/src/mainboard/apple/macbook21/cstates.c
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+++ b/src/mainboard/apple/macbook21/cstates.c
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@@ -29,6 +29,19 @@ static const acpi_cstate_t cst_entries[] = {
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.addrh = 0,
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}
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},
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+ {
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+ .ctype = 3,
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+ .latency = 17,
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+ .power = 250,
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+ .resource = {
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+ .space_id = ACPI_ADDRESS_SPACE_FIXED,
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+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
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+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
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+ .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
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+ .addrl = 0x20,
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+ .addrh = 0,
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+ }
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+ },
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};
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int get_cst_entries(const acpi_cstate_t **entries)
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diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
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index fd86e939b9..263fbabcd1 100644
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--- a/src/mainboard/apple/macbook21/devicetree.cb
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+++ b/src/mainboard/apple/macbook21/devicetree.cb
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@@ -100,7 +100,13 @@ chip northbridge/intel/i945
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end
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device pci 1f.3 on # SMBUS
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subsystemid 0x8086 0x7270
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+ chip drivers/i2c/ck505
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+ register "mask" = "{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }"
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+ register "regs" = "{ 0x77, 0x77, 0x2d, 0x00, 0x21, 0x10, 0x3b, 0x06, 0x07, 0x0f, 0xf0, 0x01, 0x1e, 0x7f, 0x80, 0x80, 0x10, 0x08, 0x04, 0x01 }"
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+ device i2c 69 on end
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+ end
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end
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+
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end
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end
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end
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--
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2.39.2
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