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https://codeberg.org/libreboot/lbmk.git
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Leah Rowe
c716341c13
I realised that the Dell OptiPlex 3050 Micro has NVRAM available. Use that backend, and hardcode power_on_after_fail to Disable, which is already done in cmos.default. The Lenovo ThinkPad T480 currently has no option table in coreboot, besides the CBFS one. For this, the CBFS option table has been enabled, and the build system has been modified to insert a relevant config for power_on_after_fail. Nicholas Chin informs me that Kabylake generally has legacy NVRAM, so enabling it for the T480/T480s should work, but we'll need to use it in the future anyway; better to just use CBFS now. I *could* use the CBFS backend on 3050micro as well. Signed-off-by: Leah Rowe <leah@libreboot.org>
62 lines
1.8 KiB
Diff
62 lines
1.8 KiB
Diff
From 7194444fbddcf6567d0c82f0986e5deeacaea680 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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Date: Mon, 6 Jan 2025 01:36:23 +0000
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Subject: [PATCH 31/40] src/intel/skylake: Disable stack overflow debug options
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The option was appearing in T480/3050micro configs of lbmk,
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after updating on the coreboot/next uprev for 20241206 rev8:
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CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y
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I did some digging. See coreboot commit:
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commit 51cc2bacb6b07279b97e9934d079060475481fb6
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Author: Subrata Banik <subratabanik@google.com>
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Date: Fri Dec 13 13:07:28 2024 +0530
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soc/intel/pantherlake: Disable stack overflow debug options
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Well now:
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I'm disabling this behaviour on Skylake, for the same
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behaviour, because I want as few behaviour changes in general,
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as possible, for the rev8 release.
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According to Subrata's patch, which was for Pantherlake,
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without this change, stack corruption can occur on verstage
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and romstage early on. Please look at that coreboot patch,
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referenced above, for clarity.
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I see no harm in disabling this option for Skylake, since
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the behaviour that it otherwise enables was not present
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before.
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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---
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src/soc/intel/skylake/Kconfig | 9 +++++++++
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1 file changed, 9 insertions(+)
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diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
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index 9191ed0ff8..493a2d835a 100644
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--- a/src/soc/intel/skylake/Kconfig
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+++ b/src/soc/intel/skylake/Kconfig
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@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE
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The size of the cache-as-ram region required during bootblock
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and/or romstage.
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+# Override DEBUG Kconfig to avoid false alarm about stack overflow.
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+config DEBUG_STACK_OVERFLOW_BREAKPOINTS
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+ bool
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+ default n
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+
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+config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
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+ bool
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+ default n
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+
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config DCACHE_BSP_STACK_SIZE
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hex
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default 0x20400 if FSP_USES_CB_STACK
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--
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2.47.3
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