mirror of
https://codeberg.org/libreboot/lbmk.git
synced 2026-07-11 05:52:36 +02:00
Leah Rowe
c716341c13
I realised that the Dell OptiPlex 3050 Micro has NVRAM available. Use that backend, and hardcode power_on_after_fail to Disable, which is already done in cmos.default. The Lenovo ThinkPad T480 currently has no option table in coreboot, besides the CBFS one. For this, the CBFS option table has been enabled, and the build system has been modified to insert a relevant config for power_on_after_fail. Nicholas Chin informs me that Kabylake generally has legacy NVRAM, so enabling it for the T480/T480s should work, but we'll need to use it in the future anyway; better to just use CBFS now. I *could* use the CBFS backend on 3050micro as well. Signed-off-by: Leah Rowe <leah@libreboot.org>
95 lines
3.2 KiB
Diff
95 lines
3.2 KiB
Diff
From 819fe0e89e426d3d875cf8ab4d2de439ba716848 Mon Sep 17 00:00:00 2001
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From: Felix Singer <felixsinger@posteo.net>
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Date: Wed, 26 Jun 2024 04:24:31 +0200
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Subject: [PATCH 30/40] soc/intel/skylake: configure usb acpi
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Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
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Signed-off-by: Felix Singer <felixsinger@posteo.net>
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---
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src/soc/intel/skylake/Kconfig | 1 +
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src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++-
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2 files changed, 56 insertions(+), 1 deletion(-)
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diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
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index 4ad33496b2..9191ed0ff8 100644
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--- a/src/soc/intel/skylake/Kconfig
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+++ b/src/soc/intel/skylake/Kconfig
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@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
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select CPU_INTEL_COMMON
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select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
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select CPU_SUPPORTS_PM_TIMER_EMULATION
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+ select DRIVERS_USB_ACPI
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select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
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select FSP_COMPRESS_FSP_S_LZ4
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select FSP_M_XIP
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diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb
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index 6538a1475b..dfb81d496e 100644
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--- a/src/soc/intel/skylake/chipset.cb
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+++ b/src/soc/intel/skylake/chipset.cb
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@@ -13,7 +13,61 @@ chip soc/intel/skylake
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device pci 07.0 alias chap off end
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device pci 08.0 alias gmm off end # Gaussian Mixture Model
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device pci 13.0 alias ish off end # SensorHub
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- device pci 14.0 alias south_xhci off ops usb_xhci_ops end
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+ device pci 14.0 alias south_xhci off ops usb_xhci_ops
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+ chip drivers/usb/acpi
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+ register "type" = "UPC_TYPE_HUB"
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+ device usb 0.0 alias xhci_root_hub off
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+ chip drivers/usb/acpi
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+ device usb 2.0 alias usb2_port1 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.1 alias usb2_port2 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.2 alias usb2_port3 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.3 alias usb2_port4 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.4 alias usb2_port5 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.5 alias usb2_port6 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.6 alias usb2_port7 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.7 alias usb2_port8 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.8 alias usb2_port9 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 2.9 alias usb2_port10 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 3.0 alias usb3_port1 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 3.1 alias usb3_port2 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 3.2 alias usb3_port3 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 3.3 alias usb3_port4 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 3.4 alias usb3_port5 off end
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+ end
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+ chip drivers/usb/acpi
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+ device usb 3.5 alias usb3_port6 off end
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+ end
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+ end
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+ end
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+ end
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device pci 14.1 alias south_xdci off ops usb_xdci_ops end
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device pci 14.2 alias thermal off end
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device pci 14.3 alias cio off end
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--
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2.47.3
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