Commit Graph

77 Commits

Author SHA1 Message Date
Leah Rowe bdc39ffcc7 haswell: only use txtmod seabios configuration
i found that with libre mrc, usb was broken in grub

however, it worked nicely in seabios

for our purposes, doing seabios-only roms in text mode
is best for now

i'm going to re-add mrc.bin, but for t440p_12mb_mrc
and w541_12mb_mrc, as new config names. the regular
t440p_12mb and w541_12mb will continue to use libre
mrc, but the _mrc ones will use mrc.bin and retain the
grub payload in board.cfg
2023-03-18 12:15:35 +00:00
Leah Rowe df6b9e2840 remove t440p_12mb_cbfs4mb (retain t440_12mb) 2023-03-18 12:13:28 +00:00
Leah Rowe 04f1fe1751 remove x220_16mb (x220 with 16MB flash)
untested. removing.
2023-03-18 07:59:25 +00:00
Leah Rowe 548872ce8e haswell boards: use libre mrc.bin replacement
courtesy of Angel Pons from the coreboot project

this uses the following patch set from gerrit, as yet
unmerged (in coreboot master) on this date:

    https://review.coreboot.org/c/coreboot/+/64198/5

logic for downloading mrc blobs has been deleted from
lbmk, as this is now completely obsolete (for haswell
boards)

if other platforms are added later that need mrc.bin,
then logic will be re-added again for that
2023-03-18 00:55:10 +00:00
Leah Rowe 59540530bc nuke p2b_ls/p3b_f boards
they don't even boot in pcbox properly, and the real
hardware is not much to talk about

useless port

delete
2023-03-17 21:54:01 +00:00
Leah Rowe 9398ad08db also fix data.vbt path for lenovo/w541
using the same method as the previous patch for t440p
2023-03-05 13:50:09 +00:00
Konstantinos Koukopoulos d2465e8291 Fix CONFIG_INTEL_GMA_VBT_FILE for the t440p_12mb config 2023-03-05 13:46:33 +00:00
Leah Rowe a5aa5bca77 ICH9M: default to 256MB VRAM, not 352MB
352MB VRAM causes stability issues, according to some reports

users can still set it to the higher level when building, if
they wish to
2023-03-04 23:58:17 +00:00
Leah Rowe 36982ab5f4 fix bad ifdtool patch from earlier commit 2023-02-19 23:21:37 +00:00
Leah Rowe 0d0f6cf3b8 coreboot: update revision of cbtree "default" 2023-02-19 19:24:01 +00:00
Alexei Sorokin ac1cab288d x230edp_12mb: Correct the path to data.vbt 2023-01-26 23:57:13 +00:00
lbmkplaceholder 3e266650c2 disable grub and memtest on 1MB ROM configs
due to upstream bloat, these no longer fit. it will have to be
fixed in the next libreboot release
2022-12-14 08:31:07 +00:00
lbmkplaceholder 664cdcfb36 fix ./build boot roms all 2022-12-14 06:46:41 +00:00
Leah Rowe 48c7318627 p2b_ls/p3b_f boards: Disable memtest payload
memtest can't fit in such tiny space alongside SeaBIOS
2022-12-11 06:29:39 +00:00
Leah Rowe 4eba525bba p2b_ls/p3b_f boards: no payload and no vga init
The configs were enabling SeaBIOS payload, but this is to be
handled by lbmk, not coreboot.

Further, they were enabling VGA ROM execution in coreboot, but
this should be handled by SeaBIOS.

This board should not have a GRUB payload enabled either; this
will be checked and fixed if necessary in the next commit.
2022-12-11 06:20:34 +00:00
Leah Rowe c931b40e4b Merge branch 'master' of qeeg/lbmk into master 2022-12-11 06:09:06 +00:00
qeeg 6351a4a484 Add P2B-LS and P3B-F configs 2022-12-10 08:42:29 -06:00
Alper Nebi Yasak 3d5bd034c5 coreboot: Add qemu_arm64_12mb board
Add a build for QEMU AArch64 virtual machine using U-Boot as payload.
Coreboot config is based on the following defconfig:

    CONFIG_CBFS_SIZE=0x00c00000
    CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_COREBOOT_ROMSIZE_KB_12288=y
    CONFIG_UART_PCI_ADDR=0x0

The resulting ROM can be booted with a command line like:

    qemu-system-aarch64 \
        -machine virt,secure=on,virtualization=on \
        -cpu cortex-a53 -m 1G \
        -vga none -display none -serial stdio \
        -bios bin/qemu_arm64_12mb/uboot_*.rom

However, this is little more than a proof of concept because U-Boot
upstream is missing coreboot integration on non-x86 boards, which could
have been useful for e.g. a framebuffer.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak b5a5801f7a coreboot: qemu_x86_12mb: Enable DRIVERS_UART_8250IO
U-Boot doesn't run on this board when this SuperIO serial driver is
disabled. Enable it.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Alper Nebi Yasak 737573cee5 u-boot: Add qemu_x86_12mb build
Add a U-Boot build for the qemu_x86_12mb board. The config is a copy of
the upstream "coreboot" defconfig, but with OF_EMBED=y.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-12-10 14:19:00 +03:00
Leah Rowe 7679c8e0f0 coreboot/default: add --nuke flag to ifdtool
e.g.

./ifdtool --nuke me coreboot.rom

this will be used by rom release build scripts, to scrub
stuff like intel me from the rom
2022-12-04 23:47:29 +00:00
Alexei Sorokin 69eaca2c6d coreboot: hide MEI on neutered-ME targets 2022-11-29 13:57:54 +03:00
Leah Rowe cf0522203d Merge branch 'master' of Arsen/lbmk into master 2022-11-29 01:24:30 +00:00
Arsen Arsenović a40ba4ad11 t430_12mb: Add, based on x230_12mb
These boards are near-identical, this appears to suffice.
2022-11-28 22:38:20 +01:00
Alexei Sorokin a33e842908 coreboot: add x230edp_12mb, remove x230fhd_12mb
New x230edp_12mb target uses the
https://review.coreboot.org/c/coreboot/+/28950 patchset to add an
X230_EDP target to the default coreboot branch.
Consequently the "fhd" coreboot branch is no longer needed and has
been safely removed.
2022-11-28 23:33:58 +03:00
Leah Rowe e35a33d562 Merge branch 'qemu' of shmalebx9/lbmk into master 2022-11-24 19:10:29 +00:00
shmalebx9 da155b3d12 added x86 qemu board based on x230 coreboot config 2022-11-19 13:41:18 -07:00
Leah Rowe 7629dfb8af remove duplicate patch causing build error 2022-11-19 20:11:35 +00:00
Leah Rowe 43196abc5d also fix crossgcc on cros/fhd coreboot trees 2022-11-19 14:56:54 +00:00
Leah Rowe f063190889 cros devices: use a common coreboot tree 2022-11-19 05:07:54 +00:00
Leah Rowe 24a866baea remove kfsn4-dre, kcma-d8 and kgpe-d16
buggy, buggy, buggy, buggy, buggy, buggy, buggy

full of bugs, these boards never worked properly. i got ripped
off with these.

now i'm ripping off the band aid

use dasharo if you want d16 stuff. i'm done with it.
2022-11-19 03:51:59 +00:00
Leah Rowe 60793c552f fix gnat build issue on coreboot repositories
backported from newer coreboot revisions, see patch

coreboot/default/patches/0014-coreboot-default-fix-crossgcc-build.patch
2022-11-19 03:33:38 +00:00
Leah Rowe 7af9953463 pragmatic system distribution guideline compliance
osboot is now part of libreboot, and will soon shut down.
libreboot now conforms to osboot policy.
2022-11-14 00:51:12 +00:00
Alper Nebi Yasak f848eb81e8 coreboot: Add peach pit chromebook configs
This adds coreboot configuration for the Samsung Chromebook 2 11", which
is based on the "google/peach_pit" mainboard in upstream coreboot. Also
adds a shared "peach" board directory to share with others having the
same baseboard.

The config is based on the following defconfig:

    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00400000
    CONFIG_UART_FOR_CONSOLE=3
    CONFIG_BOARD_GOOGLE_PEACH_PIT=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the peach pit chromebook. This also fails
without a non-free 3rdparty/blobs/cpu/samsung/exynos5420/bl1.bin blob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:48:37 +03:00
Alper Nebi Yasak 8584fcc1ea coreboot: Add spring chromebook configs
This adds coreboot configuration for the HP Chromebook 11 G1, which is
part of the "google/daisy" mainboard in upstream coreboot. It uses the
shared tree for the "daisy" baseboard.

The config is based on the following defconfig:

    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00400000
    CONFIG_UART_FOR_CONSOLE=3
    CONFIG_BOARD_GOOGLE_DAISY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_EC_GOOGLE_CHROMEEC_I2C_BUS=0x4
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the spring chromebook. This also fails
without a non-free 3rdparty/blobs/cpu/samsung/exynos5250/bl1.bin blob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:48:21 +03:00
Alper Nebi Yasak 2dcb7cab72 coreboot: Add snow chromebook configs
This adds coreboot configuration for the Samsung Chromebook - XE303,
which is based on the "google/daisy" mainboard in upstream coreboot.
Also adds a shared "daisy" board directory to share with others having
the same baseboard.

The config is based on the following defconfig:

    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00400000
    CONFIG_UART_FOR_CONSOLE=3
    CONFIG_BOARD_GOOGLE_DAISY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_EC_GOOGLE_CHROMEEC_I2C_BUS=0x4
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the snow chromebook. This also fails without
a non-free 3rdparty/blobs/cpu/samsung/exynos5250/bl1.bin blob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:47:45 +03:00
Alper Nebi Yasak c97f8e5c62 coreboot: Add nyan blaze chromebook configs
This adds coreboot configuration for the HP Chromebook 14 G3, which is
based on the "google/nyan_blaze" mainboard in upstream coreboot. It uses
the shared tree for the "nyan" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=4
    CONFIG_BOARD_GOOGLE_NYAN_BLAZE=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_DRIVERS_AS3722_RTC_BUS=4
    CONFIG_DRIVERS_AS3722_RTC_ADDR=0x40
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the nyan blaze chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:53 +03:00
Alper Nebi Yasak ddc695a296 coreboot: Add nyan big chromebook configs
This adds coreboot configuration for the Acer Chromebook 13 (CB5-311,
C810), which is based on the "google/nyan_big" mainboard in upstream
coreboot. Also adds a shared "nyan" board directory to share with
others having the same baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=4
    CONFIG_BOARD_GOOGLE_NYAN_BIG=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_DRIVERS_AS3722_RTC_BUS=4
    CONFIG_DRIVERS_AS3722_RTC_ADDR=0x40
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the nyan big chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:39 +03:00
Alper Nebi Yasak 2e0f13d92a coreboot: Add veyron mickey chromebit configs
This adds coreboot configuration for the ASUS Chromebit CS10, which is
based on the "google/veyron_mickey" mainboard in upstream coreboot. It
uses the shared tree for the "veyron" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_MICKEY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the veyron mickey chromebit.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:30 +03:00
Alper Nebi Yasak f84209ceeb coreboot: Add veyron jerry chromebook configs
This adds coreboot configuration for a few white-label chromebooks which
are based on the "google/veyron" mainboard in upstream coreboot. It uses
the shared tree for the "veyron" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_JERRY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have any of the veyron jerry chromebooks.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:21 +03:00
Alper Nebi Yasak bbba94ed8f coreboot: Add veyron minnie chromebook configs
This adds coreboot configuration for the ASUS Chromebook Flip C100PA,
which is based on the "google/veyron" mainboard in upstream coreboot. It
uses the shared tree for the "veyron" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_MINNIE=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the veyron minnie chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:10:11 +03:00
Alper Nebi Yasak 2ed1111d83 coreboot: Add veyron speedy chromebook configs
This adds coreboot configuration for the ASUS Chromebook C201PA, which
is based on the "google/veyron" mainboard in upstream coreboot. Also
adds a shared "veyron" board directory to share with others having the
same baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x400000
    CONFIG_BOARD_GOOGLE_VEYRON_SPEEDY=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

Untested since I don't have the veyron speedy chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:57 +03:00
Alper Nebi Yasak 0ae2398061 coreboot: Add bob chromebook configs
This adds coreboot configuration for the ASUS Chromebook Flip C101,
which is based on the "google/gru" mainboard in upstream coreboot. It
uses the shared tree for the "gru" baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00800000
    CONFIG_BOARD_GOOGLE_BOB=y
    CONFIG_DRIVER_TPM_SPI_BUS=0x0
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
    CONFIG_PAYLOAD_FIT_SUPPORT=y

Untested since I don't have the bob chromebook.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:39 +03:00
Alper Nebi Yasak af46cbffe8 coreboot: Add kevin chromebook configs
This adds coreboot configuration for the Samsung Chromebook Plus (v1),
which is based on the "google/gru" mainboard in upstream coreboot. Also
adds a shared "gru" board directory to share with others having the same
baseboard.

The config is based on the following defconfig:

    # CONFIG_USE_BLOBS is not set
    CONFIG_VENDOR_GOOGLE=y
    CONFIG_CBFS_SIZE=0x00800000
    CONFIG_BOARD_GOOGLE_KEVIN=y
    CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
    CONFIG_UART_PCI_ADDR=0x0
    CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
    CONFIG_PAYLOAD_FIT_SUPPORT=y

Most things work, but one significant problem is that the board can't power
off properly. It also happens with my manual U-Boot-only builds, but not
when I manually build coreboot with a U-Boot payload. Not sure why it is
happening here as well.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-08-29 12:09:18 +03:00
Leah Rowe 8ca0761fb0 specifically call python3, in scripts
with this change, it's unlikely we'll hit errors again. previously,
some projects used were calling "python" which in context was
python3, but on some setups, the user only has python2 and python3
but no symlink for "python" (which if exists, we assumed linked to
python3)

now it's unambiguous. docs/build/ can probably be updated now, as
a result of this change, to remove the advice about that
2022-03-13 18:17:09 +00:00
Leah Rowe babce03fbd coreboot/*: set grub_scan_disk to ahci on most boards
on ga-g41m-es2l, set it to ata
2021-12-29 07:18:21 +00:00
Leah Rowe 5d65d6c3d3 apple/macbook21: set grub_scan_disk to ahci 2021-12-29 07:14:22 +00:00
Leah Rowe 7221782940 lenovo/r400: disable death beeps 2021-12-20 02:46:25 +00:00
Leah Rowe dbe4a0c6a3 coreboot configs: don't enable wifi during early init 2021-12-11 15:24:42 +00:00
Leah Rowe f20160f3bb coreboot configs: disable serial output during coreboot initialization 2021-12-11 15:00:17 +00:00