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consolidate haswell iommu patches

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Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2026-04-23 23:14:25 +01:00
parent 2ecfe63b5f
commit f60350344a
52 changed files with 120 additions and 162 deletions
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config/coreboot/default/patches/0028-dell-3050micro-disable-nvme-hotplug.patch
+47
View File
@@ -0,0 +1,47 @@
From 4470d8fb6760173090c43e6a82a8865f5917dd9b Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 11 Dec 2024 01:06:01 +0000
Subject: [PATCH 28/51] dell/3050micro: disable nvme hotplug
in my testing, when running my 3050micro for a few days,
the nvme would sometimes randomly rename.
e.g. nvme0n1 renamed to nvme0n2
this might cause crashes in linux, if booting only from the
nvme. in my case, i was booting from mdraid (sata+nvme) and
every few days, the nvme would rename at least once, causing
my RAID to become unsynced. since i'm using RAID1, this was
OK and I could simply re-sync the array, but this is quite
precarious indeed. if you're using raid0, that will potentially
corrupt your RAID array indefinitely.
this same issue manifested on the T480/T480 thinkpads, and
S3 resume would break because of that, when booting from nvme,
because the nvme would be "unplugged" and appear to linux as a
new device (the one that you booted from).
the fix there was to disable hotplugging on that pci-e slot
for the nvme, so apply the same fix here for 3050 micro
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
.../dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb b/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
index c5f1749b2c..ff48a8121a 100644
--- a/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
+++ b/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
@@ -46,7 +46,7 @@ chip soc/intel/skylake
register "PcieRpAdvancedErrorReporting[20]" = "1"
register "PcieRpLtrEnable[20]" = "true"
register "PcieRpClkSrcNumber[20]" = "3"
- register "PcieRpHotPlug[20]" = "1"
+ register "PcieRpHotPlug[20]" = "0"
end
end
--
2.47.3