mirror of
https://codeberg.org/libreboot/lbmk.git
synced 2026-07-19 00:03:45 +02:00
update coreboot and nuke tianocore
tianocore is a liability for the libreboot project. it's a bloated mess, and unreliable, broken on many boards, and basically impossible to audit. i don't trust tianocore, so i'm removing it.
This commit is contained in:
@@ -1,9 +1,7 @@
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cbtree="macbook21"
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cbtree="default"
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romtype="i945 laptop"
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arch="x86_32"
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payload_grub="y"
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payload_grub_withseabios="y"
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payload_grub_withtianocore="n"
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payload_seabios="y"
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payload_tianocore="n"
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payload_memtest="y"
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@@ -131,8 +131,8 @@ CONFIG_DCACHE_RAM_BASE=0xfefc0000
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CONFIG_DCACHE_RAM_SIZE=0x8000
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CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
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CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
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CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
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CONFIG_MMCONF_BUS_NUMBER=64
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CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
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CONFIG_ECAM_MMCONF_BUS_NUMBER=64
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CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
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CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
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CONFIG_SPI_FLASH_WINBOND=y
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@@ -186,11 +186,11 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
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CONFIG_ROMSTAGE_ADDR=0x2000000
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CONFIG_VERSTAGE_ADDR=0x2000000
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CONFIG_RAMBASE=0xe00000
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CONFIG_CPU_ADDR_BITS=36
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CONFIG_SMM_RESERVED_SIZE=0x100000
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CONFIG_SMM_MODULE_STACK_SIZE=0x400
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CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
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CONFIG_EHCI_BAR=0xfef00000
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CONFIG_CBFS_CACHE_ALIGN=8
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CONFIG_STACK_SIZE=0x1000
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CONFIG_VBT_DATA_SIZE_KB=8
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CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
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@@ -200,12 +200,12 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16
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CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
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CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
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CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
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CONFIG_AZALIA_MAX_CODECS=3
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# CONFIG_PCIEXP_ASPM is not set
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# CONFIG_PCIEXP_COMMON_CLOCK is not set
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CONFIG_TTYS0_BASE=0x3f8
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CONFIG_TTYS0_LCS=3
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CONFIG_UART_PCI_ADDR=0x0
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CONFIG_AZALIA_MAX_CODECS=3
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CONFIG_INTEL_HAS_TOP_SWAP=y
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# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
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CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
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@@ -333,12 +333,12 @@ CONFIG_LINEAR_FRAMEBUFFER=y
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# end of Display
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CONFIG_PCI=y
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CONFIG_MMCONF_SUPPORT=y
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CONFIG_ECAM_MMCONF_SUPPORT=y
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CONFIG_PCIX_PLUGIN_SUPPORT=y
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CONFIG_CARDBUS_PLUGIN_SUPPORT=y
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CONFIG_AZALIA_PLUGIN_SUPPORT=y
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CONFIG_PCIEXP_PLUGIN_SUPPORT=y
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CONFIG_MMCONF_LENGTH=0x04000000
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CONFIG_ECAM_MMCONF_LENGTH=0x04000000
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CONFIG_PCI_ALLOW_BUS_MASTER=y
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CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
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CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
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@@ -131,8 +131,8 @@ CONFIG_DCACHE_RAM_BASE=0xfefc0000
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CONFIG_DCACHE_RAM_SIZE=0x8000
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CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
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CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
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CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
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CONFIG_MMCONF_BUS_NUMBER=64
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CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
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CONFIG_ECAM_MMCONF_BUS_NUMBER=64
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CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
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CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
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CONFIG_SPI_FLASH_WINBOND=y
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@@ -186,11 +186,11 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
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CONFIG_ROMSTAGE_ADDR=0x2000000
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CONFIG_VERSTAGE_ADDR=0x2000000
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CONFIG_RAMBASE=0xe00000
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CONFIG_CPU_ADDR_BITS=36
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CONFIG_SMM_RESERVED_SIZE=0x100000
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CONFIG_SMM_MODULE_STACK_SIZE=0x400
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CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
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CONFIG_EHCI_BAR=0xfef00000
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CONFIG_CBFS_CACHE_ALIGN=8
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CONFIG_STACK_SIZE=0x1000
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CONFIG_VBT_DATA_SIZE_KB=8
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CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
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@@ -200,12 +200,12 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16
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CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
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CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
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CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
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CONFIG_AZALIA_MAX_CODECS=3
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# CONFIG_PCIEXP_ASPM is not set
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# CONFIG_PCIEXP_COMMON_CLOCK is not set
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CONFIG_TTYS0_BASE=0x3f8
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CONFIG_TTYS0_LCS=3
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CONFIG_UART_PCI_ADDR=0x0
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CONFIG_AZALIA_MAX_CODECS=3
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CONFIG_INTEL_HAS_TOP_SWAP=y
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# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
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CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
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@@ -331,12 +331,12 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
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# end of Display
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CONFIG_PCI=y
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CONFIG_MMCONF_SUPPORT=y
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CONFIG_ECAM_MMCONF_SUPPORT=y
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CONFIG_PCIX_PLUGIN_SUPPORT=y
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CONFIG_CARDBUS_PLUGIN_SUPPORT=y
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CONFIG_AZALIA_PLUGIN_SUPPORT=y
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CONFIG_PCIEXP_PLUGIN_SUPPORT=y
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CONFIG_MMCONF_LENGTH=0x04000000
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CONFIG_ECAM_MMCONF_LENGTH=0x04000000
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CONFIG_PCI_ALLOW_BUS_MASTER=y
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CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
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CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
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