Revert "cb/default: use rev 62c8197dd25376cb7b18d272af167cb176d28bcf"

This reverts commit fedeb6ecd8. this, along with several other updates, have been reverted. dell 3050 micro had boot issues, on the update. i therefore revert the recent revision update, pending further investigation.
2026-07-13 14:59:34 +02:00 · 2026-05-19 11:54:05 +01:00
parent 9a132f96a2
commit ad2d082bc2
261 changed files with 1793 additions and 4549 deletions
@@ -1,30 +1,30 @@
-From 11f759cb05a4d9f4656982a8afea40d7dadfb93e Mon Sep 17 00:00:00 2001
+From 03e8f5f33723fd291e30c5305fa2f5eb22bdf656 Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 01/51] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 01/48] add c3 and clockgen to apple/macbook21

 ---
- src/mainboard/apple/i945_macs/Kconfig       |  1 +
- src/mainboard/apple/i945_macs/cstates.c     | 13 +++++++++++++
- src/mainboard/apple/i945_macs/devicetree.cb |  6 ++++++
+ src/mainboard/apple/macbook21/Kconfig       |  1 +
+ src/mainboard/apple/macbook21/cstates.c     | 13 +++++++++++++
+ src/mainboard/apple/macbook21/devicetree.cb |  6 ++++++
 3 files changed, 20 insertions(+)

-diff --git a/src/mainboard/apple/i945_macs/Kconfig b/src/mainboard/apple/i945_macs/Kconfig
-index 42774e484a..cd5155e81a 100644
--- a/src/mainboard/apple/i945_macs/Kconfig
-+++ b/src/mainboard/apple/i945_macs/Kconfig
-@@ -20,6 +20,7 @@ config BOARD_APPLE_MACBOOK11
- 	bool
- 	select BOARD_APPLE_I945_MACS_COMMON
+diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
+index 330d8efae2..cf10343554 100644
+--- a/src/mainboard/apple/macbook21/Kconfig
+++ b/src/mainboard/apple/macbook21/Kconfig
+@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select HAVE_ACPI_TABLES
+ 	select HAVE_ACPI_RESUME
 	select I945_LVDS
 +	select DRIVERS_I2C_CK505
 
- config BOARD_APPLE_MACBOOK21
- 	bool
-diff --git a/src/mainboard/apple/i945_macs/cstates.c b/src/mainboard/apple/i945_macs/cstates.c
+ config MAINBOARD_DIR
+ 	default "apple/macbook21"
+diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
 index 13d06f0839..88b8669c61 100644
--- a/src/mainboard/apple/i945_macs/cstates.c
-+++ b/src/mainboard/apple/i945_macs/cstates.c
+--- a/src/mainboard/apple/macbook21/cstates.c
+++ b/src/mainboard/apple/macbook21/cstates.c
@@ -29,6 +29,19 @@ static const acpi_cstate_t cst_entries[] = {
 			.addrh = 0,
 		}
@@ -45,11 +45,11 @@ index 13d06f0839..88b8669c61 100644
 };
 
 int get_cst_entries(const acpi_cstate_t **entries)
-diff --git a/src/mainboard/apple/i945_macs/devicetree.cb b/src/mainboard/apple/i945_macs/devicetree.cb
-index b17f8ae529..18731b067f 100644
--- a/src/mainboard/apple/i945_macs/devicetree.cb
-+++ b/src/mainboard/apple/i945_macs/devicetree.cb
-@@ -89,7 +89,13 @@ chip northbridge/intel/i945
+diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
+index fd86e939b9..263fbabcd1 100644
+--- a/src/mainboard/apple/macbook21/devicetree.cb
+++ b/src/mainboard/apple/macbook21/devicetree.cb
+@@ -100,7 +100,13 @@ chip northbridge/intel/i945
 			end
 			device pci 1f.3 on # SMBUS
 				subsystemid 0x8086 0x7270
@@ -1,7 +1,7 @@
-From 33b89af06765839c0f9a6e599789c520e794a22a Mon Sep 17 00:00:00 2001
+From da742084f51bb7e97472605d6eff0726fd7a5863 Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 03/51] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 02/48] lenovo/t400: Enable all SATA ports

 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -1,7 +1,7 @@
-From 6bf8a87bdea4b7d5876e20f734821e6496b51cb9 Mon Sep 17 00:00:00 2001
+From 278c2a989c025c1b3a097966968c8d253c973a3e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 04/51] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 03/48] lenovo/x230: set me_state=Disabled in cmos.default

 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
@@ -1,7 +1,7 @@
-From 05f20d18bf572ebe80875d506dd686efd3eb7e4e Mon Sep 17 00:00:00 2001
+From 63357b7f8c9da3a8d644542c70f50fc9bc77a8fc Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 05/51] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 04/48] set me_state=Disabled on all cmos.default files!

 yeah. why the hell isn't this the default

@@ -50,13 +50,13 @@ index 6fd26c5fe3..27a62d07b3 100644
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 4857f92f67..ab1be1a678 100644
+index c896eadec1..6d1e172056 100644
 --- a/src/mainboard/lenovo/t430/cmos.default
 +++ b/src/mainboard/lenovo/t430/cmos.default
@@ -17,4 +17,4 @@ trackpoint=Enable
 backlight=Both
- hybrid_graphics_mode=Integrated Only
 usb_always_on=Disable
+ hybrid_graphics_mode=Integrated Only
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t430s/cmos.default b/src/mainboard/lenovo/t430s/cmos.default
@@ -1,7 +1,7 @@
-From 68e1738c5a46181b1fd1fcd44fe314da297b95d0 Mon Sep 17 00:00:00 2001
+From 434136e0aca4839e449e3841a5e993688b4586f0 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 06/51] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 05/48] util/ifdtool: add --nuke flag (all 0xFF on region)

 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -20,10 +20,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 84 insertions(+), 32 deletions(-)

 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 0b75db54bd..7f0c10bd0b 100644
+index 0592785bf6..cab934c3a5 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -2252,6 +2252,7 @@ static void print_usage(const char *name)
+@@ -2240,6 +2240,7 @@ static void print_usage(const char *name)
 	       "                                         tgl    - Tiger Lake\n"
 	       "                                         wbg    - Wellsburg\n"
 	       "   -S | --setpchstrap                    Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
 	       "   -T | --topswapsize                    Set the Top Swap Block Size PCH strap value\n"
 	       "                                         Possible values: 0x10000, 0x20000, 0x40000, 0x80000,\n"
-@@ -2263,6 +2264,60 @@ static void print_usage(const char *name)
+@@ -2251,6 +2252,60 @@ static void print_usage(const char *name)
 	       "\n");
 }
 
@@ -92,7 +92,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 int main(int argc, char *argv[])
 {
 	int opt, option_index = 0;
-@@ -2270,6 +2325,7 @@ int main(int argc, char *argv[])
+@@ -2258,6 +2313,7 @@ int main(int argc, char *argv[])
 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
@@ -100,7 +100,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
 	int mode_settopswapsize = 0;
 	char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
-@@ -2306,6 +2362,7 @@ int main(int argc, char *argv[])
+@@ -2294,6 +2350,7 @@ int main(int argc, char *argv[])
 		{"setpchstrap", 1, NULL, 'S'},
 		{"newvalue", 1, NULL, 'V'},
 		{"topswapsize", 1, NULL, 'T'},
@@ -108,7 +108,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 		{0, 0, 0, 0}
 	};
 
-@@ -2355,35 +2412,8 @@ int main(int argc, char *argv[])
+@@ -2343,35 +2400,8 @@ int main(int argc, char *argv[])
 			region_fname++;
 			// Descriptor, BIOS, ME, GbE, Platform
 			// valid type?
@@ -146,7 +146,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 				fprintf(stderr, "No such region type: '%s'\n\n",
 					region_type_string);
 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2564,7 +2594,23 @@ int main(int argc, char *argv[])
+@@ -2552,7 +2582,23 @@ int main(int argc, char *argv[])
 			mode_settopswapsize = 1;
 			top_swap_size_arg = optarg;
 			break;
@@ -171,7 +171,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 			print_version();
 			exit(EXIT_SUCCESS);
 			break;
-@@ -2583,7 +2629,8 @@ int main(int argc, char *argv[])
+@@ -2571,7 +2617,8 @@ int main(int argc, char *argv[])
 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
 			mode_setstrap + mode_settopswapsize + mode_newlayout + (mode_spifreq | mode_em100 |
 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
@@ -181,7 +181,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 		fprintf(stderr, "You may not specify more than one mode.\n\n");
 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
 		exit(EXIT_FAILURE);
-@@ -2592,7 +2639,8 @@ int main(int argc, char *argv[])
+@@ -2580,7 +2627,8 @@ int main(int argc, char *argv[])
 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
 			mode_setstrap + mode_settopswapsize + mode_newlayout + mode_spifreq + mode_em100 +
 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
@@ -191,7 +191,7 @@ index 0b75db54bd..7f0c10bd0b 100644
 		fprintf(stderr, "You need to specify a mode.\n\n");
 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
 		exit(EXIT_FAILURE);
-@@ -2758,6 +2806,10 @@ int main(int argc, char *argv[])
+@@ -2746,6 +2794,10 @@ int main(int argc, char *argv[])
 		write_image(new_filename, image, size);
 	}
 
@@ -1,7 +1,7 @@
-From 6c626f71a4ec9f887d1b82da071011423a3fd24e Mon Sep 17 00:00:00 2001
+From 91e4334541da6522d5a0bf5277ac478c891e7117 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 07/51] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 06/48] mb/dell/e6400: Enable 01.0 device in devicetree for
 dGPU models

 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
@@ -1,7 +1,7 @@
-From bd349e86429cd0e83bbd6251ec507f3273b80854 Mon Sep 17 00:00:00 2001
+From 3ebe9e03ec563e5adb43337340fe973aa66a984a Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 08/51] Remove warning for coreboot images built without a
+Subject: [PATCH 07/48] Remove warning for coreboot images built without a
 payload

 I added this in upstream to prevent people from accidentally flashing
@@ -1,7 +1,7 @@
-From bd98f54b50b66d291641f88ec3169b9518855862 Mon Sep 17 00:00:00 2001
+From 0e2fa472354b2e68ffbfc01d5bb225ca9d8973f0 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 09/51] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 08/48] HACK: Disable coreboot related BL31 features

 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
@@ -10,10 +10,10 @@ power off properly when shut down from Linux. Needs investigation.
 1 file changed, 3 deletions(-)

 diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
-index 7310ce1c1f..b0a6ed1f84 100644
+index efd628fee7..6c4f3d702e 100644
 --- a/src/arch/arm64/Makefile.mk
 +++ b/src/arch/arm64/Makefile.mk
-@@ -158,9 +158,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
+@@ -156,9 +156,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
 # Always enable crash reporting, even on a release build
 BL31_MAKEARGS += CRASH_REPORTING=1
 
@@ -1,7 +1,7 @@
-From ae01730cad059bb3707b6d938a082dee9494bde5 Mon Sep 17 00:00:00 2001
+From f692cd96a4484b8e60bd112454d1bdbc3c689017 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 10/51] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 09/48] dell/e6430: use ME Soft Temporary Disable

 i overlooked this. it's set on other boards.

@@ -1,7 +1,7 @@
-From ae7d23355be8efbbe3a1216d8e28c30a07e2e0ef Mon Sep 17 00:00:00 2001
+From 78db6c595ff816ad4344d541688605ae720a83c4 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 11/51] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 10/48] mb/hp: Add Compaq Elite 8300 CMT port

 Based on autoport and Z220 SuperIO code.

@@ -1,7 +1,7 @@
-From 0d418d44f61dda7670cfe02226150c2e5d3d6308 Mon Sep 17 00:00:00 2001
+From beb9b1650fb3aec96544b683fbe53ee16584f3d8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 12/51] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 11/48] nb/intel/haswell: make IOMMU a runtime option

 When I tested graphics cards on a coreboot port for Dell
 OptiPlex 9020 SFF, I could not use a graphics card unless
@@ -34,8 +34,8 @@ Signed-off-by: Leah Rowe <info@minifree.org>
 src/mainboard/lenovo/haswell/cmos.layout       | 3 +++
 src/mainboard/supermicro/x10slm-f/cmos.default | 1 +
 src/mainboard/supermicro/x10slm-f/cmos.layout  | 6 ++++++
- src/northbridge/intel/haswell/early_init.c     | 6 ++++++
- 14 files changed, 49 insertions(+)
+ src/northbridge/intel/haswell/early_init.c     | 5 +++++
+ 14 files changed, 48 insertions(+)

 diff --git a/src/mainboard/asrock/b85m_pro4/cmos.default b/src/mainboard/asrock/b85m_pro4/cmos.default
 index 01bf20ad16..dfc8b80fb0 100644
@@ -265,29 +265,28 @@ index 38ba87aa45..24d39e97ee 100644
 checksums
 
 diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
-index 6a5ce53a40..5f07fa0b17 100644
+index e47deb5da6..1a7e0b1076 100644
 --- a/src/northbridge/intel/haswell/early_init.c
 +++ b/src/northbridge/intel/haswell/early_init.c
-@@ -6,6 +6,7 @@
+@@ -5,6 +5,7 @@
+ #include <device/mmio.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
- #include <types.h>
 +#include <option.h>
 
 #include "haswell.h"
 
-@@ -80,6 +81,11 @@ static void haswell_setup_misc(void)
- static void northbridge_setup_iommu(void)
+@@ -157,6 +158,10 @@ static void haswell_setup_misc(void)
+ static void haswell_setup_iommu(void)
 {
 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
 +	u8 enable_iommu = get_uint_option("iommu", 1);
 +
 +	if (!enable_iommu)
 +		return;
-+
+ 
 	if (capid0_a & VTD_DISABLE)
 		return;
- 
 -- 
 2.47.3

@@ -1,7 +1,7 @@
-From 2bd978a08ffee969bbf61af8f145b9e6b050d321 Mon Sep 17 00:00:00 2001
+From 0f76a919522c9624c2b5df2a9c17525ab21bd6b9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 13/51] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 12/48] dell/optiplex_9020: Disable IOMMU by default

 Needed to make graphics cards work. Turning it on is
 recommended if only using iGPU, otherwise leave it off
@@ -1,7 +1,7 @@
-From 1179f45055fffb383fffe806e313a315de7c4205 Mon Sep 17 00:00:00 2001
+From df64f2825157226b98e002e746114e25b0047438 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 14/51] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 13/48] nb/haswell: Fully disable iGPU when dGPU is used

 My earlier patch disabled decode *and* disabled the iGPU itself, but
 a subsequent revision disabled only VGA decode. Upon revisiting, I
@@ -33,10 +33,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
 1 file changed, 3 insertions(+)

 diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index fc44a98a57..451147d082 100644
+index f7fad3183d..1b188e92e1 100644
 --- a/src/northbridge/intel/haswell/gma.c
 +++ b/src/northbridge/intel/haswell/gma.c
-@@ -655,6 +655,9 @@ static void gma_func0_disable(struct device *dev)
+@@ -466,6 +466,9 @@ static void gma_func0_disable(struct device *dev)
 {
 	/* Disable VGA decode */
 	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
@@ -1,7 +1,7 @@
-From 59b741bf1b74a2c4e108755fbfd1580894c7d783 Mon Sep 17 00:00:00 2001
+From fdf4774a6e80b1f94079abb346049113dfbf5241 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH 15/51] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 14/48] ec/dell/mec5035: Add S3 suspend SMI handler

 This is necessary for S3 resume to work on SNB and newer Dell Latitude
 laptops. If a command isn't sent, the EC cuts power to the DIMMs,
@@ -1,7 +1,7 @@
-From 3c1416797f2deafbd6b56774d890706aaea3614f Mon Sep 17 00:00:00 2001
+From 18216387e5c40ec3c80c63ec25e9b0c55a009cff Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 16/51] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 15/48] nb/haswell: lock policy regs when disabling IOMMU

 Angel Pons told me I should do it. See comments here:
 https://review.coreboot.org/c/coreboot/+/81016
@@ -18,25 +18,20 @@ on the 9020, so that users can install graphics cards easily.

 Signed-off-by: Leah Rowe <info@minifree.org>
 ---
- src/northbridge/intel/haswell/early_init.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
+ src/northbridge/intel/haswell/early_init.c | 15 +++++++--------
+ 1 file changed, 7 insertions(+), 8 deletions(-)

 diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
-index 5f07fa0b17..30660e3903 100644
+index 1a7e0b1076..e9506ee830 100644
 --- a/src/northbridge/intel/haswell/early_init.c
 +++ b/src/northbridge/intel/haswell/early_init.c
-@@ -86,15 +86,17 @@ static void northbridge_setup_iommu(void)
- 	if (!enable_iommu)
- 		return;
+@@ -160,17 +160,16 @@ static void haswell_setup_iommu(void)
+ 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
+ 	u8 enable_iommu = get_uint_option("iommu", 1);
 
-+	if (enable_iommu) {
-+		/* Setup BARs: zeroize top 32 bits; set enable bit */
-+		mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
-+		mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
-+		mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
-+		mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
-+	}
-+
+-	if (!enable_iommu)
+-		return;
+-
 	if (capid0_a & VTD_DISABLE)
 		return;
 
@@ -45,10 +40,16 @@ index 5f07fa0b17..30660e3903 100644
 -	mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
 -	mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
 -	mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
-
- 	if (cpu_is_haswell()) {
- 		/*
- 		 * Intel Document 492662 (Haswell System Agent BIOS Spec), Rev 1.6.0
+	if (enable_iommu) {
+		/* Setup BARs: zeroize top 32 bits; set enable bit */
+		mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
+		mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
+		mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
+		mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
+	}
+ 
+ 	/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
+ 	u32 reg32;
 -- 
 2.47.3

@@ -1,7 +1,7 @@
-From 4347eae3a819dff7b6715630208d4be74b8245e4 Mon Sep 17 00:00:00 2001
+From d797b9d19c6bc3224897000756caef29e98dd266 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 17/51] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 16/48] nb/intel/gm45: Make DDR2 raminit work

 List of changes:
 - Update some timing and ODT values
@@ -20,7 +20,7 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 3 files changed, 106 insertions(+), 13 deletions(-)

 diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
-index 90ab570524..d537ef82af 100644
+index f68bfdee7a..b76117bc3a 100644
 --- a/src/northbridge/intel/gm45/gm45.h
 +++ b/src/northbridge/intel/gm45/gm45.h
@@ -420,7 +420,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
@@ -1,7 +1,7 @@
-From 8effb91216e331655ab64bc0aa114a3b38baec9c Mon Sep 17 00:00:00 2001
+From e573065ac900d4decfd4dbd0a1464d82501ac3c5 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 6 Aug 2024 00:50:24 +0100
-Subject: [PATCH 18/51] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+Subject: [PATCH 17/48] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards

 We add this patch:

@@ -1,7 +1,7 @@
-From c7b85347f892432b31000c67efccc02c84d9394a Mon Sep 17 00:00:00 2001
+From 130a5ca25fbedb58e49b613e4a7cece715b545ae Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
-Subject: [PATCH 19/51] mb/dell/e6400: Use 100 MHz reference clock for display
+Subject: [PATCH 18/48] mb/dell/e6400: Use 100 MHz reference clock for display

 The E6400 uses a 100 MHz reference clock for spread spectrum support on
 LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
@@ -1,7 +1,7 @@
-From 6d1cbaedc747afe4acd8b13240c56232ba870639 Mon Sep 17 00:00:00 2001
+From 7641a4b9b91c385223026cd566e0ffc2a2aa0d8f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Mon, 12 Aug 2024 02:15:24 +0100
-Subject: [PATCH 20/51] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+Subject: [PATCH 19/48] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ

 set it to 96MHz. fixes the following build error when
 building for x4x boards e.g. gigabyte ga-g41m-es2l:
@@ -1,7 +1,7 @@
-From bd1594c9025dbd84cdce4aac02152b809b67b108 Mon Sep 17 00:00:00 2001
+From 36126c093a9b9e01d41f0a68977cd09070c3c276 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:51:25 -0600
-Subject: [PATCH 21/51] mb/dell/gm45_latitudes: Add E4300 variant
+Subject: [PATCH 20/48] mb/dell/gm45_latitudes: Add E4300 variant

 Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -1,7 +1,7 @@
-From 7fda207316f80a5bdffe428309df32a278d13c93 Mon Sep 17 00:00:00 2001
+From 4caca6e6e349fa1913df622081025ea53bfd136f Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH 22/51] mb/dell: Add S3 SMI handler for Dell Latitudes
+Subject: [PATCH 21/48] mb/dell: Add S3 SMI handler for Dell Latitudes

 Integrate the previously added mec5035_smi_sleep() function into
 mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
@@ -1,7 +1,7 @@
-From 8f5399ac24599f6d0f1912d46f253a91d67536cf Mon Sep 17 00:00:00 2001
+From 669ef0d2c72326134f64a4fe70f67220ec690c5e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 31 Dec 2024 14:42:24 +0000
-Subject: [PATCH 23/51] Disable compression on refcode insertion
+Subject: [PATCH 22/48] Disable compression on refcode insertion

 Compression is not reliably reproducible. In an lbmk release
 context, this means we cannot rely on vendorfile insertion.
@@ -14,10 +14,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/Makefile.mk b/Makefile.mk
-index dbad313911..8f541ad187 100644
+index 5fccb4a52d..c40e06c453 100644
 --- a/Makefile.mk
 +++ b/Makefile.mk
-@@ -1432,7 +1432,7 @@ endif
+@@ -1414,7 +1414,7 @@ endif
 cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
 $(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)
 $(CONFIG_CBFS_PREFIX)/refcode-type := stage
@@ -1,7 +1,7 @@
-From 1e3e9ea40f4b43b9ffbb390222d8c4a4a67dd332 Mon Sep 17 00:00:00 2001
+From c7b136f1f4fa2bc1a783711b5a1ee82c5d9ce69f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 21 Apr 2025 02:58:47 +0100
-Subject: [PATCH 24/51] nb/intel/*: Disable stack overflow debug options
+Subject: [PATCH 23/48] nb/intel/*: Disable stack overflow debug options

 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -52,10 +52,10 @@ index 35e89b0c88..c5456d0ddf 100644
 +
 endif
 diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
-index d67cc14660..fa22e35ccb 100644
+index c57f1ec380..0a5181b183 100644
 --- a/src/northbridge/intel/haswell/Kconfig
 +++ b/src/northbridge/intel/haswell/Kconfig
-@@ -9,6 +9,15 @@ config NORTHBRIDGE_INTEL_HASWELL
+@@ -10,6 +10,15 @@ config NORTHBRIDGE_INTEL_HASWELL
 
 if NORTHBRIDGE_INTEL_HASWELL
 
@@ -1,7 +1,7 @@
-From d83715448c0f7467ddf94e5c0a53560c5ff3b86b Mon Sep 17 00:00:00 2001
+From c15a0ef9b964e9df9a5578ed271af4f1c0419f38 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 25/51] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 24/48] mb/dell: Add Optiplex 780 MT (x4x/ICH10)

 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -1,7 +1,7 @@
-From 3a5fa257c1b74c6e9e3556147114fc7691dc9e49 Mon Sep 17 00:00:00 2001
+From bfd5f6628a69d8704a84b30c4027149fe1b21efa Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 26/51] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 25/48] mb/dell/optiplex_780: Add USFF variant

 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -1,7 +1,7 @@
-From 5573eeadf45023d49f09606c6219004e20ba4b3c Mon Sep 17 00:00:00 2001
+From 82f47133c20abc720f5d5fa8a54be465ebd95f28 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 01:53:53 +0000
-Subject: [PATCH 27/51] src/intel/x4x: Disable stack overflow debug
+Subject: [PATCH 26/48] src/intel/x4x: Disable stack overflow debug

 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -1,7 +1,7 @@
-From 2973ad1738fb6c1ebd2a92d008e1cbd39c74abb2 Mon Sep 17 00:00:00 2001
+From 5c4439fb513c315ef3effff19146b331c492fa9b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 22 Apr 2025 10:21:59 +0100
-Subject: [PATCH 28/51] hp/8300cmt: remove xhci_overcurrent_mapping
+Subject: [PATCH 27/48] hp/8300cmt: remove xhci_overcurrent_mapping

 No longer needed, as per the following commit:

@@ -1,7 +1,7 @@
-From ff57e763d1f966584ac9b68fa1a1f204626a577b Mon Sep 17 00:00:00 2001
+From 71ec1f7a6480e72b77a567f8cc0c2673a5e7905f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 11 Dec 2024 01:06:01 +0000
-Subject: [PATCH 29/51] dell/3050micro: disable nvme hotplug
+Subject: [PATCH 28/48] dell/3050micro: disable nvme hotplug

 in my testing, when running my 3050micro for a few days,
 the nvme would sometimes randomly rename.
@@ -1,7 +1,7 @@
-From 7c4df892425e076b1d2768f9b99362f58e7872dc Mon Sep 17 00:00:00 2001
+From 95a0af0eea56e1bddcb243ed135835448b90fa56 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 01:36:23 +0000
-Subject: [PATCH 30/51] src/intel/skylake: Disable stack overflow debug options
+Subject: [PATCH 29/48] src/intel/skylake: Disable stack overflow debug options

 The option was appearing in T480/3050micro configs of lbmk,
 after updating on the coreboot/next uprev for 20241206 rev8:
@@ -37,10 +37,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 9 insertions(+)

 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index c76239936a..f8ff8cfa7a 100644
+index 7c530f2c75..70c2a7643c 100644
 --- a/src/soc/intel/skylake/Kconfig
 +++ b/src/soc/intel/skylake/Kconfig
-@@ -136,6 +136,15 @@ config DCACHE_RAM_SIZE
+@@ -131,6 +131,15 @@ config DCACHE_RAM_SIZE
 	  The size of the cache-as-ram region required during bootblock
 	  and/or romstage.
 
@@ -1,7 +1,7 @@
-From 564634f7f83f4118e44972c91e391125a7aa6e27 Mon Sep 17 00:00:00 2001
+From 7d94457ba0e2be10d781c5fd0659d895c9b558b1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Thu, 26 Dec 2024 19:45:20 +0000
-Subject: [PATCH 31/51] soc/intel/skylake: Don't compress FSP-S
+Subject: [PATCH 30/48] soc/intel/skylake: Don't compress FSP-S

 Build systems like lbmk need to reproducibly insert
 certain vendor files on release images.
@@ -19,10 +19,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index f8ff8cfa7a..97354cdaa5 100644
+index 70c2a7643c..a2854923e7 100644
 --- a/src/soc/intel/skylake/Kconfig
 +++ b/src/soc/intel/skylake/Kconfig
-@@ -15,7 +15,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
+@@ -14,7 +14,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
 	select DRAM_SUPPORT_DDR4
 	select DRIVERS_USB_ACPI
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
@@ -1,7 +1,7 @@
-From 9e50b19e8d892819bebbebafe25c175f5a8faece Mon Sep 17 00:00:00 2001
+From 8768e53f3b2ceb00ec0c8abf0fc0af03993820b1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 18 Dec 2024 02:06:18 +0000
-Subject: [PATCH 32/51] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
+Subject: [PATCH 31/48] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN

 This is used by lbmk to know where a tb.bin file goes,
 when extracting and padding TBT.bin from Lenovo ThunderBolt
@@ -1,7 +1,7 @@
-From eb332dd2c30c54a78cd0ce573c3358df458ad8c5 Mon Sep 17 00:00:00 2001
+From 579c60fd77517497eb18dfeca8d73cdca94c15da Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 21 Apr 2025 05:14:45 +0100
-Subject: [PATCH 33/51] Conditional TBFW setting for kabylake thinkpads
+Subject: [PATCH 32/48] Conditional TBFW setting for kabylake thinkpads

 Otherwise, other boards will define it, which
 might trigger the vendor download script, and
@@ -1,7 +1,7 @@
-From 97c167555bec5e8a69b90379c3350766fc5b1107 Mon Sep 17 00:00:00 2001
+From 23d8a97ff213f744b4e6333d92fc90e9ea97e879 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 27 Sep 2025 23:30:46 +0300
-Subject: [PATCH 34/51] soc/intel/alderlake: Disable
+Subject: [PATCH 33/48] soc/intel/alderlake: Disable
 MRC_CACHE_USING_MRC_VERSION

 There's some issue with building against the FSP headers in src/vendorcode.
@@ -14,7 +14,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
 1 file changed, 1 deletion(-)

 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 334ea26e5b..0f1404ea49 100644
+index 34c9baf544..e0ab6b10fd 100644
 --- a/src/soc/intel/alderlake/Kconfig
 +++ b/src/soc/intel/alderlake/Kconfig
@@ -36,7 +36,6 @@ config SOC_INTEL_ALDERLAKE
@@ -1,7 +1,7 @@
-From fd552921d0a34b8ac2f9c21f8c1abf47f2f0c160 Mon Sep 17 00:00:00 2001
+From e2e070ab1f080c0ae59c43131faa57f3499fd813 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 28 Sep 2025 03:17:50 +0100
-Subject: [PATCH 35/51] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)
+Subject: [PATCH 34/48] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)

 if you pass -k (keep fptr modules), don't use -r, don't
 use -t, you can essentially just use me_cleaner to
@@ -1,7 +1,7 @@
-From f91e6c35aa0ff7111e65a89a4828b773d038a69c Mon Sep 17 00:00:00 2001
+From fee89a6c872ec26c2ea128ecdce62d6c3abe53f1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 4 Oct 2025 21:57:43 +0100
-Subject: [PATCH 36/51] soc/intel/alderlake: Don't compress FSP-S
+Subject: [PATCH 35/48] soc/intel/alderlake: Don't compress FSP-S

 Build systems like lbmk need to reproducibly insert
 certain vendor files on release images.
@@ -18,7 +18,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 0f1404ea49..f78729a9c4 100644
+index e0ab6b10fd..a2e7cff6f6 100644
 --- a/src/soc/intel/alderlake/Kconfig
 +++ b/src/soc/intel/alderlake/Kconfig
@@ -16,7 +16,7 @@ config SOC_INTEL_ALDERLAKE
@@ -1,7 +1,7 @@
-From ab4937af6e193b057a8b0212f0667e57eb7ba7d7 Mon Sep 17 00:00:00 2001
+From abd26006eff71c9570bc90fdbce3a76f8f559cea Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 4 Oct 2025 22:20:11 +0100
-Subject: [PATCH 37/51] alderlake: don't require full fsp repo for fd path
+Subject: [PATCH 36/48] alderlake: don't require full fsp repo for fd path

 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 8 insertions(+), 1 deletion(-)

 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index f78729a9c4..c05d06289e 100644
+index a2e7cff6f6..3402c1e3d5 100644
 --- a/src/soc/intel/alderlake/Kconfig
 +++ b/src/soc/intel/alderlake/Kconfig
-@@ -442,7 +442,14 @@ config FSP_HEADER_PATH
+@@ -430,7 +430,14 @@ config FSP_HEADER_PATH
 
 config FSP_FD_PATH
 	string
@@ -1,7 +1,7 @@
-From dec241cc53669870365e103a22d21a9a3111abcc Mon Sep 17 00:00:00 2001
+From 6a4a79d82df982c2fca859101040e407623f519c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Oct 2025 04:47:06 +0100
-Subject: [PATCH 38/51] soc/alderlake: disable stack overflow debug option
+Subject: [PATCH 37/48] soc/alderlake: disable stack overflow debug option

 same as on other boards. based on this commit:

@@ -22,10 +22,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 9 insertions(+)

 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index c05d06289e..acb87275d4 100644
+index 3402c1e3d5..06b9199e84 100644
 --- a/src/soc/intel/alderlake/Kconfig
 +++ b/src/soc/intel/alderlake/Kconfig
-@@ -343,6 +343,15 @@ config SOC_INTEL_UFS_CLK_FREQ_HZ
+@@ -331,6 +331,15 @@ config SOC_INTEL_UFS_CLK_FREQ_HZ
 	int
 	default 19200000
 
@@ -1,7 +1,7 @@
-From fa7d21faf931756d8adb84071bc503a0fe8e64c3 Mon Sep 17 00:00:00 2001
+From bb286d13cb7702e9396deab04023cc58dcc01a15 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sun, 11 May 2025 15:41:22 -0600
-Subject: [PATCH 39/51] ec/dell/mec5035: Add command to disable EC-initiated
+Subject: [PATCH 38/48] ec/dell/mec5035: Add command to disable EC-initiated
 thermal shutdown

 If command 0xBF isn't sent, the EC shuts down the system without warning
@@ -1,7 +1,7 @@
-From 0397a0966953d47210a5ae1f7f0cd71a9a10dc68 Mon Sep 17 00:00:00 2001
+From a93c01173c2f88b4a09286740c030314040c39fc Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sun, 11 May 2025 16:28:23 -0600
-Subject: [PATCH 40/51] mb/dell/snb_ivb_latitude: Disable EC initiated shutdown
+Subject: [PATCH 39/48] mb/dell/snb_ivb_latitude: Disable EC initiated shutdown
 at 87 degrees

 If command 0xBF isn't sent, the EC will shut down the system without
@@ -1,7 +1,7 @@
-From 42fb6f08310a35587643bdfd75bcdca5318f1022 Mon Sep 17 00:00:00 2001
+From dc4036353483c5fc0c140fc269d9bddb0bb7a967 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 20 Dec 2025 20:12:48 +0100
-Subject: [PATCH 41/51] fix ifdtool build
+Subject: [PATCH 40/48] fix ifdtool build

 not my mistake. someone messed up.

@@ -11,10 +11,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 7f0c10bd0b..2a5365efe7 100644
+index cab934c3a5..d181888e0f 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -2610,7 +2610,7 @@ int main(int argc, char *argv[])
+@@ -2598,7 +2598,7 @@ int main(int argc, char *argv[])
                        }
                        mode_nuke = 1;
                        break;
@@ -1,7 +1,7 @@
-From 5bcd048c8ded00a7c12e863a1a9a76c9bba1606a Mon Sep 17 00:00:00 2001
+From 5b7bbc6fcc6f737f259906f1919c1e28b6628a7e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 20 Dec 2025 22:36:18 +0100
-Subject: [PATCH 42/51] tests/Makefile.mk: use 3rdparty/cmocka by default
+Subject: [PATCH 41/48] tests/Makefile.mk: use 3rdparty/cmocka by default

 (tests)

@@ -1,7 +1,7 @@
-From ac1c23e215f791c46094377f2f4c7a398e63cc80 Mon Sep 17 00:00:00 2001
+From ecbf5a133d839b6c8579e384e9db0a036eca939d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 23 Dec 2025 18:41:27 +0100
-Subject: [PATCH 43/51] mb/dell/optiplex_780: use legacy HDA verb table
+Subject: [PATCH 42/48] mb/dell/optiplex_780: use legacy HDA verb table

 See:

@@ -1,7 +1,7 @@
-From 8802ad95c158e09e89c4bc0c14755d17b5f532bd Mon Sep 17 00:00:00 2001
+From 962bfe1366598145a93cf6a7ed0f78393e5e9ff7 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 23 Dec 2025 18:46:45 +0100
-Subject: [PATCH 44/51] hp8300cmt: use legacy verb table
+Subject: [PATCH 43/48] hp8300cmt: use legacy verb table

 same as for the 780 optiplex patch

@@ -1,7 +1,7 @@
-From ea848531d1a4ddd9952b8b8d3570770e5ac128cd Mon Sep 17 00:00:00 2001
+From 88d29f792de89bb0a138e671432227cb5679b5ae Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 6 Jan 2026 21:42:21 +0000
-Subject: [PATCH 45/51] topton x2e n150: use old fsp
+Subject: [PATCH 44/48] topton x2e n150: use old fsp

 i added the old fsp back, so that we didn't have to
 mess around with vendor files in lbmk, because coreboot
@@ -18,10 +18,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
 1 file changed, 1 insertion(+)

 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index acb87275d4..6f1e8b9107 100644
+index 06b9199e84..f260d10285 100644
 --- a/src/soc/intel/alderlake/Kconfig
 +++ b/src/soc/intel/alderlake/Kconfig
-@@ -463,6 +463,7 @@ config FSP_FD_PATH
+@@ -451,6 +451,7 @@ config FSP_FD_PATH
 	default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd"   if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S
 	default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd"     if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P
 	default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd"     if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_S
@@ -1,7 +1,7 @@
-From 276e29864adfaaa1234d1263a8bf751f7dfd357d Mon Sep 17 00:00:00 2001
+From 5b52abaa8529f7493f9d4ecf402e9ee130f4f8d2 Mon Sep 17 00:00:00 2001
 From: Ron Nazarov <ron@noisytoot.org>
 Date: Sat, 14 Feb 2026 20:13:01 +0000
-Subject: [PATCH 46/51] mb/supermicro/x11-lga1151-series: Disable ME HECI in
+Subject: [PATCH 45/48] mb/supermicro/x11-lga1151-series: Disable ME HECI in
 devicetree

 Since we always use me_cleaner, this speeds up boot time by preventing
@@ -14,7 +14,7 @@ Signed-off-by: Ron Nazarov <ron@noisytoot.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
-index d25288420f..edbb485969 100644
+index fbf896c6ae..aa09a41f2f 100644
 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
 +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
@@ -15,7 +15,7 @@ chip soc/intel/skylake
@@ -1,15 +1,15 @@
-From 37f24d5775dd9d29e91e42d6de952d8d791cf7c5 Mon Sep 17 00:00:00 2001
+From b9cc1be6f9d591dbc4f73b1448f8fce5ea20a0b4 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 20 Feb 2026 01:23:32 +0000
-Subject: [PATCH 47/51] util/ifdtool: option to allow region override
+Subject: [PATCH 46/48] util/ifdtool: option to allow region override

 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
- util/ifdtool/ifdtool.c | 13 +++++++++++--
- 1 file changed, 11 insertions(+), 2 deletions(-)
+ util/ifdtool/ifdtool.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)

 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 2a5365efe7..c5c3570e6a 100644
+index d181888e0f..dfefe316a9 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
@@ -78,6 +78,8 @@ static unsigned int max_regions = 0;
@@ -21,7 +21,7 @@ index 2a5365efe7..c5c3570e6a 100644
 static const struct region_name region_names[MAX_REGIONS] = {
 	{ "Flash Descriptor", "fd", "flashregion_0_flashdescriptor.bin", "SI_DESC" },
 	{ "BIOS", "bios", "flashregion_1_bios.bin", "SI_BIOS" },
-@@ -2094,7 +2096,9 @@ static void new_layout(const char *filename, char *image, int size,
+@@ -2093,7 +2095,9 @@ static void new_layout(const char *filename, char *image, int size,
 		}
 
 		for (j = i + 1; j < max_regions; j++) {
@@ -29,18 +29,10 @@ index 2a5365efe7..c5c3570e6a 100644
 +			if (ignore_region_override) {
 +				printf("Ignoring region overlap by user's will.\n");
 +			} else if (regions_collide(&new_regions[i], &new_regions[j])) {
- 				fprintf(stderr, "Regions would overlap:\n");
- 
- 				/* See which string is longer and make sure we pad the shorter one */
-@@ -2107,6 +2111,7 @@ static void new_layout(const char *filename, char *image, int size,
- 					new_regions[i].base, new_regions[i].limit);
- 				fprintf(stderr, "  %*s : %x-%x\n", padding, region_name(j),
- 					new_regions[j].base, new_regions[j].limit);
-+
+ 				fprintf(stderr, "Regions would overlap.\n");
 				exit(EXIT_FAILURE);
 			}
- 		}
-@@ -2363,10 +2368,11 @@ int main(int argc, char *argv[])
+@@ -2351,10 +2355,11 @@ int main(int argc, char *argv[])
 		{"newvalue", 1, NULL, 'V'},
 		{"topswapsize", 1, NULL, 'T'},
 		{"nuke", 1, NULL, 'N'},
@@ -53,7 +45,7 @@ index 2a5365efe7..c5c3570e6a 100644
 					long_options, &option_index)) != EOF) {
 		switch (opt) {
 		case 'd':
-@@ -2610,6 +2616,9 @@ int main(int argc, char *argv[])
+@@ -2598,6 +2603,9 @@ int main(int argc, char *argv[])
                        }
                        mode_nuke = 1;
                        break;
@@ -1,7 +1,7 @@
-From fb4bc4ed6e1fca747e54a34127ca927cb70318ad Mon Sep 17 00:00:00 2001
+From 1bc6028bf88ca6306ad89fc17fa6f31b9788b248 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 20 Feb 2026 19:31:19 +0000
-Subject: [PATCH 48/51] me_cleaner: don't modify if -k is used
+Subject: [PATCH 47/48] me_cleaner: don't modify if -k is used

 don't remove *anything*. in libreboot, we only
 ever use -k when we werely want to extract the
@@ -1,7 +1,7 @@
-From 3535480a7ec3fbf789ff734570d8213f21ee7be1 Mon Sep 17 00:00:00 2001
+From f5f73c2539e05cf85bf5eec795e4f91da50838ba Mon Sep 17 00:00:00 2001
 From: Kat Inskip <kat@inskip.me>
 Date: Tue, 17 Feb 2026 16:18:15 -0800
-Subject: [PATCH 49/51] mb/lenovo/sklkbl: Add Lenovo Thinkpad X270 as a variant
+Subject: [PATCH 48/48] mb/lenovo/sklkbl: Add Lenovo Thinkpad X270 as a variant

 This machine is somewhat dissimilar from the X280 in the PCIe allocations in the overridetree. It also lacks soldered RAM, having a single SODIMM slot.

@@ -28,10 +28,10 @@ An untested variety allowing for a Skylake CPU (for 20K5 and 20K6) has been incl
 create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/overridetree.cb

 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-index 9d4b5f4965..1aaef40a0c 100644
+index b7cc705699..5945fe7b99 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-@@ -59,6 +59,16 @@ config BOARD_LENOVO_X280
+@@ -58,6 +58,16 @@ config BOARD_LENOVO_X280
 	select SOC_INTEL_KABYLAKE
 	select HAVE_SPD_IN_CBFS
 
@@ -48,7 +48,7 @@ index 9d4b5f4965..1aaef40a0c 100644
 if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
 
 config MAINBOARD_DIR
-@@ -70,6 +80,8 @@ config VARIANT_DIR
+@@ -69,6 +79,8 @@ config VARIANT_DIR
 	default "t480s" if BOARD_LENOVO_T480S
 	default "t580" if BOARD_LENOVO_T580
 	default "x280" if BOARD_LENOVO_X280
@@ -57,7 +57,7 @@ index 9d4b5f4965..1aaef40a0c 100644
 
 config OVERRIDE_DEVICETREE
 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
-@@ -80,6 +92,8 @@ config MAINBOARD_PART_NUMBER
+@@ -79,6 +91,8 @@ config MAINBOARD_PART_NUMBER
 	default "T480s" if BOARD_LENOVO_T480S
 	default "T580" if BOARD_LENOVO_T580
 	default "X280" if BOARD_LENOVO_X280
@@ -1,7 +1,7 @@
-From 15cfc08cea1e4a091a2dd729bf88fa2a10ef0a3d Mon Sep 17 00:00:00 2001
+From 9d39437b9447ab6e6164440bddf459111bd4903f Mon Sep 17 00:00:00 2001
 From: Kat Inskip <kat@inskip.me>
 Date: Sat, 21 Feb 2026 19:48:17 +0000
-Subject: [PATCH 50/51] mb/lenovo/x270: Provide correct vbt and hda_verb
+Subject: [PATCH] mb/lenovo/x270: Provide correct vbt and hda_verb

 ---
 .../sklkbl_thinkpad/variants/x270/data.vbt    | Bin 6144 -> 4449 bytes
@@ -12,34 +12,37 @@ diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/data.vbt b/src/m
 index bfb312850e0ab4ea834c535df35edb45834ed248..c6561a9c57e4e600bc0adb5f6679f2f5d6b6c640 100644
 GIT binary patch
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 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/x270/hda_verb.c
 index 089e605eaf..60289355f8 100644
@@ -125,5 +128,5 @@ index 089e605eaf..60289355f8 100644
 };
 
 -- 
-2.47.3
+2.52.0

@@ -1,8 +1,7 @@
-From 24cb7949962e910c22ccb3e388699709591f2834 Mon Sep 17 00:00:00 2001
+From 24856e5e383b1b9aa078b879064b8c2b99f4494c Mon Sep 17 00:00:00 2001
 From: Todd Baker <todd_baker@student.uml.edu>
 Date: Thu, 12 Mar 2026 13:12:04 -0400
-Subject: [PATCH 51/51] mb/dell: Add OptiPlex 3040 Micro port
- (upstream-compatible)
+Subject: [PATCH] mb/dell: Add OptiPlex 3040 Micro port (upstream-compatible)

 Based on the OptiPlex 3050 Micro (same Skylake H110 PCH-H platform).
 Key differences from 3050:
@@ -348,33 +347,32 @@ new file mode 100644
 index 0000000000000000000000000000000000000000..b503dfc20277775982256a4bdc9108c2ad96f856
 GIT binary patch
 literal 4300
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 literal 0
 HcmV?d00001
@@ -1526,5 +1524,5 @@ index 0000000000..9d262d5787
 +
 +#endif
 -- 
-2.47.3
+2.53.0

@@ -0,0 +1,46 @@
+From 88519aed6c7f305f7f2319e335c1421137df7ce3 Mon Sep 17 00:00:00 2001
+From: Ron Nazarov <ron@noisytoot.org>
+Date: Mon, 23 Mar 2026 17:04:03 +0000
+Subject: [PATCH] mb/supermicro/x11-lga1151-series: Enable SATA hotplug
+
+Before this patch, hotplugging only worked to replace drives (if you
+tried to plug a drive into a SATA port that no drive was plugged in to
+at boot, it wouldn't be detected) and you'd have to manually rescan
+the bus (echo "- - -" > /sys/class/scsi_host/host*/scan) to make
+plugs/unplugs get detected by the operating system.
+
+Now, hotplugging works for all ports (tested and working on Supermicro
+X11SSH-LN4F) and there's no need to manually rescan (it sometimes
+takes a few seconds for unplugs to be detected, but plugs are detected
+instantly).
+
+Change-Id: Id978a047697795ea657048fb6dc6665736c293f9
+Signed-off-by: Ron Nazarov <ron@noisytoot.org>
+---
+ .../supermicro/x11-lga1151-series/devicetree.cb        | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
+index fbf896c6ae..d25288420f 100644
+--- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
+@@ -28,6 +28,16 @@ chip soc/intel/skylake
+ 				[6] = 1,
+ 				[7] = 1,
+ 			}"
+			register "SataPortsHotPlug" = "{
+				[0] = 1,
+				[1] = 1,
+				[2] = 1,
+				[3] = 1,
+				[4] = 1,
+				[5] = 1,
+				[6] = 1,
+				[7] = 1,
+			}"
+ 		end
+ 		device ref lpc_espi on
+ 			register "serirq_mode" = "SERIRQ_CONTINUOUS"
+-- 
+2.52.0
+
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later

 tree="default"
-rev="62c8197dd25376cb7b18d272af167cb176d28bcf"
+rev="ed5a993f0f98a47d5e780e375e5861860019b183"