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util: Import autoport with Haswell patches

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This is a copy of coreboot's autoport utility, with a patch applied to
support Haswell/Lynx Point platforms. That patch is currently in review
on coreboot's Gerrit.

https://review.coreboot.org/c/coreboot/+/30890

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
This commit is contained in:
Nicholas Chin
2024-03-18 10:45:05 -06:00
parent c578fe56c3
commit 8cba237086
18 changed files with 3918 additions and 0 deletions
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util/autoport/rce823.go
+39
View File
@@ -0,0 +1,39 @@
package main
import "fmt"
type rce823 struct {
variant string
}
func (r rce823) Scan(ctx Context, addr PCIDevData) {
if addr.Dev == 0 && addr.Func == 0 {
cur := DevTreeNode{
Chip: "drivers/ricoh/rce822",
Comment: "Ricoh cardreader",
Registers: map[string]string{
"sdwppol": fmt.Sprintf("%d", (addr.ConfigDump[0xfb]&2)>>1),
"disable_mask": fmt.Sprintf("0x%x", addr.ConfigDump[0xcb]),
},
PCISlots: []PCISlot{
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 0}, writeEmpty: false},
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 1}, writeEmpty: false},
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 2}, writeEmpty: false},
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 3}, writeEmpty: false},
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 4}, writeEmpty: false},
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 5}, writeEmpty: false},
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 6}, writeEmpty: false},
PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 7}, writeEmpty: false},
},
}
PutPCIChip(addr, cur)
}
PutPCIDev(addr, "Ricoh SD card reader")
KconfigBool["DRIVERS_RICOH_RCE822"] = true
}
func init() {
RegisterPCI(0x1180, 0xe822, rce823{})
RegisterPCI(0x1180, 0xe823, rce823{})
}