coja/lbmk
1
0
Fork 0
mirror of https://codeberg.org/libreboot/lbmk.git synced 2026-07-20 15:03:44 +02:00
Code Issues Packages Projects Releases Wiki Activity

coreboot: re-configure gm45 thinkpads from scratch

Browse Source 
TSEG Stage Cache enabled again, because disabling it
did not affect S3 in any way.

Many configs have changed, and debug level is set to 7.

In testing with V-T60 on IRC, it wasn't just removal of
the DDR2 patch that I did, but I re-did the configs too,
in exactly the same way I've done them here, when testing
on an X200 to fix boot issues.

Libreboot does not use defconfigs, instead it uses full
configs, and these have to be updated. I normally just
run make-oldconfig on every config, for revision updates.

However, every now and then, we need to re-do them.

Play it safe and re-do every config. I've double- and
triple-checked that the configs are correct.

Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2023-11-05 12:58:54 +00:00
parent 742c00331e
commit 72e7d090c9
57 changed files with 1079 additions and 431 deletions
Download Patch File Download Diff File Expand all files Collapse all files
config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+12 -10
View File
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
# CONFIG_UBSAN is not set
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
# CONFIG_ASAN is not set
CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_NO_STAGE_CACHE is not set
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
@@ -146,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -414,17 +414,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_PCIEXP_HOTPLUG_IO=0x800
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
# CONFIG_INTEL_GMA_ADD_VBT is not set
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -480,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
# end of Generic Drivers
#
@@ -545,15 +546,15 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
@@ -561,7 +562,7 @@ CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
# CONFIG_POST_DEVICE_PCI_PCIE is not set
CONFIG_POST_IO_PORT=0x80
CONFIG_HWBASE_DEBUG_NULL=y
CONFIG_HWBASE_DEBUG_CB=y
# end of Console
CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
config/coreboot/x200_8mb/config/libgfxinit_txtmode
+12 -10
View File
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
# CONFIG_UBSAN is not set
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
# CONFIG_ASAN is not set
CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_NO_STAGE_CACHE is not set
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_FW_CONFIG is not set
@@ -144,7 +144,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -410,17 +410,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_PCIEXP_HOTPLUG_IO=0x800
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
# CONFIG_INTEL_GMA_ADD_VBT is not set
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -476,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
# end of Generic Drivers
#
@@ -541,15 +542,15 @@ CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
@@ -557,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
# CONFIG_POST_DEVICE_PCI_PCIE is not set
CONFIG_POST_IO_PORT=0x80
CONFIG_HWBASE_DEBUG_NULL=y
CONFIG_HWBASE_DEBUG_CB=y
# end of Console
CONFIG_HAVE_ACPI_RESUME=y
@@ -604,6 +605,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
config/coreboot/x200_8mb/target.cfg
+1 -1
View File
@@ -1,5 +1,5 @@
tree="default"
romtype="8MiB ICH9 IFD NOR flash"
romtype="normal"
arch="x86_64"
payload_grub="y"
payload_grub_withseabios="y"