SeaBIOS/default: Bump to rev b686f460, 28 Jun 2025

This brings in the following changes:

* b686f460 sercon: Fix keycodes for F11 and F12
* b52ca86e docs: Note v1.17.0 release
* a6c8e8bb ahci: Fix hangs due to controller reset

The serial console fix is useful to us, as is the AHCI
fix; the latter was previously mitigated by removing
SeaBIOS's AHCI reset patch.

Upstream realised that the AHCI controllers need to have
a timeout on them when resetting them, because they don't
always react immediately to commands.

This makes the AHCI behaviour more correct, in SeaBIOS.

Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2025-07-06 15:31:48 +01:00
parent 248192ad9a
commit 5b2661a485
2 changed files with 1 additions and 64 deletions
@@ -1,63 +0,0 @@
From 5fe2215bc5196d836b54e1e5fb00b63fa096fda7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 1 May 2025 15:46:54 +0100
Subject: [PATCH 4/4] ahci: Only reset controller on CSM
Please refer to this commit:
commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: Thu Feb 6 12:10:21 2025 +0100
ahci: add controller reset
This commit broke AHCI init on the Lenovo ThinkPad T420,
when tested with SeaBIOS as a coreboot payload.
Since the above commit was made with CSMs in mind, to make
the AHCI driver work there, that change has been re-worked
so as to only apply when a CSM is in use.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/hw/ahci.c | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/src/hw/ahci.c b/src/hw/ahci.c
index 2285d33d..b09b198a 100644
--- a/src/hw/ahci.c
+++ b/src/hw/ahci.c
@@ -637,7 +637,7 @@ static void
ahci_controller_setup(struct pci_device *pci)
{
struct ahci_port_s *port;
- u32 pnr, max;
+ u32 val, pnr, max;
if (create_bounce_buf() < 0)
return;
@@ -660,8 +660,19 @@ ahci_controller_setup(struct pci_device *pci)
pci_enable_busmaster(pci);
- ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
- ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
+ /* AHCI controller reset, but only for CSM. Commit 8863cbbd
+ introduced this universally, to make AHCI drivers work in
+ CSM mode, but it broke AHCI setup on the ThinkPad T420 when
+ SeaBIOS is used as a coreboot payload, hence the else clause: */
+ if (CONFIG_CSM) {
+ /* Enable AHCI controller after resetting its state */
+ ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
+ ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
+ } else {
+ /* Enable AHCI controller from its current state */
+ val = ahci_ctrl_readl(ctrl, HOST_CTL);
+ ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
+ }
ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP);
ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
--
2.39.5
+1 -1
View File
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-3.0-or-later
tree="default"
rev="9029a010ec413e6c3c0eb52c29c252a5b9a9f774"
rev="b686f4600792c504f01929f761be473e298de33d"