coreboot/g43t_am3: use ifd-based setup

no-ME setup. with a gbe file. we previously made this
a descriptorless setup.

Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2025-04-22 03:24:38 +01:00
parent 0ddd196375
commit 564155277e
5 changed files with 28 additions and 8 deletions
@@ -127,7 +127,7 @@ CONFIG_MAINBOARD_VENDOR="Acer"
# CONFIG_BOARD_ACER_VN7_572G is not set
CONFIG_BOARD_ACER_G43T_AM3=y
# CONFIG_BOARD_ACER_Q45T_AM is not set
CONFIG_CBFS_SIZE=0x1000000
CONFIG_CBFS_SIZE=0xFFA000
CONFIG_MAX_CPUS=4
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
@@ -164,12 +164,14 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../../config/ifd/g43t_am3/ifd_16"
CONFIG_GBE_BIN_PATH="../../../config/ifd/g43t_am3/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_DEBUG_SMI is not set
# CONFIG_HAVE_IFD_BIN is not set
CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -333,7 +335,13 @@ CONFIG_SUPERIO_ITE_IT8720F=y
#
# Intel Firmware
#
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
@@ -600,6 +608,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging