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put all src downloads under src/

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build/release/src was partly re-written to accomodate this

memtest86plus was patched to have a central Makefile, and
lbmk modified to use that, rather than mess with build32
and build64. the central Makefile just builds both targets
or cleans both targets

Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2023-10-06 22:59:36 +01:00
parent 965b6a7ed7
commit 4e39d5a5a8
103 changed files with 412 additions and 397 deletions
Download Patch File Download Diff File Expand all files Collapse all files
config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+4 -4
View File
@@ -145,9 +145,9 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../config/ifd/t440p/ifd"
CONFIG_ME_BIN_PATH="../../blobs/t440p/me.bin"
CONFIG_GBE_BIN_PATH="../../config/ifd/t440p/gbe"
CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
CONFIG_ME_BIN_PATH="../../../blobs/t440p/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
@@ -261,7 +261,7 @@ CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_MRC=y
CONFIG_MRC_FILE="../../mrc/haswell/mrc.bin"
CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+4 -4
View File
@@ -143,9 +143,9 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../config/ifd/t440p/ifd"
CONFIG_ME_BIN_PATH="../../blobs/t440p/me.bin"
CONFIG_GBE_BIN_PATH="../../config/ifd/t440p/gbe"
CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
CONFIG_ME_BIN_PATH="../../../blobs/t440p/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
@@ -259,7 +259,7 @@ CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_MRC=y
CONFIG_MRC_FILE="../../mrc/haswell/mrc.bin"
CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000