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NEW MAINBOARD: ThinkPad T480

Browse Source 
This uses the excellent deguard utility, written by
the excellent Mate Kukri.

A few bugs but it mostly works. Documentation to come
shortly, in lbwww.git.

Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2024-12-01 05:45:06 +00:00
parent 597b45fdbd
commit 264928c6cd
40 changed files with 2678 additions and 1609 deletions
Download Patch File Download Diff File Expand all files Collapse all files
config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch
-1541
View File
File diff suppressed because it is too large Load Diff
config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
+94
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@@ -0,0 +1,94 @@
From 18b68185f44599cf6ea6a20816bf6a5eb7aeda17 Mon Sep 17 00:00:00 2001
From: Felix Singer <felixsinger@posteo.net>
Date: Wed, 26 Jun 2024 04:24:31 +0200
Subject: [PATCH 1/8] soc/intel/skylake: configure usb acpi
Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
Signed-off-by: Felix Singer <felixsinger@posteo.net>
---
src/soc/intel/skylake/Kconfig | 1 +
src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++-
2 files changed, 56 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 22017c848b..c24df2ef75 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
select CPU_INTEL_COMMON
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION
+ select DRIVERS_USB_ACPI
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb
index 6538a1475b..dfb81d496e 100644
--- a/src/soc/intel/skylake/chipset.cb
+++ b/src/soc/intel/skylake/chipset.cb
@@ -13,7 +13,61 @@ chip soc/intel/skylake
device pci 07.0 alias chap off end
device pci 08.0 alias gmm off end # Gaussian Mixture Model
device pci 13.0 alias ish off end # SensorHub
- device pci 14.0 alias south_xhci off ops usb_xhci_ops end
+ device pci 14.0 alias south_xhci off ops usb_xhci_ops
+ chip drivers/usb/acpi
+ register "type" = "UPC_TYPE_HUB"
+ device usb 0.0 alias xhci_root_hub off
+ chip drivers/usb/acpi
+ device usb 2.0 alias usb2_port1 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.1 alias usb2_port2 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.2 alias usb2_port3 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.3 alias usb2_port4 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.4 alias usb2_port5 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.5 alias usb2_port6 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.6 alias usb2_port7 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.7 alias usb2_port8 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.8 alias usb2_port9 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.9 alias usb2_port10 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.0 alias usb3_port1 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.1 alias usb3_port2 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.2 alias usb3_port3 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.3 alias usb3_port4 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.4 alias usb3_port5 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.5 alias usb3_port6 off end
+ end
+ end
+ end
+ end
device pci 14.1 alias south_xdci off ops usb_xdci_ops end
device pci 14.2 alias thermal off end
device pci 14.3 alias cio off end
--
2.39.5
config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
+308
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@@ -0,0 +1,308 @@
From a7cbcbc7037fe3473e5ebe475cbfd12f653e9827 Mon Sep 17 00:00:00 2001
From: Felix Singer <felixsinger@posteo.net>
Date: Wed, 26 Jun 2024 00:59:03 +0200
Subject: [PATCH 2/8] mb/lenovo: Add initial code for Lenovo ThinkPad E460
Change-Id: Ia02f81750105c95c867d961dbdadcd5991ad371f
Signed-off-by: Felix Singer <felixsinger@posteo.net>
---
src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 47 +++++++++++++++++++
.../lenovo/sklkbl_thinkpad/Kconfig.name | 4 ++
.../lenovo/sklkbl_thinkpad/Makefile.mk | 7 +++
.../lenovo/sklkbl_thinkpad/acpi/ec.asl | 3 ++
.../lenovo/sklkbl_thinkpad/acpi/superio.asl | 3 ++
.../lenovo/sklkbl_thinkpad/bootblock.c | 7 +++
.../lenovo/sklkbl_thinkpad/devicetree.cb | 17 +++++++
src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 23 +++++++++
.../lenovo/sklkbl_thinkpad/ramstage.c | 11 +++++
.../lenovo/sklkbl_thinkpad/romstage.c | 7 +++
.../variants/e460/gma-mainboard.ads | 15 ++++++
.../sklkbl_thinkpad/variants/e460/hda_verb.c | 10 ++++
.../variants/e460/overridetree.cb | 37 +++++++++++++++
13 files changed, 191 insertions(+)
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
new file mode 100644
index 0000000000..fcc80dffe3
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+ bool
+ select BOARD_ROMSIZE_KB_12288
+ select HAVE_ACPI_RESUME
+ select HAVE_ACPI_TABLES
+# select HAVE_CMOS_DEFAULT
+# select INTEL_GMA_HAVE_VBT
+ select INTEL_LPSS_UART_FOR_CONSOLE
+ select MAINBOARD_HAS_LIBGFXINIT
+ select MEMORY_MAPPED_TPM
+ select MAINBOARD_HAS_TPM2
+ select NO_UART_ON_SUPERIO
+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+ select SPD_READ_BY_WORD
+ select SYSTEM_TYPE_LAPTOP
+
+config BOARD_LENOVO_E460
+ bool
+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+ select SOC_INTEL_SKYLAKE
+
+if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+
+config MAINBOARD_DIR
+ default "lenovo/sklkbl_thinkpad"
+
+config VARIANT_DIR
+ default "e460" if BOARD_LENOVO_E460
+
+config MAINBOARD_PART_NUMBER
+ default "E460" if BOARD_LENOVO_E460
+
+config CBFS_SIZE
+ default 0x600000 if BOARD_LENOVO_E460
+
+config DIMM_MAX
+ default 4
+
+config DIMM_SPD_SIZE
+ default 256
+
+config UART_FOR_CONSOLE
+ default 2
+
+endif
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
new file mode 100644
index 0000000000..61d971fe8d
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_LENOVO_E460
+ bool "ThinkPad E460"
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
new file mode 100644
index 0000000000..6e544fd6b9
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
@@ -0,0 +1,7 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-y += bootblock.c
+
+ramstage-y += ramstage.c
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
new file mode 100644
index 0000000000..16990d45f4
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
new file mode 100644
index 0000000000..55b1db5b11
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
new file mode 100644
index 0000000000..ccd8ec1b40
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+
+void bootblock_mainboard_early_init(void)
+{
+}
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
new file mode 100644
index 0000000000..ddb6e8aaa5
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/intel/skylake
+ device domain 0 on
+ device ref igpu on end
+ device ref sa_thermal on end
+ device ref thermal on end
+ device ref south_xhci on end
+ device ref lpc_espi on
+ register "serirq_mode" = "SERIRQ_CONTINUOUS"
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+ end
+ device ref hda on end
+ end
+end
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
new file mode 100644
index 0000000000..967b652853
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ ACPI_DSDT_REV_2,
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20110725
+)
+{
+ #include <acpi/dsdt_top.asl>
+ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <cpu/intel/common/acpi/cpu.asl>
+
+ Device (\_SB.PCI0) {
+ #include <soc/intel/skylake/acpi/systemagent.asl>
+ #include <soc/intel/skylake/acpi/pch.asl>
+ }
+
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+}
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
new file mode 100644
index 0000000000..6c3b077cc4
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/device.h>
+
+static void init_mainboard(void *chip_info)
+{
+}
+
+struct chip_operations mainboard_ops = {
+ .init = init_mainboard,
+};
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
new file mode 100644
index 0000000000..59a62f484e
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/romstage.h>
+
+void mainboard_memory_init_params(FSPM_UPD *mupd)
+{
+}
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
new file mode 100644
index 0000000000..e0a166fe55
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
@@ -0,0 +1,15 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+ ports : constant Port_List :=
+ (eDP,
+ others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
new file mode 100644
index 0000000000..d9d103f862
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
new file mode 100644
index 0000000000..a7384848a6
--- /dev/null
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/intel/skylake
+ device domain 0 on
+ device ref south_xhci on
+ register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC_SKIP), // On board, right front
+ [1] = USB2_PORT_MID(OC_SKIP), // On board, right back
+ [2] = USB2_PORT_MID(OC_SKIP), // Charger port
+ [3] = USB2_PORT_MID(OC_SKIP), // Docking
+ [4] = USB2_PORT_MID(OC_SKIP), // Touch panel
+ [5] = USB2_PORT_MID(OC_SKIP), // Bluetooth
+ [6] = USB2_PORT_MID(OC_SKIP), // Camera
+ [7] = USB2_PORT_MID(OC_SKIP), // Fingerprint
+ }"
+ register "usb3_ports" = "{
+ [0] = USB3_PORT_DEFAULT(OC_SKIP), // On board, right front
+ [1] = USB3_PORT_DEFAULT(OC_SKIP), // On board, right back
+ [2] = USB3_PORT_DEFAULT(OC_SKIP), // Charger port
+ [3] = USB3_PORT_DEFAULT(OC_SKIP), // Docking
+ }"
+ end
+ device ref sata on
+ register "SataPortsEnable[0]" = "1"
+ register "SataPortsDevSlp[0]" = "1"
+ end
+ device ref pcie_rp3 on
+ # WLAN
+ end
+ device ref pcie_rp4 on
+ # LAN
+ end
+ device ref pcie_rp6 on
+ # Card reader
+ end
+ end
+end
--
2.39.5
config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
+30
View File
@@ -0,0 +1,30 @@
From b3049cfd11aa0f3c124ed8f87e98a200201ecbdc Mon Sep 17 00:00:00 2001
From: Mate Kukri <km@mkukri.xyz>
Date: Fri, 22 Nov 2024 21:26:48 +0000
Subject: [PATCH 3/8] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
bootblock
Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
Signed-off-by: Mate Kukri <km@mkukri.xyz>
---
src/soc/intel/skylake/bootblock/pch.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
index df00bb85a9..beaece960b 100644
--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void)
void pch_early_iorange_init(void)
{
- uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
- LPC_IOE_EC_62_66;
+ uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F |
+ LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66;
const config_t *config = config_of_soc();
--
2.39.5
config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch
+1175
View File
File diff suppressed because it is too large Load Diff
config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch → config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+2 -2
View File
@@ -1,7 +1,7 @@
From 53151be243024957386012a099ccf3858f830555 Mon Sep 17 00:00:00 2001
From 1e10400616ab16e17980af23c91a8efc633529e8 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 30 Sep 2024 20:44:38 -0400
Subject: [PATCH 2/5] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Subject: [PATCH 5/8] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch → config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+12 -12
View File
@@ -1,7 +1,7 @@
From 50ae904625d6917c68ff8f8f50c280d79842142b Mon Sep 17 00:00:00 2001
From c900ff6f05ee431c7bf6ab31bc0215faa4ad6971 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
Subject: [PATCH 3/5] util/ifdtool: add --nuke flag (all 0xFF on region)
Subject: [PATCH 6/8] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
@@ -20,10 +20,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 83 insertions(+), 31 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
index 36477eef66..3ebef74042 100644
index ace05e2265..ba292fd142 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 36477eef66..3ebef74042 100644
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
"\n");
}
@@ -92,7 +92,7 @@ index 36477eef66..3ebef74042 100644
int main(int argc, char *argv[])
{
int opt, option_index = 0;
@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
@@ -100,7 +100,7 @@ index 36477eef66..3ebef74042 100644
int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
char *region_type_string = NULL, *region_fname = NULL;
const char *layout_fname = NULL;
@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
@@ -2280,6 +2336,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index 36477eef66..3ebef74042 100644
{0, 0, 0, 0}
};
@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
@@ -2329,35 +2386,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
@@ -146,7 +146,7 @@ index 36477eef66..3ebef74042 100644
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
@@ -2534,6 +2564,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
break;
@@ -169,7 +169,7 @@ index 36477eef66..3ebef74042 100644
case 'v':
print_version();
exit(EXIT_SUCCESS);
@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
@@ -2553,7 +2599,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
@@ -179,7 +179,7 @@ index 36477eef66..3ebef74042 100644
fprintf(stderr, "You may not specify more than one mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
@@ -2562,7 +2609,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
@@ -189,7 +189,7 @@ index 36477eef66..3ebef74042 100644
fprintf(stderr, "You need to specify a mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
@@ -2675,6 +2723,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch → config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
+2 -2
View File
@@ -1,7 +1,7 @@
From 895f9a49fb73d000178d8422b9d0c7e0ef71ae03 Mon Sep 17 00:00:00 2001
From 4102bedd708450a83e1cf4c59743bbf65a46413a Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH 4/5] Remove warning for coreboot images built without a
Subject: [PATCH 7/8] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch → config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
+2 -2
View File
@@ -1,7 +1,7 @@
From 0b26b89118b9bde0a722b9743b9871aa68f8ca38 Mon Sep 17 00:00:00 2001
From 4215d9db7515b1c03646ff0a98a99eb4398c1dee Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 30 Oct 2024 20:55:25 -0600
Subject: [PATCH 5/5] mb/dell/optiplex_780: Add USFF variant
Subject: [PATCH 8/8] mb/dell/optiplex_780: Add USFF variant
Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
+27
View File
@@ -0,0 +1,27 @@
From 519d79d0d33a63082e474938fa2850044095732e Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 1 Dec 2024 07:16:20 +0000
Subject: [PATCH 1/1] lenovo/t480: Add MAINBOARD_USES_IFD_GBE_REGION
This board does use a GbE region, so support it in menuconfig.
Signed-off-by: Leah Rowe <info@minifree.org>
---
src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
index 08273c5d27..a83e17b71f 100644
--- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
@@ -15,6 +15,7 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
select MAINBOARD_HAS_LIBGFXINIT
select MEMORY_MAPPED_TPM
select MAINBOARD_HAS_TPM2
+ select MAINBOARD_USES_IFD_GBE_REGION
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SPD_READ_BY_WORD
select SYSTEM_TYPE_LAPTOP
--
2.39.5
config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch
+45
View File
@@ -0,0 +1,45 @@
From 7c386cbe38fc42c036bd14b9048b13f1a1d45877 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 1 Dec 2024 23:40:08 +0000
Subject: [PATCH 1/1] t480 hack: turn off the dgpu
too buggy, in mkukri's testing. just turn it off.
thanks go to mkukri for showing me how to turn this off.
as nicholas explained to me, if there's no nvram on this board,
coreboot can't use a static option table, because that works by
copying those settings to the nvram.
so we just have to hardcode for the time being
Signed-off-by: Leah Rowe <info@minifree.org>
---
3rdparty/vboot | 2 +-
src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/3rdparty/vboot b/3rdparty/vboot
index f1f70f46dc..1f53ea9b7f 160000
--- a/3rdparty/vboot
+++ b/3rdparty/vboot
@@ -1 +1 @@
-Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2
+Subproject commit 1f53ea9b7f398884f722fca046129eae5ea6a71c
diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
index 9526642c57..bf5da12689 100644
--- a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
@@ -31,7 +31,9 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params)
dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1;
printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]);
- if (get_uint_option("dgpu_enable", 1)) {
+// if (get_uint_option("dgpu_enable", 1)) {
+ if (get_uint_option("dgpu_enable", 0)) { // HACK: no option table due to no nvram.
+ // (turn off the dgpu by default due to bugs)
printk(BIOS_DEBUG, "Enabling discrete GPU\n");
// NOTE: i pulled this GPU enable sequence from thin air but it seems to work
gpio_set(GPIO_1R8VIDEO_AON_ON, 1); // Enable GPU power rail
--
2.39.5
config/coreboot/next/target.cfg
+1 -1
View File
@@ -1,2 +1,2 @@
tree="next"
rev="d28fedf4f2cb7e4475a6cdfcab37d64cc60bba1f"
rev="9992a98c671d356b9770282df5d58a302b6dbeda"