coreboot: update revision of cbtree "default"

This commit is contained in:
Leah Rowe
2023-02-19 18:26:07 +00:00
parent dc1fedf920
commit 0d0f6cf3b8
112 changed files with 7525 additions and 5836 deletions
+1 -1
View File
@@ -1,4 +1,4 @@
cbtree="default"
romtype="normal"
cbrevision="b2e8bd83647f664260120fdfc7d07cba694dd89e"
cbrevision="e70bc423f9a2e1d13827f2703efe1f9c72549f20"
arch="x86_64"
@@ -1,7 +1,7 @@
From 852c6bfbd599460983ad864db019d1b60be35296 Mon Sep 17 00:00:00 2001
From 5a9f45601e96940e8345da57ba07d2081a436590 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@retroboot.org>
Date: Fri, 19 Mar 2021 05:54:58 +0000
Subject: [PATCH 01/17] apple/macbook21: Set default VRAM to 64MiB instead of
Subject: [PATCH 01/16] apple/macbook21: Set default VRAM to 64MiB instead of
8MiB
---
@@ -19,5 +19,5 @@ index cf1bc4566e..dc0df3b6d6 100644
-gfx_uma_size=8M
+gfx_uma_size=64M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 82418ef368b7876fb1199b5e77139e2cef411250 Mon Sep 17 00:00:00 2001
From 2a5dbe6aa7eb46c4fe6db0c6d0ff826e0d733b3f Mon Sep 17 00:00:00 2001
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
Date: Wed, 27 Oct 2021 13:36:01 +0200
Subject: [PATCH 02/17] add c3 and clockgen to apple/macbook21
Subject: [PATCH 02/16] add c3 and clockgen to apple/macbook21
---
src/mainboard/apple/macbook21/Kconfig | 1 +
@@ -46,10 +46,10 @@ index 13d06f0839..88b8669c61 100644
int get_cst_entries(const acpi_cstate_t **entries)
diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
index bcce778cb1..16025d6fbb 100644
index dd701da7ed..5587c48d1f 100644
--- a/src/mainboard/apple/macbook21/devicetree.cb
+++ b/src/mainboard/apple/macbook21/devicetree.cb
@@ -104,7 +104,13 @@ chip northbridge/intel/i945
@@ -100,7 +100,13 @@ chip northbridge/intel/i945
end
device pci 1f.3 on # SMBUS
subsystemid 0x8086 0x7270
@@ -64,5 +64,5 @@ index bcce778cb1..16025d6fbb 100644
end
end
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 54e80b550f86cd08136242f0519053d63a1e4bfd Mon Sep 17 00:00:00 2001
From 0c714764584eb10b555d399d189d1821d92be7dc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@osboot.org>
Date: Sun, 3 Jan 2021 03:34:01 +0000
Subject: [PATCH 03/17] lenovo/x60: 64MiB Video RAM changed to default
Subject: [PATCH 03/16] lenovo/x60: 64MiB Video RAM changed to default
(previously it was 8MiB)
---
@@ -19,5 +19,5 @@ index 5c3576d1f3..88170a1aab 100644
-gfx_uma_size=8M
+gfx_uma_size=64M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 48c0fbea2d0f4be7860205dad5db07f00b1b0a78 Mon Sep 17 00:00:00 2001
From 510e655b28355101763e903c09d551879abfb951 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@osboot.org>
Date: Mon, 22 Feb 2021 22:16:59 +0000
Subject: [PATCH 04/17] lenovo/t60: make 64MiB VRAM the default in cmos.default
Subject: [PATCH 04/16] lenovo/t60: make 64MiB VRAM the default in cmos.default
---
src/mainboard/lenovo/t60/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index af865f16da..7f03157df7 100644
-gfx_uma_size=8M
+gfx_uma_size=64M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 21b3f3773dcb50cef81690d6648e804814e573a4 Mon Sep 17 00:00:00 2001
From d71a9b9bf97d652f54062d2f29126983e7e5c447 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:10:33 +0100
Subject: [PATCH 05/17] lenovo/t400: set VRAM to 352MiB VRAM by default
Subject: [PATCH 05/16] lenovo/t400: set VRAM to 352MiB VRAM by default
In the past, this caused stability issues so we set it to 256MiB. Nowadays,
coreboot has fixed the issue preventing this. See:
@@ -23,5 +23,5 @@ index a326e315b1..e74d15d030 100644
-gfx_uma_size=32M
+gfx_uma_size=352M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From f1d4dab6fc8e86c59ae1b65c51d812d4605972cf Mon Sep 17 00:00:00 2001
From 3ab0b74506350f9a35a825b27bf07a82d6e4116d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:11:59 +0100
Subject: [PATCH 06/17] lenovo/x200: set VRAM to 352MiB by default
Subject: [PATCH 06/16] lenovo/x200: set VRAM to 352MiB by default
This fix makes it possible:
https://review.coreboot.org/c/coreboot/+/16831
@@ -20,5 +20,5 @@ index bb4323836e..33a6a69f59 100644
-gfx_uma_size=32M
+gfx_uma_size=352M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 7e51411400fd71ebaf2b90c22a778227c275bb22 Mon Sep 17 00:00:00 2001
From ee816fbecbffedfd61ece76fa0c50da426b6668a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:18:26 +0100
Subject: [PATCH 07/17] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
Subject: [PATCH 07/16] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
---
src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index 8372032119..3a9a8e2d72 100644
-gfx_uma_size=64M
+gfx_uma_size=352M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From add3b218110aa54a8aa89a0ea7c20ab58d5c7a47 Mon Sep 17 00:00:00 2001
From d381ceb4b43b504f187e2e2b4112482637bc4f38 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:21:39 +0100
Subject: [PATCH 08/17] acer/g43t-am3: set VRAM to 352MiB by default
Subject: [PATCH 08/16] acer/g43t-am3: set VRAM to 352MiB by default
---
src/mainboard/acer/g43t-am3/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index 706f5dd551..98899e8bf5 100644
-gfx_uma_size=64M
+gfx_uma_size=352M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 967ef36a3f3cf5efaf92235905ab4a6b5a878d01 Mon Sep 17 00:00:00 2001
From df73b53d684f0714f137a76f26a2816b81eb7bce Mon Sep 17 00:00:00 2001
From: persmule <persmule@gmail.com>
Date: Sun, 31 Oct 2021 23:33:26 +0000
Subject: [PATCH 09/17] lenovo/t400: Enable all SATA ports
Subject: [PATCH 09/16] lenovo/t400: Enable all SATA ports
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -15,10 +15,10 @@ This patch unmasked all SATA ports found within t400s with factory firmware.
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 670b4883f3..1fc60d9b24 100644
index 1df350ab67..21c8e2c9a1 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -59,8 +59,8 @@ chip northbridge/intel/gm45
@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
register "gpe0_en" = "0x01000000"
register "gpi1_routing" = "2"
@@ -30,5 +30,5 @@ index 670b4883f3..1fc60d9b24 100644
register "sata_traffic_monitor" = "0"
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 990717f4bed5ff0bcf89e7f583251c76f6cf5559 Mon Sep 17 00:00:00 2001
From 92f474ae7d67c82ce6defd7612a6c3a8d2923cb7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 20 Dec 2021 01:29:31 +0000
Subject: [PATCH 10/17] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
Subject: [PATCH 10/16] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
default
---
@@ -18,5 +18,5 @@ index 7314066c2b..2e315d4521 100644
me_state=Normal
+gfx_uma_size=224M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From a069b42f28f22e6377d0ddcc5984cd191ab196f0 Mon Sep 17 00:00:00 2001
From 4a44b00cc4d920be2236777c9967199aa149c820 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jan 2022 19:06:22 +0000
Subject: [PATCH 11/17] lenovo/x230: set me_state=Disabled in cmos.default
Subject: [PATCH 11/16] lenovo/x230: set me_state=Disabled in cmos.default
I only recently found out about this. It's possible to use me_cleaner to
do the same thing, but some people might just flash coreboot and not do
@@ -34,5 +34,5 @@ index 2e315d4521..3585cbd58b 100644
+me_state=Disabled
gfx_uma_size=224M
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 3be4cad0bd43fe33cd62f22ed7b89433232d4ed7 Mon Sep 17 00:00:00 2001
From a8a86d992d52770d56b7f594aa4f80e77480e77c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 2 Mar 2022 21:50:01 +0000
Subject: [PATCH 12/17] set me_state=Disabled on all cmos.default files!
Subject: [PATCH 12/16] set me_state=Disabled on all cmos.default files!
yeah. why the hell isn't this the default
---
@@ -96,5 +96,5 @@ index 6d1d57a795..52f303dfdb 100644
-me_state=Normal
+me_state=Disabled
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 45c2ae2e2885aedd8a75de077bf4cbbcf5b87a87 Mon Sep 17 00:00:00 2001
From edaeb3774764fe6698653fc7fcc38bbda6c69bb9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Mar 2022 18:04:55 +0000
Subject: [PATCH 13/17] specifically use python3, in scripts
Subject: [PATCH 13/16] specifically use python3, in scripts
---
src/drivers/intel/fsp2_0/Makefile.inc | 2 +-
@@ -9,10 +9,10 @@ Subject: [PATCH 13/17] specifically use python3, in scripts
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index eaf99d1492..9e82172c9e 100644
index f11ebee102..e4b151b524 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -84,7 +84,7 @@ endif
@@ -88,7 +88,7 @@ endif
ifeq ($(CONFIG_FSP_FULL_FD),y)
$(obj)/Fsp_M.fd: $(call strip_quotes,$(CONFIG_FSP_FD_PATH)) $(DOTCONFIG)
@@ -32,5 +32,5 @@ index 89976eac59..2cd7027377 100644
# SPDX-License-Identifier: GPL-3.0-or-later
#
--
2.25.1
2.30.2
@@ -1,57 +0,0 @@
From d89a5c66a0150bb6a2e82c685915b2c8a44cb9ed Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 19 Nov 2022 03:30:34 +0000
Subject: [PATCH 14/17] coreboot/default: fix crossgcc build
patch copied from
coreboot f9b5665d280faa35c6b41fe0c48a9e9e1afd634b
---
util/crossgcc/patches/gcc-11.2.0_gnat.patch | 32 ++++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/util/crossgcc/patches/gcc-11.2.0_gnat.patch b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
index 2d7cecee24..c22cec45d0 100644
--- a/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+++ b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
@@ -5,7 +5,37 @@
# Extra flags to pass to recursive makes.
-COMMON_ADAFLAGS= -gnatpg
-+COMMON_ADAFLAGS= -gnatpg -gnatwGUR
++COMMON_ADAFLAGS= -gnatpg -gnatwn
ifeq ($(TREECHECKING),)
CHECKING_ADAFLAGS=
else
+diff -Nurp gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in
+--- gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in 2022-06-03 00:31:57.993273717 +0200
++++ gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in 2022-06-03 00:30:50.214166847 +0200
+@@ -334,6 +334,7 @@ GNAT_ADA_OBJS = \
+ ada/hostparm.o \
+ ada/impunit.o \
+ ada/inline.o \
++ ada/libgnat/i-c.o \
+ ada/libgnat/interfac.o \
+ ada/itypes.o \
+ ada/krunch.o \
+@@ -364,7 +365,10 @@ GNAT_ADA_OBJS = \
+ ada/rtsfind.o \
+ ada/libgnat/s-addope.o \
+ ada/libgnat/s-addima.o \
++ ada/libgnat/s-aotase.o \
+ ada/libgnat/s-assert.o \
++ ada/libgnat/s-atoope.o \
++ ada/libgnat/s-atopri.o \
+ ada/libgnat/s-bitops.o \
+ ada/libgnat/s-carun8.o \
+ ada/libgnat/s-casuti.o \
+@@ -548,6 +552,7 @@ GNATBIND_OBJS = \
+ ada/hostparm.o \
+ ada/init.o \
+ ada/initialize.o \
++ ada/libgnat/i-c.o \
+ ada/libgnat/interfac.o \
+ ada/krunch.o \
+ ada/lib.o \
--
2.25.1
@@ -1,7 +1,7 @@
From 495555d383345124d7b45b8e2c8feb38153b9f7e Mon Sep 17 00:00:00 2001
From 5677039fe0535da560bb9bca16e5ff9579203780 Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Sat, 19 Mar 2022 13:42:33 +0000
Subject: [PATCH 15/17] lenovo/x230: introduce FHD variant
Subject: [PATCH 14/16] lenovo/x230: introduce FHD variant
There is a modification for the x230 which uses the 2nd DP from the dock
as the integrated panel's connection, which allows using a custom eDP
@@ -44,7 +44,7 @@ Signed-off-by: Felix Singer <felixsinger@posteo.net>
create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
index cafdead858..b8cae24199 100644
index f9667267d5..4d8325ea43 100644
--- a/src/mainboard/lenovo/x230/Kconfig
+++ b/src/mainboard/lenovo/x230/Kconfig
@@ -1,4 +1,4 @@
@@ -54,7 +54,7 @@ index cafdead858..b8cae24199 100644
config BOARD_SPECIFIC_OPTIONS
def_bool y
@@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
select H8_HAS_BAT_TRESHOLDS_IMPL
select H8_HAS_BAT_THRESHOLDS_IMPL
select H8_HAS_PRIMARY_FN_KEYS if BOARD_LENOVO_X230S
select NO_UART_ON_SUPERIO
- select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
@@ -65,7 +65,7 @@ index cafdead858..b8cae24199 100644
@@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS
select INTEL_INT15
select DRIVERS_RICOH_RCE822
select MAINBOARD_HAS_LPC_TPM
select MEMORY_MAPPED_TPM
- select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+ select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
select MAINBOARD_HAS_LIBGFXINIT
@@ -194,5 +194,5 @@ index 0000000000..f7cf0bc264
+
+end GMA.Mainboard;
--
2.25.1
2.30.2
@@ -1,14 +1,14 @@
From 27f963913d9afc6da15043c6e8b224c9b1a727ac Mon Sep 17 00:00:00 2001
From 5a8cdbc26de8c07aaa53d3aad6251af391a1591e Mon Sep 17 00:00:00 2001
From: Alexei Sorokin <sor.alexei@meowr.ru>
Date: Sun, 27 Nov 2022 18:36:26 +0300
Subject: [PATCH 16/17] lenovo/x230: fix the data.vbt path for the EDP variant
Subject: [PATCH 15/16] lenovo/x230: fix the data.vbt path for the EDP variant
---
src/mainboard/lenovo/x230/Kconfig | 3 ---
1 file changed, 3 deletions(-)
src/mainboard/lenovo/x230/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
index b8cae24199..409892f3ab 100644
index 4d8325ea43..409892f3ab 100644
--- a/src/mainboard/lenovo/x230/Kconfig
+++ b/src/mainboard/lenovo/x230/Kconfig
@@ -63,7 +63,7 @@ config OVERRIDE_DEVICETREE
@@ -21,5 +21,5 @@ index b8cae24199..409892f3ab 100644
config USBDEBUG_HCD_INDEX
int
--
2.25.1
2.30.2
@@ -1,7 +1,7 @@
From 0cf2eee19eef5270410d054cf8e26a8be99245a8 Mon Sep 17 00:00:00 2001
From 4d78ee1f99fe49585eeb1afe6792ddfe8ddcccb1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 Dec 2022 22:35:01 +0000
Subject: [PATCH 17/17] util/ifdtool: add --nuke flag (all 0xFF on region)
Date: Sun, 19 Feb 2023 18:21:43 +0000
Subject: [PATCH 16/16] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
@@ -11,72 +11,84 @@ Example:
./ifdtool --nuke gbe coreboot.rom
./ifdtool --nuke bios coreboot.com
./ifdtool --nuke me coreboot.com
Rebased since the last revision update in lbmk.
---
util/ifdtool/ifdtool.c | 98 ++++++++++++++++++++++++++++++++----------
1 file changed, 76 insertions(+), 22 deletions(-)
util/ifdtool/ifdtool.c | 117 ++++++++++++++++++++++++++++++-----------
1 file changed, 85 insertions(+), 32 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
index ca5d3b8d21..8ba1335772 100644
index 98afa4bbcf..5509721018 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
@@ -1640,19 +1640,68 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
@@ -1771,6 +1771,7 @@ static void print_usage(const char *name)
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
"<region> is one of Descriptor, BIOS, ME, GbE, Platform, res1, res2, res3\n"
"<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
@@ -1778,13 +1779,70 @@ static void print_usage(const char *name)
"\n");
}
+static int
+get_region_type_string(const char *region_type_string)
+{
+static int
+get_region_type_string(const char *region_type_string)
+{
+ if (region_type_string == NULL)
+ return -1;
+ else if (!strcasecmp("Descriptor", region_type_string))
+ return 0;
+ region_type = 0;
+ else if (!strcasecmp("BIOS", region_type_string))
+ return 1;
+ region_type = 1;
+ else if (!strcasecmp("ME", region_type_string))
+ return 2;
+ region_type = 2;
+ else if (!strcasecmp("GbE", region_type_string))
+ return 3;
+ else if (!strcasecmp("Platform", region_type_string))
+ return 4;
+ else if (!strcasecmp("res1", region_type_string))
+ return 5;
+ else if (!strcasecmp("res2", region_type_string))
+ return 6;
+ else if (!strcasecmp("res3", region_type_string))
+ return 7;
+ region_type = 3;
+ else if (!strcasecmp("Platform Data", region_type_string))
+ region_type = 4;
+ else if (!strcasecmp("Device Exp1", region_type_string))
+ region_type = 5;
+ else if (!strcasecmp("Secondary BIOS", region_type_string))
+ region_type = 6;
+ else if (!strcasecmp("Reserved", region_type_string))
+ region_type = 7;
+ else if (!strcasecmp("EC", region_type_string))
+ return 8;
+ region_type = 8;
+ else if (!strcasecmp("Device Exp2", region_type_string))
+ region_type = 9;
+ else if (!strcasecmp("IE", region_type_string))
+ region_type = 10;
+ else if (!strcasecmp("10GbE_0", region_type_string))
+ region_type = 11;
+ else if (!strcasecmp("10GbE_1", region_type_string))
+ region_type = 12;
+ else if (!strcasecmp("PTT", region_type_string))
+ region_type = 15;
+ else
+ return -1;
+}
+
+
+static void
+nuke(const char *filename, char *image, int size, int region_type)
+{
+ int i;
+ region_t region;
+ const frba_t *frba = find_frba(image, size);
+ if (!frba)
+ exit(EXIT_FAILURE);
+
+ region = get_region(frba, region_type);
+ if (region.size > 0) {
+ for (i = region.base; i <= region.limit; i++) {
+ if ((i + 1) > (size))
+ break;
+ image[i] = 0xFF;
+ }
+ write_image(filename, image, size);
+ }
+}
+static void
+nuke(const char *filename, char *image, int size, int region_type)
+{
+ int i;
+ region_t region;
+ const frba_t *frba = find_frba(image, size);
+ if (!frba)
+ exit(EXIT_FAILURE);
+
+ region = get_region(frba, region_type);
+ if (region.size > 0) {
+ for (i = region.base; i <= region.limit; i++) {
+ if ((i + 1) > (size))
+ break;
+ image[i] = 0xFF;
+ }
+ write_image(filename, image, size);
+ }
+}
+
int main(int argc, char *argv[])
{
@@ -89,7 +101,7 @@ index ca5d3b8d21..8ba1335772 100644
char *region_type_string = NULL, *region_fname = NULL;
const char *layout_fname = NULL;
char *new_filename = NULL;
@@ -1683,6 +1732,7 @@ int main(int argc, char *argv[])
@@ -1815,6 +1873,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
@@ -97,7 +109,7 @@ index ca5d3b8d21..8ba1335772 100644
{0, 0, 0, 0}
};
@@ -1723,25 +1773,8 @@ int main(int argc, char *argv[])
@@ -1855,35 +1914,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
@@ -109,23 +121,33 @@ index ca5d3b8d21..8ba1335772 100644
- region_type = 2;
- else if (!strcasecmp("GbE", region_type_string))
- region_type = 3;
- else if (!strcasecmp("Platform", region_type_string))
- else if (!strcasecmp("Platform Data", region_type_string))
- region_type = 4;
- else if (!strcasecmp("res1", region_type_string))
- else if (!strcasecmp("Device Exp1", region_type_string))
- region_type = 5;
- else if (!strcasecmp("res2", region_type_string))
- else if (!strcasecmp("Secondary BIOS", region_type_string))
- region_type = 6;
- else if (!strcasecmp("res3", region_type_string))
- else if (!strcasecmp("Reserved", region_type_string))
- region_type = 7;
- else if (!strcasecmp("EC", region_type_string))
- region_type = 8;
- else if (!strcasecmp("Device Exp2", region_type_string))
- region_type = 9;
- else if (!strcasecmp("IE", region_type_string))
- region_type = 10;
- else if (!strcasecmp("10GbE_0", region_type_string))
- region_type = 11;
- else if (!strcasecmp("10GbE_1", region_type_string))
- region_type = 12;
- else if (!strcasecmp("PTT", region_type_string))
- region_type = 15;
- if (region_type == -1) {
+ if ((region_type =
+ get_region_type_string(region_type_string)) == -1) {
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
print_usage(argv[0]);
@@ -1900,6 +1933,22 @@ int main(int argc, char *argv[])
@@ -2050,6 +2082,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
break;
@@ -148,7 +170,7 @@ index ca5d3b8d21..8ba1335772 100644
case 'v':
print_version();
exit(EXIT_SUCCESS);
@@ -1915,7 +1964,7 @@ int main(int argc, char *argv[])
@@ -2065,7 +2113,7 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked |
@@ -157,7 +179,7 @@ index ca5d3b8d21..8ba1335772 100644
fprintf(stderr, "You may not specify more than one mode.\n\n");
print_usage(argv[0]);
exit(EXIT_FAILURE);
@@ -1923,7 +1972,8 @@ int main(int argc, char *argv[])
@@ -2073,7 +2121,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
mode_newlayout + mode_spifreq + mode_em100 + mode_locked +
@@ -167,7 +189,7 @@ index ca5d3b8d21..8ba1335772 100644
fprintf(stderr, "You need to specify a mode.\n\n");
print_usage(argv[0]);
exit(EXIT_FAILURE);
@@ -2021,6 +2071,10 @@ int main(int argc, char *argv[])
@@ -2171,6 +2220,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
@@ -179,5 +201,5 @@ index ca5d3b8d21..8ba1335772 100644
fpsba_t *fpsba = find_fpsba(image, size);
fmsba_t *fmsba = find_fmsba(image, size);
--
2.25.1
2.30.2