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coreboot/x2e_n150: fix mismatching fsp header

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thanks to sirlami on irc for pointing this out.

due to lbmk blob policy, we must not distribute
fsp except as the full, concatenated binary, thus
complying with intel's license. it is removed from
builds before release, re-inserted via vendor
inject scripts in the usual way.

a while ago, coreboot updated fsp but i had to keep
it on the earlier version for this board, lest old
releases no longer match vendor insertion; the new
fsp version also wasnet well tested, and didn't seem
to contain any changes reported that pertained to
our use of it.

the fsp headers do not match the fsp binary in use,
causing boot issues for users on topton x2e n150.
this patch should fix the issue, as reported by
sirlami who is the one who found and first tested
this fix; i'm simply changing the configuration,
as per sirlami's guidance.

Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Leah Rowe
2026-05-05 23:21:30 +01:00
parent f60350344a
commit 0aa019d323
1 changed files with 1 additions and 1 deletions
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config/coreboot/x2e_n150/config/fspgop
+1 -1
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@@ -262,7 +262,7 @@ CONFIG_SOC_INTEL_UART_DEV_MAX=7
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
CONFIG_FSP_TYPE_IOT=y
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/"
CONFIG_FSP_HEADER_PATH="3rdparty/fspcc36ae2b5775fa7400cb3282680afc0f6cb37a3c/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/"
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
CONFIG_DATA_BUS_WIDTH=128
CONFIG_DIMMS_PER_CHANNEL=2